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| author | Dun Tan <dun.tan@intel.com> | 2022-08-09 15:22:07 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-08-15 05:15:43 +0000 |
| commit | 83d5871184d1e09332565bfc939e5fc8354b5b79 (patch) | |
| tree | 5a7b708e6d31cac6aa328110cfec9ad5be5e0df0 /UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | |
| parent | 74f44d920a287beef6e5949494dd24d1e2f23145 (diff) | |
| download | edk2-83d5871184d1e09332565bfc939e5fc8354b5b79.tar.gz edk2-83d5871184d1e09332565bfc939e5fc8354b5b79.tar.bz2 edk2-83d5871184d1e09332565bfc939e5fc8354b5b79.zip | |
UefiCpuPkg/PiSmmCpuDxeSmm: Add a new mIsShadowStack flag
This patch is code refactoring and doesn't change any functionality.
Add a new mIsShadowStack flag to identify whether current memory is
shadow stack. Previous smm code logic regards a RO range as shadow
stack and set the dirty bit in corresponding page table entry if
mInternalCr3 is not 0, which may be confusing.
Signed-off-by: Dun Tan <dun.tan@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h')
0 files changed, 0 insertions, 0 deletions