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authorHao Wu <hao.a.wu@intel.com>2018-12-21 10:34:20 +0800
committerHao Wu <hao.a.wu@intel.com>2018-12-25 09:16:29 +0800
commitb70ec0de46d052d2debf0c8e2159addf9628604f (patch)
treeb0e4d8ea5ec6fedea6bfd1f42b012730d488cc50 /UefiCpuPkg/PiSmmCpuDxeSmm
parent49395ea0bc69c30f753f93877e6cc82b8ed0212b (diff)
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UefiCpuPkg/PiSmmCpuDxeSmm: Update to consume SpeculationBarrier
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1417 Since BaseLib API AsmLfence() is a x86 arch specific API and should be avoided using in generic codes, this commit replaces the usage of AsmLfence() with arch-generic API SpeculationBarrier(). Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index 19979d5418..8c9fa14b5b 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -238,10 +238,10 @@ SmmReadSaveState (
return EFI_INVALID_PARAMETER;
}
//
- // The AsmLfence() call here is to ensure the above check for the CpuIndex
- // has been completed before the execution of subsequent codes.
+ // The SpeculationBarrier() call here is to ensure the above check for the
+ // CpuIndex has been completed before the execution of subsequent codes.
//
- AsmLfence ();
+ SpeculationBarrier ();
//
// Check for special EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID