UefiCpuPkg/ResetVector/Vtf0: Move Page Table/CR3 setting to a new file

Now, Transition32FlatTo64Flat calls SetCr3ForPageTables64
which is located in Ia32/PageTables64.asm.

This change is required so OVMF can replace the code in
Ia32/PageTables64.asm with code that generates page tables in
RAM.

Note: Since this change does not impact the functionality of the
current VTF0 binaries, they are not being updated. The resulting
new binaries were tested to verify there is no regression.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14714 6f19259b-4bc3-4df7-8a09-765794883524

3 files changed, 34 insertions, 4 deletions

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm
index 9eba864c28..62e71da3d5 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia32/Flat32ToFlat64.asm
@@ -2,7 +2,7 @@
 ; @file

 ; Transition from 32 bit flat protected mode into 64 bit flat protected mode

 ;

-; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>

+; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>

 ; This program and the accompanying materials

 ; are licensed and made available under the terms and conditions of the BSD License

 ; which accompanies this distribution.  The full text of the license may be found at

@@ -20,8 +20,7 @@ BITS    32
 ;

 Transition32FlatTo64Flat:

 

-    mov     eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000)

-    mov     cr3, eax

+    OneTimeCall SetCr3ForPageTables64

 

     mov     eax, cr4

     bts     eax, 5                      ; enable PAE

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm
new file mode 100644
index 0000000000..0cfcbae87b
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/Ia32/PageTables64.asm
@@ -0,0 +1,30 @@
+;------------------------------------------------------------------------------

+; @file

+; Sets the CR3 register for 64-bit paging

+;

+; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>

+; This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+;------------------------------------------------------------------------------

+

+BITS    32

+

+;

+; Modified:  EAX

+;

+SetCr3ForPageTables64:

+

+    ;

+    ; These pages are built into the ROM image by Tools/FixupForRawSection.py

+    ;

+    mov     eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000)

+    mov     cr3, eax

+

+    OneTimeCallRet SetCr3ForPageTables64

+

diff --git a/UefiCpuPkg/ResetVector/Vtf0/ResetVectorCode.asm b/UefiCpuPkg/ResetVector/Vtf0/ResetVectorCode.asm
index 96f686b0e6..052c821f21 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/ResetVectorCode.asm
+++ b/UefiCpuPkg/ResetVector/Vtf0/ResetVectorCode.asm
@@ -2,7 +2,7 @@
 ; @file

 ; This file includes all other code files to assemble the reset vector code

 ;

-; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>

+; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>

 ; This program and the accompanying materials

 ; are licensed and made available under the terms and conditions of the BSD License

 ; which accompanies this distribution.  The full text of the license may be found at

@@ -41,6 +41,7 @@
 

 %ifdef ARCH_X64

 %include "Ia32/Flat32ToFlat64.asm"

+%include "Ia32/PageTables64.asm"

 %endif

 

 %include "Ia16/Real16ToFlat32.asm"