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| author | vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-08-28 02:37:45 +0000 |
|---|---|---|
| committer | vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-08-28 02:37:45 +0000 |
| commit | f5c941b1770df6d9ffd83e9044e7fa698f71de44 (patch) | |
| tree | 76426f9cf910b4319cc711c794779878f7b2f948 /UefiCpuPkg/Universal | |
| parent | 2cd086a675535b6fc4cb54a75d10ca6f26a2da9e (diff) | |
| download | edk2-f5c941b1770df6d9ffd83e9044e7fa698f71de44.tar.gz edk2-f5c941b1770df6d9ffd83e9044e7fa698f71de44.tar.bz2 edk2-f5c941b1770df6d9ffd83e9044e7fa698f71de44.zip | |
Only disable Debug Timer for x64 platforms in S3RestoreConfig2().
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13684 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg/Universal')
| -rw-r--r-- | UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c index ad81c19590..49796a12f2 100644 --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c @@ -441,6 +441,12 @@ S3ResumeBootOs ( //
AsmWriteIdtr (&PeiS3ResumeState->Idtr);
+ //
+ // NOTE: Because Debug Timer interrupt and system interrupts will be disabled
+ // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted
+ // by soft debugger.
+ //
+
PERF_END (NULL, "ScriptExec", NULL, 0);
//
@@ -1009,11 +1015,6 @@ S3RestoreConfig2 ( DEBUG (( EFI_D_ERROR, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));
DEBUG (( EFI_D_ERROR, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));
- //
- // Disable interrupt of Debug timer.
- //
- SaveAndSetDebugTimerInterrupt (FALSE);
-
if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) {
SwitchStack (
(SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,
@@ -1042,6 +1043,14 @@ S3RestoreConfig2 ( SetInterruptState (InterruptStatus);
AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);
+
+ //
+ // Disable interrupt of Debug timer, since IDT table cannot work in long mode.
+ // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,
+ // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.
+ //
+ SaveAndSetDebugTimerInterrupt (FALSE);
+
AsmEnablePaging64 (
0x38,
SmmS3ResumeState->SmmS3ResumeEntryPoint,
|