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authorJian J Wang <jian.j.wang@intel.com>2018-01-29 09:26:31 +0800
committerRuiyu Ni <ruiyu.ni@intel.com>2018-01-29 09:37:41 +0800
commit41a9c3fd110bed93c4fdf088eea18412bb2dfcde (patch)
treefc280129447d240ca1681a88eeb3c37cd0c4842f /UefiCpuPkg
parent199de89677deffffff30eda7ad17793b30042cce (diff)
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UefiCpuPkg/CpuDxe: remove all code to flush TLB for APs
The reason doing this is that we found that calling StartupAllAps() to flush TLB for all APs in CpuDxe driver after changing page attributes will spend a lot of time to complete. If there are many page attributes update requests, the whole system performance will be slowed down explicitly, including any shell command and UI operation. The solution is removing the flush operation for AP in CpuDxe driver and let AP flush TLB after woken up. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/CpuDxe/CpuPageTable.c85
1 files changed, 5 insertions, 80 deletions
diff --git a/UefiCpuPkg/CpuDxe/CpuPageTable.c b/UefiCpuPkg/CpuDxe/CpuPageTable.c
index a33ac5519e..e2595b4d89 100644
--- a/UefiCpuPkg/CpuDxe/CpuPageTable.c
+++ b/UefiCpuPkg/CpuDxe/CpuPageTable.c
@@ -90,70 +90,6 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
PAGE_TABLE_POOL *mPageTablePool = NULL;
/**
- Enable write protection function for AP.
-
- @param[in,out] Buffer The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuEnableWriteProtection (
- IN OUT VOID *Buffer
- )
-{
- AsmWriteCr0 (AsmReadCr0 () | BIT16);
-}
-
-/**
- CpuFlushTlb function for AP.
-
- @param[in,out] Buffer The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuFlushTlb (
- IN OUT VOID *Buffer
- )
-{
- CpuFlushTlb();
-}
-
-/**
- Sync memory page attributes for AP.
-
- @param[in] Procedure A pointer to the function to be run on enabled APs of
- the system.
-**/
-VOID
-SyncMemoryPageAttributesAp (
- IN EFI_AP_PROCEDURE Procedure
- )
-{
- EFI_STATUS Status;
- EFI_MP_SERVICES_PROTOCOL *MpService;
-
- Status = gBS->LocateProtocol (
- &gEfiMpServiceProtocolGuid,
- NULL,
- (VOID **)&MpService
- );
- //
- // Synchronize the update with all APs
- //
- if (!EFI_ERROR (Status)) {
- Status = MpService->StartupAllAPs (
- MpService, // This
- Procedure, // Procedure
- FALSE, // SingleThread
- NULL, // WaitEvent
- 0, // TimeoutInMicrosecsond
- NULL, // ProcedureArgument
- NULL // FailedCpuList
- );
- ASSERT (Status == EFI_SUCCESS || Status == EFI_NOT_STARTED || Status == EFI_NOT_READY);
- }
-}
-
-/**
Return current paging context.
@param[in,out] PagingContext The paging context.
@@ -575,20 +511,6 @@ IsReadOnlyPageWriteProtected (
}
/**
- Disable write protection function for AP.
-
- @param[in,out] Buffer The pointer to private data buffer.
-**/
-VOID
-EFIAPI
-SyncCpuDisableWriteProtection (
- IN OUT VOID *Buffer
- )
-{
- AsmWriteCr0 (AsmReadCr0() & ~BIT16);
-}
-
-/**
Disable Write Protect on pages marked as read-only.
**/
VOID
@@ -835,10 +757,13 @@ AssignMemoryPageAttributes (
if (!EFI_ERROR(Status)) {
if ((PagingContext == NULL) && IsModified) {
//
- // Flush TLB as last step
+ // Flush TLB as last step.
+ //
+ // Note: Since APs will always init CR3 register in HLT loop mode or do
+ // TLB flush in MWAIT loop mode, there's no need to flush TLB for them
+ // here.
//
CpuFlushTlb();
- SyncMemoryPageAttributesAp (SyncCpuFlushTlb);
}
}