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| author | Laszlo Ersek <lersek@redhat.com> | 2018-01-30 14:31:23 +0100 |
|---|---|---|
| committer | Ruiyu Ni <ruiyu.ni@intel.com> | 2018-02-01 11:02:44 +0800 |
| commit | 96fc62864ef9420f81fac33273c0d7953d4d0e65 (patch) | |
| tree | 9c2959424b43e785d3e3efd20b16da7881f9bcf0 /UefiCpuPkg | |
| parent | cac4da695e937e4517a5a6418d294ce6edfc8fd6 (diff) | |
| download | edk2-96fc62864ef9420f81fac33273c0d7953d4d0e65.tar.gz edk2-96fc62864ef9420f81fac33273c0d7953d4d0e65.tar.bz2 edk2-96fc62864ef9420f81fac33273c0d7953d4d0e65.zip | |
UefiCpuPkg/PiSmmCpuDxeSmm: update comments in IA32 SmmStartup()
The gSmmCr3, gSmmCr4, gSmmCr0 and gSmmJmpAddr global variables are used
for patching assembly instructions, thus we can't yet remove the DB
encodings for those instructions. At least we should add the intended
meanings in comments.
This patch only changes comments.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: adapt commit msg to ongoing PatchAssembly discussion]
(cherry picked from commit 994df20926ead14441c732b8dbe84e9fef78d4f5)
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm index e96dd8d239..08534dba64 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm @@ -47,12 +47,12 @@ ASM_PFX(SmmStartup): cpuid
DB 0x66
mov ebx, edx ; rdmsr will change edx. keep it in ebx.
- DB 0x66, 0xb8
+ DB 0x66, 0xb8 ; mov eax, imm32
ASM_PFX(gSmmCr3): DD 0
mov cr3, eax
DB 0x67, 0x66
lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
- DB 0x66, 0xb8
+ DB 0x66, 0xb8 ; mov eax, imm32
ASM_PFX(gSmmCr4): DD 0
mov cr4, eax
DB 0x66
@@ -64,11 +64,11 @@ ASM_PFX(gSmmCr4): DD 0 or ah, BIT3 ; set NXE bit
wrmsr
.1:
- DB 0x66, 0xb8
+ DB 0x66, 0xb8 ; mov eax, imm32
ASM_PFX(gSmmCr0): DD 0
DB 0xbf, PROTECT_MODE_DS, 0 ; mov di, PROTECT_MODE_DS
mov cr0, eax
- DB 0x66, 0xea ; jmp far [ptr48]
+ DB 0x66, 0xea ; jmp far [ptr48]
ASM_PFX(gSmmJmpAddr):
DD @32bit
DW PROTECT_MODE_CS
|