diff options
| author | Eric Dong <eric.dong@intel.com> | 2017-09-26 10:43:42 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2017-09-27 11:15:29 +0800 |
| commit | 3dcb53258df3d3f7deb9ef4083fdb5b7aa9e22b3 (patch) | |
| tree | 0f979a52bf6ca359637cdb3dd80e051ba4ffee89 /UefiCpuPkg | |
| parent | cbd7300c802d4a855991c041527d621717a984d2 (diff) | |
| download | edk2-3dcb53258df3d3f7deb9ef4083fdb5b7aa9e22b3.tar.gz edk2-3dcb53258df3d3f7deb9ef4083fdb5b7aa9e22b3.tar.bz2 edk2-3dcb53258df3d3f7deb9ef4083fdb5b7aa9e22b3.zip | |
UefiCpuPkg/CpuCommonFeaturesLib: Add check for input parameter.
The ConfigData parameter initialized in *GetConfigData function should not be NULL in
later *Support, *Initilize function, so just add ASSERT code check in these functions.
Cc: Ming Shao <ming.shao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c | 2 | ||||
| -rw-r--r-- | UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c index 178bfb50ab..880f0922ab 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Aesni.c @@ -68,6 +68,7 @@ AesniSupport ( IS_XEON_E7_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_XEON_PHI_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
+ ASSERT (MsrFeatureConfig != NULL);
MsrFeatureConfig[ProcessorNumber].Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);
return (CpuInfo->CpuIdVersionInfoEcx.Bits.AESNI == 1);
}
@@ -112,6 +113,7 @@ AesniInitialize ( //
if (CpuInfo->ProcessorInfo.Location.Thread == 0) {
MsrFeatureConfig = (MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER *) ConfigData;
+ ASSERT (MsrFeatureConfig != NULL);
if ((MsrFeatureConfig[ProcessorNumber].Bits.AESConfiguration & BIT0) == 0) {
CPU_REGISTER_TABLE_WRITE_FIELD (
ProcessorNumber,
diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c index 8a12080cfb..b42f5de2e3 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c @@ -120,6 +120,7 @@ ProcTraceSupport ( // Check if ProcTraceMemorySize option is enabled (0xFF means disable by user)
//
ProcTraceData = (PROC_TRACE_DATA *) ConfigData;
+ ASSERT (ProcTraceData != NULL);
if ((ProcTraceData->ProcTraceMemSize > RtitTopaMemorySize128M) ||
(ProcTraceData->ProcTraceOutputScheme > RtitOutputSchemeToPA)) {
return FALSE;
@@ -191,6 +192,7 @@ ProcTraceInitialize ( RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr;
ProcTraceData = (PROC_TRACE_DATA *) ConfigData;
+ ASSERT (ProcTraceData != NULL);
MemRegionBaseAddr = 0;
FirstIn = FALSE;
|