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authorRay Ni <ray.ni@intel.com>2023-02-27 13:35:19 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2023-04-01 01:08:34 +0000
commit263782f66781f97be1f88e0097c5a2af6fbb4209 (patch)
tree7cb3ad4a5cee56180fec35e5f6078ea2b27d2cfd /UefiCpuPkg
parentbb5c115fa61b727002f0aa2170c0881a6424b4e0 (diff)
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UefiCpuPkg/MtrrLib: Substract TME-MK KEY_ID_BITS from CPU max PA
CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue to report the maximum physical address bits available for software to use, irrespective of the number of KeyID bits. So, we need to check if TME is enabled and adjust the PA size accordingly. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Ahmad Anadani <ahmad.anadani@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/Library/MtrrLib/MtrrLib.c24
1 files changed, 22 insertions, 2 deletions
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
index e5c862c83d..a66357e305 100644
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
+++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
@@ -756,8 +756,11 @@ MtrrLibInitializeMtrrMask (
OUT UINT64 *MtrrValidAddressMask
)
{
- UINT32 MaxExtendedFunction;
- CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;
+ UINT32 MaxExtendedFunction;
+ CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;
+ UINT32 MaxFunction;
+ CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX ExtendedFeatureFlagsEcx;
+ MSR_IA32_TME_ACTIVATE_REGISTER TmeActivate;
AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
@@ -767,6 +770,23 @@ MtrrLibInitializeMtrrMask (
VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
}
+ //
+ // CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue
+ // to report the maximum physical address bits available for software to use,
+ // irrespective of the number of KeyID bits.
+ // So, we need to check if TME is enabled and adjust the PA size accordingly.
+ //
+ AsmCpuid (CPUID_SIGNATURE, &MaxFunction, NULL, NULL, NULL);
+ if (MaxFunction >= CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {
+ AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, &ExtendedFeatureFlagsEcx.Uint32, NULL);
+ if (ExtendedFeatureFlagsEcx.Bits.TME_EN == 1) {
+ TmeActivate.Uint64 = AsmReadMsr64 (MSR_IA32_TME_ACTIVATE);
+ if (TmeActivate.Bits.TmeEnable == 1) {
+ VirPhyAddressSize.Bits.PhysicalAddressBits -= TmeActivate.Bits.MkTmeKeyidBits;
+ }
+ }
+ }
+
*MtrrValidBitsMask = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
*MtrrValidAddressMask = *MtrrValidBitsMask & 0xfffffffffffff000ULL;
}