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authorZhiguang Liu <zhiguang.liu@intel.com>2023-07-07 14:07:07 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2023-09-18 02:39:25 +0000
commit718cf21a5a1dab6184cd83d2323236ae69e178e8 (patch)
tree35f4ecd13e1704ba303c5abfee05543499554225 /UefiCpuPkg
parent392456240aa74966ee857ae1e5628943ee8c1b88 (diff)
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UefiCpuPkg/SecCore: Remove AP waking Vector logic in SecCore
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494 There are two part of AP waking Vector logic in SecCore. The first one working with GenFv to find a free 4K aligned space, use the 4K aligned address as AP waking Vector and jump to 4G-30h, and finally jump to ApStartup.. The second one hard code uses 4G-1000h as AP waking Vector and jump to ApStartup. Both usages are no longer used. Remove them. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r--UefiCpuPkg/SecCore/Ia32/ResetVec.nasmb36
1 files changed, 3 insertions, 33 deletions
diff --git a/UefiCpuPkg/SecCore/Ia32/ResetVec.nasmb b/UefiCpuPkg/SecCore/Ia32/ResetVec.nasmb
index 1dfc4efe4c..df5f439c4e 100644
--- a/UefiCpuPkg/SecCore/Ia32/ResetVec.nasmb
+++ b/UefiCpuPkg/SecCore/Ia32/ResetVec.nasmb
@@ -25,18 +25,6 @@ USE16
ORG 0h
;
-; 0xFFFFF000
-;
-; We enter here with CS:IP = 0xFF00:0x0000. Do a far-jump to change CS to 0xF000
-; and IP to ApStartup.
-;
-ApVector:
- mov di, "AP"
- jmp 0xF000:0xF000+ApStartup
-
- TIMES 0xFC0-($-$$) nop
-
-;
; This should be at 0xFFFFFFC0
;
@@ -45,14 +33,7 @@ ApVector:
;
ReservedData: DD 0eeeeeeeeh, 0eeeeeeeeh
- TIMES 0xFD0-($-$$) nop
-;
-; This is located at 0xFFFFFFD0
-;
- mov di, "PA"
- jmp ApStartup
-
- TIMES 0xFE0-($-$$) nop
+ TIMES 0x20-($-$$) nop
;
; Pointer to the entry point of the PEI core
; It is located at 0xFFFFFFE0, and is fixed up by some build tool
@@ -70,7 +51,7 @@ ASM_PFX(InterruptHandler):
jmp $
iret
- TIMES 0xFF0-($-$$) nop
+ TIMES 0x30-($-$$) nop
;
; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte
; Execution starts here upon power-on/platform-reset.
@@ -78,7 +59,6 @@ ASM_PFX(InterruptHandler):
ResetHandler:
nop
nop
-ApStartup:
;
; Jmp Rel16 instruction
; Use machine code directly in case of the assembler optimization
@@ -90,17 +70,7 @@ ApStartup:
DB 0e9h
DW -3
-
- TIMES 0xFF8-($-$$) nop
-;
-; Ap reset vector segment address is at 0xFFFFFFF8
-; This will be fixed up by some build tool,
-; so if the value 1..8 appears in the final FD image,
-; tool failure occurs
-;
-ApSegAddress: dd 12345678h
-
- TIMES 0xFFC-($-$$) nop
+ TIMES 0x3C-($-$$) nop
;
; BFV Base is at 0xFFFFFFFC
; This will be fixed up by some build tool,