diff options
| author | Eric Dong <eric.dong@intel.com> | 2018-06-19 13:15:39 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-06-19 13:15:39 +0800 |
| commit | bf252e29a5a1a68fdd584b1cd117b728d7d67ec0 (patch) | |
| tree | 362cc65935e20ff0583632d570e13f087ae2ca72 /UefiCpuPkg | |
| parent | aeb6f576258ef18c0debca1d6b908df1799e0d9b (diff) | |
| download | edk2-bf252e29a5a1a68fdd584b1cd117b728d7d67ec0.tar.gz edk2-bf252e29a5a1a68fdd584b1cd117b728d7d67ec0.tar.bz2 edk2-bf252e29a5a1a68fdd584b1cd117b728d7d67ec0.zip | |
UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.
On AMD processors the second SendIpi in the SendInitSipiSipi and
SendInitSipiSipiAllExcludingSelf routines is not required, and may cause
undesired side-effects during MP initialization.
This patch leverages the StandardSignatureIsAuthenticAMD check to exclude
the second SendIpi and its associated MicroSecondDelay (200).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg')
| -rw-r--r-- | UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 12 | ||||
| -rw-r--r-- | UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12 |
2 files changed, 16 insertions, 8 deletions
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c index b0b7e32108..52c0d39f2e 100644 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c @@ -554,8 +554,10 @@ SendInitSipiSipi ( IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
IcrLow.Bits.Level = 1;
SendIpi (IcrLow.Uint32, ApicId);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, ApicId);
+ if (!StandardSignatureIsAuthenticAMD ()) {
+ MicroSecondDelay (200);
+ SendIpi (IcrLow.Uint32, ApicId);
+ }
}
/**
@@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf ( IcrLow.Bits.Level = 1;
IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
SendIpi (IcrLow.Uint32, 0);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, 0);
+ if (!StandardSignatureIsAuthenticAMD ()) {
+ MicroSecondDelay (200);
+ SendIpi (IcrLow.Uint32, 0);
+ }
}
/**
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c index 1f4dcf709f..3045035020 100644 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c @@ -649,8 +649,10 @@ SendInitSipiSipi ( IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
IcrLow.Bits.Level = 1;
SendIpi (IcrLow.Uint32, ApicId);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, ApicId);
+ if (!StandardSignatureIsAuthenticAMD ()) {
+ MicroSecondDelay (200);
+ SendIpi (IcrLow.Uint32, ApicId);
+ }
}
/**
@@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf ( IcrLow.Bits.Level = 1;
IcrLow.Bits.DestinationShorthand = LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
SendIpi (IcrLow.Uint32, 0);
- MicroSecondDelay (200);
- SendIpi (IcrLow.Uint32, 0);
+ if (!StandardSignatureIsAuthenticAMD ()) {
+ MicroSecondDelay (200);
+ SendIpi (IcrLow.Uint32, 0);
+ }
}
/**
|