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authorDong, Guo <guo.dong@intel.com>2019-04-11 08:51:22 -0700
committerMaurice Ma <maurice.ma@intel.com>2019-04-15 12:30:05 -0700
commit04af8bf262f1917b74745f8ffd3aa8fb465352df (patch)
tree14023c61c67dd62b37e64995d8410ee5b10ef709 /UefiPayloadPkg/SecCore/Ia32
parent87fcc6e8634efadb535ea0d7e9869e72e772fccf (diff)
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UefiPayloadPkg: Enhance UEFI payload for coreboot and Slim Bootloader
CorebootModulePkg and CorebootPayloadPkg originally supports coreboot only. In order to support other bootloaders, such as Slim Bootloader, they need be updated to be more generic. UEFI Payload (UefiPayloadPkg) a converged package from CorebootModulePkg and CorebootPayloadPkg with following updates: a. Support both coreboot and Slim Bootloader b. Removed SataControllerDxe and BaseSerialPortLib16550 to use EDK2 modules c. Support passing bootloader parameter to UEFI payload, e.g. coreboot table from coreboot or HOB list from Slim Bootloader d. Using GraphicsOutputDxe from EDK2 with minor change instead of FbGop e. Remove the dependency to IntelFrameworkPkg and IntelFrameworkModulePkg and QuarkSocPkg f. Use BaseDebugLibSerialPort library as DebugLib g. Use HPET timer, drop legacy 8254 timer support h. Use BaseXApicX2ApicLib instead of BaseXApicLib i. Remove HOB gUefiFrameBufferInfoGuid to use EDK2 graphics HOBs. j. Other clean ups On how UefiPayloadPkg could work with coreboot/Slim Bootloader, please refer UefiPayloadPkg/BuildAndIntegrationInstructions.txt Once UefiPayloadPkg is checked-in, CorebootModulePkg and CorebootPayloadPkg could be retired. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Diffstat (limited to 'UefiPayloadPkg/SecCore/Ia32')
-rw-r--r--UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm78
-rw-r--r--UefiPayloadPkg/SecCore/Ia32/Stack.nasm72
2 files changed, 150 insertions, 0 deletions
diff --git a/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm b/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm
new file mode 100644
index 0000000000..877fc61ef0
--- /dev/null
+++ b/UefiPayloadPkg/SecCore/Ia32/SecEntry.nasm
@@ -0,0 +1,78 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; Entry point for the coreboot UEFI payload.
+;
+;------------------------------------------------------------------------------
+
+SECTION .text
+
+; C Functions
+extern ASM_PFX(SecStartup)
+
+; Pcds
+extern ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))
+extern ASM_PFX(PcdGet32 (PcdPayloadStackTop))
+
+;
+; SecCore Entry Point
+;
+; Processor is in flat protected mode
+;
+; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)
+; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor
+; @param[in] EBP Pointer to the start of the Boot Firmware Volume
+;
+; @return None This routine does not return
+;
+global ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+ ;
+ ; Disable all the interrupts
+ ;
+ cli
+
+ ;
+ ; Save the Payload HOB base address before switching the stack
+ ;
+ mov eax, [esp + 4]
+
+ ;
+ ; Construct the temporary memory at 0x80000, length 0x10000
+ ;
+ mov esp, DWORD [ASM_PFX(PcdGet32 (PcdPayloadStackTop))]
+
+ ;
+ ; Push the Payload HOB base address onto new stack
+ ;
+ push eax
+
+ ;
+ ; Pass BFV into the PEI Core
+ ;
+ push DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))]
+
+ ;
+ ; Pass stack base into the PEI Core
+ ;
+ push BASE_512KB
+
+ ;
+ ; Pass stack size into the PEI Core
+ ;
+ push SIZE_64KB
+
+ ;
+ ; Pass Control into the PEI Core
+ ;
+ call ASM_PFX(SecStartup)
+
+ ;
+ ; Should never return
+ ;
+ jmp $
+
diff --git a/UefiPayloadPkg/SecCore/Ia32/Stack.nasm b/UefiPayloadPkg/SecCore/Ia32/Stack.nasm
new file mode 100644
index 0000000000..55fd2243c8
--- /dev/null
+++ b/UefiPayloadPkg/SecCore/Ia32/Stack.nasm
@@ -0,0 +1,72 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; Switch the stack from temporary memory to permanent memory.
+;
+;------------------------------------------------------------------------------
+
+SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; SecSwitchStack (
+; UINT32 TemporaryMemoryBase,
+; UINT32 PermenentMemoryBase
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(SecSwitchStack)
+ASM_PFX(SecSwitchStack):
+ ;
+ ; Save three register: eax, ebx, ecx
+ ;
+ push eax
+ push ebx
+ push ecx
+ push edx
+
+ ;
+ ; !!CAUTION!! this function address's is pushed into stack after
+ ; migration of whole temporary memory, so need save it to permanent
+ ; memory at first!
+ ;
+
+ mov ebx, [esp + 20] ; Save the first parameter
+ mov ecx, [esp + 24] ; Save the second parameter
+
+ ;
+ ; Save this function's return address into permanent memory at first.
+ ; Then, Fixup the esp point to permanent memory
+ ;
+ mov eax, esp
+ sub eax, ebx
+ add eax, ecx
+ mov edx, [esp] ; copy pushed register's value to permanent memory
+ mov [eax], edx
+ mov edx, [esp + 4]
+ mov [eax + 4], edx
+ mov edx, [esp + 8]
+ mov [eax + 8], edx
+ mov edx, [esp + 12]
+ mov [eax + 12], edx
+ mov edx, [esp + 16] ; Update return address into permanent memory
+ mov [eax + 16], edx
+ mov esp, eax ; From now, esp is pointed to permanent memory
+
+ ;
+ ; Fixup the ebp point to permanent memory
+ ;
+ mov eax, ebp
+ sub eax, ebx
+ add eax, ecx
+ mov ebp, eax ; From now, ebp is pointed to permanent memory
+
+ pop edx
+ pop ecx
+ pop ebx
+ pop eax
+ ret