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authorDavid Wei <david.wei@intel.com>2015-01-12 09:37:20 +0000
committerzwei4 <zwei4@Edk2>2015-01-12 09:37:20 +0000
commit3cbfba02fef9dae07a041fdbf2e89611d72d6f90 (patch)
tree0b3bf0783124d38a191e09736492c0141aa36c15 /Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Facp/Facp.aslc
parent6f785cfcc304c48ec04e542ee429df95e7b51bc5 (diff)
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Upload BSD-licensed Vlv2TbltDevicePkg and Vlv2DeviceRefCodePkg to
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Facp/Facp.aslc')
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diff --git a/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Facp/Facp.aslc b/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Facp/Facp.aslc
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@@ -0,0 +1,194 @@
+/*++
+
+Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
+
+ This program and the accompanying materials are licensed and made available under
+ the terms and conditions of the BSD License that accompanies this distribution.
+ The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+
+Module Name:
+
+ Facp.c
+
+
+Abstract: The fixed ACPI description Table (FADT) Structure
+
+
+--*/
+#ifdef ECP_FLAG
+#include "EDKIIGlueDxe.h"
+#else
+#include <PiDxe.h>
+#endif
+#include <IndustryStandard/Acpi50.h>
+#include "AcpiTablePlatform.h"
+
+EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = {
+ {
+ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ sizeof (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE),
+ EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
+ 0, // to make sum of entire table == 0
+ EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field
+ EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long)
+ EFI_ACPI_OEM_REVISION, // OEM revision number
+ EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID
+ EFI_ACPI_CREATOR_REVISION // ASL compiler revision number
+ },
+ 0, // Physical addesss of FACS
+ 0, // Physical address of DSDT
+ INT_MODEL, // System Interrupt Model (ignored in 2k and later, must be 0 for 98)
+ PM_PROFILE, // Preferred PM Profile
+ SCI_INT_VECTOR, // System vector of SCI interrupt
+ SMI_CMD_IO_PORT, // Port address of SMI command port
+ ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI
+ ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI
+ S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state
+ PSTATE_CNT, // PState control
+ PM1a_EVT_BLK, // Port address of Power Mgt 1a Event Reg Blk
+ PM1b_EVT_BLK, // Port address of Power Mgt 1b Event Reg Blk
+ PM1a_CNT_BLK, // Port address of Power Mgt 1a Ctrl Reg Blk
+ PM1b_CNT_BLK, // Port address of Power Mgt 1b Ctrl Reg Blk
+ PM2_CNT_BLK, // Port address of Power Mgt 2 Ctrl Reg Blk
+ PM_TMR_BLK, // Port address of Power Mgt Timer Ctrl Reg Blk
+ GPE0_BLK, // Port addr of General Purpose Event 0 Reg Blk
+ GPE1_BLK, // Port addr of General Purpose Event 1 Reg Blk
+ PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk
+ PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk
+ PM2_CNT_LEN, // Byte Length of ports at pm2_cnt_blk
+ PM_TM_LEN, // Byte Length of ports at pm_tm_blk
+ GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk
+ GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk
+ GPE1_BASE, // offset in gpe model where gpe1 events start
+ CST_CNT, // _CST support
+ P_LVL2_LAT, // worst case HW latency to enter/exit C2 state
+ P_LVL3_LAT, // worst case HW latency to enter/exit C3 state
+ FLUSH_SIZE, // Size of area read to flush caches
+ FLUSH_STRIDE, // Stride used in flushing caches
+ DUTY_OFFSET, // bit location of duty cycle field in p_cnt reg
+ DUTY_WIDTH, // bit width of duty cycle field in p_cnt reg
+ DAY_ALRM, // index to day-of-month alarm in RTC CMOS RAM
+ MON_ALRM, // index to month-of-year alarm in RTC CMOS RAM
+ CENTURY, // index to century in RTC CMOS RAM
+ IAPC_BOOT_ARCH, // IA-PCI Boot Architecture Flag
+ RESERVED, // reserved
+ FLAG,
+ {
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 8,
+ 0,
+ 0,
+ 0xCF9
+ },
+ 0x06, // Hardware reset value
+ 0, 0, 0, // Reserved
+ 0, // XFirmwareCtrl
+ 0, // XDsdt
+ //
+ // X_PM1a Event Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x20,
+ 0x00,
+ EFI_ACPI_3_0_DWORD,
+ PM1a_EVT_BLK,
+
+ //
+ // X_PM1b Event Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x00,
+ 0x00,
+ EFI_ACPI_RESERVED_BYTE,
+ PM1b_EVT_BLK,
+
+ //
+ // X_PM1a Control Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x10,
+ 0x00,
+ EFI_ACPI_3_0_WORD,
+ PM1a_CNT_BLK,
+
+ //
+ // X_PM1b Control Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x00,
+ 0x00,
+ EFI_ACPI_RESERVED_BYTE,
+ PM1b_CNT_BLK,
+
+ //
+ // X_PM2 Control Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x08,
+ 0x00,
+ EFI_ACPI_3_0_BYTE,
+ PM2_CNT_BLK,
+
+ //
+ // X_PM Timer Control Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x20,
+ 0x00,
+ EFI_ACPI_3_0_DWORD,
+ PM_TMR_BLK,
+
+ //
+ // X_General Purpose Event 0 Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x80,
+ 0x00,
+ EFI_ACPI_RESERVED_BYTE,
+ GPE0_BLK,
+
+ //
+ // X_General Purpose Event 1 Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x00,
+ 0x00,
+ EFI_ACPI_RESERVED_BYTE,
+ GPE1_BLK,
+
+ //
+ // Sleep Control Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x08,
+ 0x00,
+ EFI_ACPI_RESERVED_BYTE,
+ 0,
+
+ //
+ // Sleep Status Register Block
+ //
+ EFI_ACPI_5_0_SYSTEM_IO,
+ 0x08,
+ 0x00,
+ EFI_ACPI_RESERVED_BYTE,
+ 0,
+};
+
+VOID*
+ReferenceAcpiTable (
+ VOID
+ )
+{
+ //
+ // Reference the table being generated to prevent the optimizer from
+ // removing the data structure from the executable
+ //
+ return (VOID*)&FACP;
+}