diff options
-rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 2 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/X64/WriteCr0.nasm | 39 |
2 files changed, 41 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index c4e3bb7758..84cf8957e2 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -573,6 +573,7 @@ X64/WriteCr3.asm | MSFT
X64/WriteCr2.nasm| MSFT
X64/WriteCr2.asm | MSFT
+ X64/WriteCr0.nasm| MSFT
X64/WriteCr0.asm | MSFT
X64/ReadCr4.asm | MSFT
X64/ReadCr3.asm | MSFT
@@ -709,6 +710,7 @@ X64/WriteCr3.asm | INTEL
X64/WriteCr2.nasm| INTEL
X64/WriteCr2.asm | INTEL
+ X64/WriteCr0.nasm| INTEL
X64/WriteCr0.asm | INTEL
X64/ReadCr4.asm | INTEL
X64/ReadCr3.asm | INTEL
diff --git a/MdePkg/Library/BaseLib/X64/WriteCr0.nasm b/MdePkg/Library/BaseLib/X64/WriteCr0.nasm new file mode 100644 index 0000000000..44c474e34f --- /dev/null +++ b/MdePkg/Library/BaseLib/X64/WriteCr0.nasm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; UINTN Cr0
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmWriteCr0)
+ASM_PFX(AsmWriteCr0):
+ mov cr0, rcx
+ mov rax, rcx
+ ret
+
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