diff options
59 files changed, 554 insertions, 267 deletions
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c index 95ab073e18..b15597893a 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.c @@ -55,7 +55,7 @@ ArmCpuSetupSmpNonSecure ( )
{
/*// Make the SCU accessible in Non Secure world
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
ScuBase = ArmGetScuBaseAddress();
// Allow NS access to SCU register
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf index bcf7f6bfba..3ddd4c5704 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf @@ -31,10 +31,5 @@ [Sources.common]
ArmCortexA15Lib.c
-[FeaturePcd]
-
[FixedPcd]
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c index 8d9530cee2..4fc6a08b9a 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.c @@ -15,6 +15,7 @@ #include <Base.h>
#include <Library/ArmLib.h>
#include <Library/ArmCpuLib.h>
+#include <Library/ArmPlatformLib.h>
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
@@ -64,7 +65,7 @@ ArmCpuSetupSmpNonSecure ( INTN ScuBase;
// Make the SCU accessible in Non Secure world
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
ScuBase = ArmGetScuBaseAddress();
// Allow NS access to SCU register
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf index 866736f6ff..a84501dea4 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf @@ -1,5 +1,5 @@ #/* @file
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -22,9 +22,11 @@ [Packages]
MdePkg/MdePkg.dec
ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
[LibraryClasses]
ArmLib
+ ArmPlatformLib
IoLib
PcdLib
@@ -33,8 +35,3 @@ ArmCortexA9Helper.asm | RVCT
ArmCortexA9Helper.S | GCC
-[FeaturePcd]
-
-[FixedPcd]
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c index 6244575772..bae76e441b 100644 --- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c +++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c @@ -1,6 +1,6 @@ /** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -14,6 +14,7 @@ #include <Base.h>
#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/ArmGicLib.h>
@@ -51,7 +52,7 @@ ArmGicSetupNonSecure ( }
// Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt).
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
// Ensure all GIC interrupts are Non-Secure
for (Index = 0; Index < (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32); Index++) {
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff);
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf b/ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf index 73faa39b66..205e503427 100644 --- a/ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf +++ b/ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf @@ -25,14 +25,14 @@ [Packages]
ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
[LibraryClasses]
ArmLib
+ ArmPlatformLib
DebugLib
IoLib
PcdLib
-[FixedPcd.common]
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h index c8692fcfd7..c507329741 100644 --- a/ArmPkg/Include/AsmMacroIoLib.h +++ b/ArmPkg/Include/AsmMacroIoLib.h @@ -122,9 +122,12 @@ // Convert the (ClusterId,CoreId) into a Core Position
// We assume there are 4 cores per cluster
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
- lsr Pos, MpId, #6 ; \
- and Tmp, MpId, #3 ; \
+// Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK
+#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
+ ldr Tmp, =0xFFFF \
+ and MpId, Tmp \
+ lsr Pos, MpId, #6 ; \
+ and Tmp, MpId, #3 ; \
add Pos, Pos, Tmp
// Reserve a region at the top of the Primary Core stack
@@ -207,10 +210,15 @@ _InitializePrimaryStackEnd: #define LoadConstantToReg(Data, Reg) \
ldr Reg, =Data
-
-#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
- lsr Pos, MpId, #6 ; \
- and Tmp, MpId, #3 ; \
+
+// Convert the (ClusterId,CoreId) into a Core Position
+// We assume there are 4 cores per cluster
+// Note: 0xFFFF is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK
+#define GetCorePositionFromMpId(Pos, MpId, Tmp) \
+ ldr Tmp, =0xFFFF ; \
+ and MpId, Tmp ; \
+ lsr Pos, MpId, #6 ; \
+ and Tmp, MpId, #3 ; \
add Pos, Pos, Tmp
#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc index 1ca99fdd1d..5796adcb12 100644 --- a/ArmPkg/Include/AsmMacroIoLib.inc +++ b/ArmPkg/Include/AsmMacroIoLib.inc @@ -82,6 +82,10 @@ MACRO
GetCorePositionFromMpId $Pos, $MpId, $Tmp
+ ;Note: The ARM macro does not support the pre-processing. 0xFF and (0xFF << 8) are the values of
+ ; ARM_CORE_MASK and ARM_CLUSTER_MASK
+ mov $Tmp, #(0xFF :OR: (0xFF << 8))
+ and $MpId, $Tmp
lsr $Pos, $MpId, #6
and $Tmp, $MpId, #3
add $Pos, $Pos, $Tmp
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index b12be1424e..75f7755362 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -112,7 +112,6 @@ typedef enum { //
// ARM MP Core IDs
//
-#define IS_PRIMARY_CORE(MpId) (((MpId) & PcdGet32(PcdArmPrimaryCoreMask)) == PcdGet32(PcdArmPrimaryCore))
#define ARM_CORE_MASK 0xFF
#define ARM_CLUSTER_MASK (0xFF << 8)
#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK)
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c index 77d48acce1..8351b43d80 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c @@ -74,7 +74,7 @@ ArmPlatformInitialize ( IN UINTN MpId
)
{
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.S b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.S new file mode 100644 index 0000000000..847509f9d2 --- /dev/null +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.S @@ -0,0 +1,49 @@ +//
+// Copyright (c) 2012, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Library/ArmLib.h>
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
+GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
+
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
+
+//UINTN
+//ArmPlatformGetCorePosition (
+// IN UINTN MpId
+// );
+ASM_PFX(ArmPlatformGetCorePosition):
+ and r1, r0, #ARM_CORE_MASK
+ and r0, r0, #ARM_CLUSTER_MASK
+ add r0, r1, r0, LSR #7
+ bx lr
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_PFX(ArmPlatformIsPrimaryCore):
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
+ ldr r1, [r1]
+ and r0, r0, r1
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ ldr r1, [r1]
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.asm b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.asm new file mode 100644 index 0000000000..6d35182a27 --- /dev/null +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbHelper.asm @@ -0,0 +1,56 @@ +//
+// Copyright (c) 2012, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Library/ArmLib.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ EXPORT ArmPlatformGetCorePosition
+ EXPORT ArmPlatformIsPrimaryCore
+
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
+
+ PRESERVE8
+ AREA ArmPlatformNullHelper, CODE, READONLY
+
+//UINTN
+//ArmPlatformGetCorePosition (
+// IN UINTN MpId
+// );
+ArmPlatformGetCorePosition FUNCTION
+ and r1, r0, #ARM_CORE_MASK
+ and r0, r0, #ARM_CLUSTER_MASK
+ add r0, r1, r0, LSR #7
+ bx lr
+ ENDFUNC
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ArmPlatformIsPrimaryCore FUNCTION
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
+ ldr r1, [r1]
+ and r0, r0, r1
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ ldr r1, [r1]
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
+ ENDFUNC
+
+ END
+
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf index 6c45d35d80..a8fe3b4ce3 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf @@ -34,6 +34,8 @@ [Sources.common]
ArmRealViewEb.c
ArmRealViewEbMem.c
+ ArmRealViewEbHelper.asm | RVCT
+ ArmRealViewEbHelper.S | GCC
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLibSec.inf b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLibSec.inf index 652211d991..9be6a3755d 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLibSec.inf +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLibSec.inf @@ -32,6 +32,8 @@ [Sources.common]
ArmRealViewEb.c
+ ArmRealViewEbHelper.asm | RVCT
+ ArmRealViewEbHelper.S | GCC
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c index 033c9d7ea0..1d3233ec4a 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c @@ -14,6 +14,7 @@ #include <Library/IoLib.h>
#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
#include <Library/ArmPlatformSecLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
@@ -51,7 +52,7 @@ ArmPlatformSecInitialize ( )
{
// If it is not the primary core then there is nothing to do
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSecLib.inf b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSecLib.inf index b6971bc768..d4e383aceb 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSecLib.inf +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSecLib.inf @@ -29,6 +29,7 @@ [LibraryClasses]
IoLib
ArmLib
+ ArmPlatformLib
[Sources.common]
ArmRealViewEbSec.c
@@ -41,5 +42,3 @@ [FixedPcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf index 6ec75dc0d2..373a8e9e98 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/ArmVExpressLib.inf @@ -51,6 +51,3 @@ gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
gArmTokenSpaceGuid.PcdFvBaseAddress
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c index 87f41c7ae0..32ce23dff7 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c @@ -140,7 +140,7 @@ ArmPlatformInitialize ( IN UINTN MpId
)
{
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S index 286327956a..09cfc827a1 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S @@ -1,5 +1,5 @@ //
-// Copyright (c) 2012, ARM Limited. All rights reserved.
+// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -11,12 +11,16 @@ //
//
+#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
+#include <ArmPlatform.h>
+
.text
.align 3
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
+GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
//UINTN
//ArmPlatformGetCorePosition (
@@ -28,3 +32,33 @@ ASM_PFX(ArmPlatformGetCorePosition): add r0, r1, r0, LSR #7
bx lr
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_PFX(ArmPlatformIsPrimaryCore):
+ // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
+ // with cpu_id[0:3] and cluster_id[4:7]
+ LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
+ ldr r1, [r1]
+ lsr r1, #24
+
+ // Shift the SCC value to get the cluster ID at the offset #8
+ lsl r2, r1, #4
+ and r2, r2, #0xF00
+
+ // Keep only the cpu ID from the original SCC
+ and r1, r1, #0x0F
+ // Add the Cluster ID to the Cpu ID
+ orr r1, r1, r2
+
+ // Keep the Cluster ID and Core ID from the MPID
+ LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
+ and r0, r0, r2
+
+ // Compare mpid and boot cpu from ARM_SCC_CFGREG48
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
+
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm index 73b3d97d66..1b5474b5f2 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm @@ -1,5 +1,5 @@ //
-// Copyright (c) 2012, ARM Limited. All rights reserved.
+// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -11,11 +11,15 @@ //
//
+#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
+#include <ArmPlatform.h>
+
INCLUDE AsmMacroIoLib.inc
EXPORT ArmPlatformGetCorePosition
+ EXPORT ArmPlatformIsPrimaryCore
PRESERVE8
AREA CTA15A7Helper, CODE, READONLY
@@ -31,4 +35,35 @@ ArmPlatformGetCorePosition FUNCTION bx lr
ENDFUNC
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ArmPlatformIsPrimaryCore FUNCTION
+ // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
+ // with cpu_id[0:3] and cluster_id[4:7]
+ LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
+ ldr r1, [r1]
+ lsr r1, #24
+
+ // Shift the SCC value to get the cluster ID at the offset #8
+ lsl r2, r1, #4
+ and r2, r2, #0xF00
+
+ // Keep only the cpu ID from the original SCC
+ and r1, r1, #0x0F
+ // Add the Cluster ID to the Cpu ID
+ orr r1, r1, r2
+
+ // Keep the Cluster ID and Core ID from the MPID
+ LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
+ and r0, r0, r2
+
+ // Compare mpid and boot cpu from ARM_SCC_CFGREG48
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
+ ENDFUNC
+
END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf index a255c40b3e..5a44eb5f70 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf @@ -39,6 +39,8 @@ [Sources.common]
CTA9x4.c
CTA9x4Mem.c
+ CTA9x4Helper.S | GCC
+ CTA9x4Helper.asm | RVCT
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf index 36784c0b49..4d9699d4a3 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLibSec.inf @@ -36,6 +36,8 @@ [Sources.common]
CTA9x4.c
+ CTA9x4Helper.S | GCC
+ CTA9x4Helper.asm | RVCT
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c index 862a51aaf1..55b611190a 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4.c @@ -136,7 +136,7 @@ ArmPlatformInitialize ( IN UINTN MpId
)
{
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S new file mode 100644 index 0000000000..94167d5f17 --- /dev/null +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S @@ -0,0 +1,39 @@ +#
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+
+#include <AsmMacroIoLib.h>
+
+.text
+.align 2
+
+GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
+
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_PFX(ArmPlatformIsPrimaryCore):
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
+ ldr r1, [r1]
+ and r0, r0, r1
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ ldr r1, [r1]
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm new file mode 100644 index 0000000000..429026e015 --- /dev/null +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm @@ -0,0 +1,43 @@ +//
+// Copyright (c) 2013, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <AsmMacroIoLib.h>
+
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ EXPORT ArmPlatformIsPrimaryCore
+
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
+
+ AREA CTA9x4Helper, CODE, READONLY
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ArmPlatformIsPrimaryCore FUNCTION
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
+ ldr r1, [r1]
+ and r0, r0, r1
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ ldr r1, [r1]
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
+ ENDFUNC
+
+ END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S index 949e7a3014..2977591529 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S @@ -1,10 +1,10 @@ #
-# Copyright (c) 2011, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
-# http:#opensource.org/licenses/bsd-license.php
+# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@@ -15,7 +15,6 @@ #include <Base.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
-#.include AsmMacroIoLib.inc
#include <Chipset/ArmCortexA9.h>
@@ -23,6 +22,10 @@ .align 2
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
+GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
+
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
# IN None
# OUT r0 = SCU Base Address
@@ -68,4 +71,19 @@ _Return: ldmfd SP!, {r1-r2}
bx lr
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_PFX(ArmPlatformIsPrimaryCore):
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
+ ldr r1, [r1]
+ and r0, r0, r1
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ ldr r1, [r1]
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
+
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm index 7326237bc7..7d00d115dc 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm @@ -1,5 +1,5 @@ //
-// Copyright (c) 2011, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -22,21 +22,26 @@ INCLUDE AsmMacroIoLib.inc
EXPORT ArmGetCpuCountPerCluster
-
+ EXPORT ArmPlatformIsPrimaryCore
+
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
+
AREA RTSMHelper, CODE, READONLY
// IN None
// OUT r0 = SCU Base Address
-ArmGetScuBaseAddress
+ArmGetScuBaseAddress FUNCTION
// Read Configuration Base Address Register. ArmCBar cannot be called to get
// the Configuration BAR as a stack is not necessary setup. The SCU is at the
// offset 0x0000 from the Private Memory Region.
mrc p15, 4, r0, c15, c0, 0
bx lr
+ ENDFUNC
// IN None
// OUT r0 = number of cores present in the system
-ArmGetCpuCountPerCluster
+ArmGetCpuCountPerCluster FUNCTION
stmfd SP!, {r1-r2}
// Read CP15 MIDR
@@ -69,5 +74,22 @@ _Return add r0, r0, #1
ldmfd SP!, {r1-r2}
bx lr
+ ENDFUNC
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ArmPlatformIsPrimaryCore FUNCTION
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
+ ldr r1, [r1]
+ and r0, r0, r1
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ ldr r1, [r1]
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
+ ENDFUNC
END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c index f055608abc..5cafda8365 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c @@ -97,7 +97,7 @@ ArmPlatformInitialize ( IN UINTN MpId
)
{
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c index 228a0fb0f8..a671f130f2 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c @@ -36,7 +36,7 @@ ArmPlatformSecTrustzoneInit ( )
{
// Nothing to do
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return;
}
@@ -120,7 +120,7 @@ ArmPlatformSecInitialize ( )
{
// If it is not the primary core then there is nothing to do
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMHelper.S deleted file mode 100644 index f47a5312ff..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMHelper.S +++ /dev/null @@ -1,71 +0,0 @@ -#
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http:#opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-#.include AsmMacroIoLib.inc
-
-#include <Chipset/ArmCortexA9.h>
-
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
-
-# IN None
-# OUT r0 = SCU Base Address
-ASM_PFX(ArmGetScuBaseAddress):
- # Read Configuration Base Address Register. ArmCBar cannot be called to get
- # the Configuration BAR as a stack is not necessary setup. The SCU is at the
- # offset 0x0000 from the Private Memory Region.
- mrc p15, 4, r0, c15, c0, 0
- bx lr
-
-# IN None
-# OUT r0 = number of cores present in the system
-ASM_PFX(ArmGetCpuCountPerCluster):
- stmfd SP!, {r1-r2}
-
- # Read CP15 MIDR
- mrc p15, 0, r1, c0, c0, 0
-
- # Check if the CPU is A15
- mov r1, r1, LSR #4
- LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)
- and r1, r1, r0
-
- LoadConstantToReg (ARM_CPU_TYPE_A15, r0)
- cmp r1, r0
- beq _Read_cp15_reg
-
-_CPU_is_not_A15:
- mov r2, lr @ Save link register
- bl ArmGetScuBaseAddress @ Read SCU Base Address
- mov lr, r2 @ Restore link register val
- ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] @ Read SCU Config reg to get CPU count
- b _Return
-
-_Read_cp15_reg:
- mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count
- lsr r0, #24
-
-_Return:
- and r0, r0, #3
- # Add '1' to the number of CPU on the Cluster
- add r0, r0, #1
- ldmfd SP!, {r1-r2}
- bx lr
-
-ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMHelper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMHelper.asm deleted file mode 100644 index 402db58278..0000000000 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/Arm/RTSMHelper.asm +++ /dev/null @@ -1,73 +0,0 @@ -//
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-
-#include <Chipset/ArmCortexA9.h>
-
-#include <AutoGen.h>
-
- INCLUDE AsmMacroIoLib.inc
-
- EXPORT ArmGetCpuCountPerCluster
-
- AREA RTSMHelper, CODE, READONLY
-
-// IN None
-// OUT r0 = SCU Base Address
-ArmGetScuBaseAddress
- // Read Configuration Base Address Register. ArmCBar cannot be called to get
- // the Configuration BAR as a stack is not necessary setup. The SCU is at the
- // offset 0x0000 from the Private Memory Region.
- mrc p15, 4, r0, c15, c0, 0
- bx lr
-
-// IN None
-// OUT r0 = number of cores present in the system
-ArmGetCpuCountPerCluster
- stmfd SP!, {r1-r2}
-
- // Read CP15 MIDR
- mrc p15, 0, r1, c0, c0, 0
-
- // Check if the CPU is A15
- mov r1, r1, LSR #4
- mov r0, #ARM_CPU_TYPE_MASK
- and r1, r1, r0
-
- mov r0, #ARM_CPU_TYPE_A15
- cmp r1, r0
- beq _Read_cp15_reg
-
-_CPU_is_not_A15
- mov r2, lr ; Save link register
- bl ArmGetScuBaseAddress ; Read SCU Base Address
- mov lr, r2 ; Restore link register val
- ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] ; Read SCU Config reg to get CPU count
- b _Return
-
-_Read_cp15_reg
- mrc p15, 1, r0, c9, c0, 2 ; Read C9 register of CP15 to get CPU count
- lsr r0, #24
-
-
-_Return
- and r0, r0, #3
- // Add '1' to the number of CPU on the Cluster
- add r0, r0, #1
- ldmfd SP!, {r1-r2}
- bx lr
-
- END
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf index ff8476718f..f1e29ff01b 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressSecLib.inf @@ -37,8 +37,6 @@ [Sources.ARM]
Arm/RTSMBoot.asm | RVCT
Arm/RTSMBoot.S | GCC
- Arm/RTSMHelper.asm | RVCT
- Arm/RTSMHelper.S | GCC
[FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c index 92df56cd57..bce834eea9 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c @@ -50,7 +50,7 @@ ArmPlatformSecInitialize ( )
{
// If it is not the primary core then there is nothing to do
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/Include/Library/ArmPlatformLib.h b/ArmPlatformPkg/Include/Library/ArmPlatformLib.h index 4ea1445e18..b58ddd5d3f 100644 --- a/ArmPlatformPkg/Include/Library/ArmPlatformLib.h +++ b/ArmPlatformPkg/Include/Library/ArmPlatformLib.h @@ -40,12 +40,36 @@ typedef struct { UINT64 NumberOfBytes;
} ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR;
+/**
+ Return the core position from the value of its MpId register
+
+ This function returns the core position from the position 0 in the processor.
+ This function might be called from assembler before any stack is set.
+
+ @return Return the core position
+
+**/
UINTN
ArmPlatformGetCorePosition (
IN UINTN MpId
);
/**
+ Return a non-zero value if the callee is the primary core
+
+ This function returns a non-zero value if the callee is the primary core.
+ The primary core is the core responsible to initialize the hardware and run UEFI.
+ This function might be called from assembler before any stack is set.
+
+ @return Return a non-zero value if the callee is the primary core.
+
+**/
+UINTN
+ArmPlatformIsPrimaryCore (
+ IN UINTN MpId
+ );
+
+/**
Return the current Boot Mode
This function returns the boot reason on the platform
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S index 286327956a..47bf9c8946 100644 --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S @@ -11,12 +11,17 @@ //
//
+#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
.text
.align 3
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
+GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
+
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
+GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
//UINTN
//ArmPlatformGetCorePosition (
@@ -28,3 +33,18 @@ ASM_PFX(ArmPlatformGetCorePosition): add r0, r1, r0, LSR #7
bx lr
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_PFX(ArmPlatformIsPrimaryCore):
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
+ ldr r1, [r1]
+ and r0, r0, r1
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ ldr r1, [r1]
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm index 620562136e..6d35182a27 100644 --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm @@ -17,7 +17,11 @@ INCLUDE AsmMacroIoLib.inc
EXPORT ArmPlatformGetCorePosition
+ EXPORT ArmPlatformIsPrimaryCore
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
+ IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
+
PRESERVE8
AREA ArmPlatformNullHelper, CODE, READONLY
@@ -32,5 +36,21 @@ ArmPlatformGetCorePosition FUNCTION bx lr
ENDFUNC
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ArmPlatformIsPrimaryCore FUNCTION
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
+ ldr r1, [r1]
+ and r0, r0, r1
+ LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ ldr r1, [r1]
+ cmp r0, r1
+ moveq r0, #1
+ movne r0, #0
+ bx lr
+ ENDFUNC
+
END
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c b/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c index f3a7efcae0..b45c11b4e1 100644 --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.c @@ -97,7 +97,7 @@ ArmPlatformInitialize ( IN UINTN MpId
)
{
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c index 1a83882030..41f4f74085 100644 --- a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c +++ b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c @@ -29,7 +29,7 @@ ArmPlatformSecTrustzoneInit ( )
{
// Secondary cores might have to set the Secure SGIs into the GICD_IGROUPR0
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return;
}
@@ -49,7 +49,7 @@ ArmPlatformSecInitialize ( )
{
// If it is not the primary core then there is nothing to do
- if (!IS_PRIMARY_CORE(MpId)) {
+ if (!ArmPlatformIsPrimaryCore (MpId)) {
return RETURN_SUCCESS;
}
diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c index 9e78d7eadf..f7c3ab214c 100755 --- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c +++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c @@ -16,6 +16,7 @@ #include <Library/ArmLib.h>
#include <Library/ArmGicLib.h>
+#include <Library/ArmPlatformLib.h>
#include <Library/ArmPlatformSecLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
@@ -70,7 +71,7 @@ ArmPlatformSecExtraAction ( // Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
//
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
UINTN* StartAddress = (UINTN*)PcdGet32(PcdFvBaseAddress);
// Patch the DRAM to make an infinite loop at the start address
@@ -96,7 +97,7 @@ ArmPlatformSecExtraAction ( // Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
//
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
// Signal the secondary cores they can jump to PEI phase
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf index 26afb34b23..5a2d28876a 100755 --- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf +++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.inf @@ -30,10 +30,12 @@ [Packages]
MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
[LibraryClasses]
+ ArmPlatformLib
DebugLib
PcdLib
ArmGicLib
@@ -46,9 +48,6 @@ [FixedPcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
-
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S index f902a251c2..1fb8570eb3 100644 --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S @@ -1,5 +1,5 @@ //
-// Copyright (c) 2011, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -20,6 +20,7 @@ .align 3
GCC_ASM_IMPORT(CEntryPoint)
+GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_IMPORT(ArmReadMpidr)
GCC_ASM_EXPORT(_ModuleEntryPoint)
@@ -28,18 +29,19 @@ StartupAddr: .word CEntryPoint ASM_PFX(_ModuleEntryPoint):
// Identify CPU ID
bl ASM_PFX(ArmReadMpidr)
- // Get ID of this CPU in Multicore system
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
- and r5, r0, r1
-
+ // Keep a copy of the MpId register value
+ mov r5, r0
+
+ // Is it the Primary Core ?
+ bl ASM_PFX(ArmPlatformIsPrimaryCore)
+
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
add r1, r1, r2
- // Is it the Primary Core ?
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
- cmp r5, r3
+ // r0 is equal to 1 if I am the primary core
+ cmp r0, #1
beq _SetupPrimaryCoreStack
_SetupSecondaryCoreStack:
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm index a3dd1fb2c6..3b756b492a 100644 --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm @@ -1,5 +1,5 @@ //
-// Copyright (c) 2011, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -19,6 +19,7 @@ INCLUDE AsmMacroIoLib.inc
IMPORT CEntryPoint
+ IMPORT ArmPlatformIsPrimaryCore
IMPORT ArmReadMpidr
EXPORT _ModuleEntryPoint
@@ -30,18 +31,19 @@ StartupAddr DCD CEntryPoint _ModuleEntryPoint
// Identify CPU ID
bl ArmReadMpidr
- // Get ID of this CPU in Multicore system
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
- and r5, r0, r1
+ // Keep a copy of the MpId register value
+ mov r5, r0
+ // Is it the Primary Core ?
+ bl ArmPlatformIsPrimaryCore
+
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
add r1, r1, r2
- // Is it the Primary Core ?
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
- cmp r5, r3
+ // r0 is equal to 1 if I am the primary core
+ cmp r0, #1
beq _SetupPrimaryCoreStack
_SetupSecondaryCoreStack
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c index fdd8697edf..ececd4c763 100644 --- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c +++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c @@ -93,7 +93,7 @@ CEntryPoint ( //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.
// If not primary Jump to Secondary Main
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
// Initialize the Debug Agent for Source Level Debugging
InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
SaveAndSetDebugTimerInterrupt (TRUE);
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf b/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf index 91f9b3a784..4658486336 100644 --- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf +++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf @@ -62,7 +62,6 @@ gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdGicPrimaryCoreId
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf b/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf index bf590dbac0..13f86902b6 100644 --- a/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf +++ b/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf @@ -60,9 +60,6 @@ gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S index c0c20a9206..da654c7a35 100644 --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S @@ -22,6 +22,7 @@ .align 3
GCC_ASM_IMPORT(CEntryPoint)
+GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_IMPORT(ArmReadMpidr)
GCC_ASM_IMPORT(ArmPlatformStackSet)
GCC_ASM_EXPORT(_ModuleEntryPoint)
@@ -32,8 +33,8 @@ StartupAddr: .word CEntryPoint ASM_PFX(_ModuleEntryPoint):
// Get ID of this CPU in Multicore system
bl ASM_PFX(ArmReadMpidr)
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
- and r6, r0, r1
+ // Keep a copy of the MpId register value
+ mov r6, r0
_SetSVCMode:
// Enter SVC mode, Disable FIQ and IRQ
@@ -118,8 +119,9 @@ _GetStackBase: bl ASM_PFX(ArmPlatformStackSet)
// Is it the Primary Core ?
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)
- cmp r6, r4
+ mov r0, r6
+ bl ASM_PFX(ArmPlatformIsPrimaryCore)
+ cmp r0, #1
bne _PrepareArguments
_ReserveGlobalVariable:
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm index 5efdb532af..b78729fbc2 100644 --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm @@ -21,6 +21,7 @@ INCLUDE AsmMacroIoLib.inc
IMPORT CEntryPoint
+ IMPORT ArmPlatformIsPrimaryCore
IMPORT ArmReadMpidr
IMPORT ArmPlatformStackSet
@@ -34,8 +35,8 @@ StartupAddr DCD CEntryPoint _ModuleEntryPoint
// Get ID of this CPU in Multicore system
bl ArmReadMpidr
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
- and r6, r0, r1
+ // Keep a copy of the MpId register value
+ mov r6, r0
_SetSVCMode
// Enter SVC mode, Disable FIQ and IRQ
@@ -120,8 +121,9 @@ _GetStackBase bl ArmPlatformStackSet
// Is it the Primary Core ?
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)
- cmp r6, r4
+ mov r0, r6
+ bl ArmPlatformIsPrimaryCore
+ cmp r0, #1
bne _PrepareArguments
_ReserveGlobalVariable
diff --git a/ArmPlatformPkg/PrePi/PeiMPCore.inf b/ArmPlatformPkg/PrePi/PeiMPCore.inf index 3a3614192a..359e7717ef 100755 --- a/ArmPlatformPkg/PrePi/PeiMPCore.inf +++ b/ArmPlatformPkg/PrePi/PeiMPCore.inf @@ -95,7 +95,6 @@ gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmPlatformTokenSpaceGuid.PcdClusterCount
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
gArmTokenSpaceGuid.PcdGicPrimaryCoreId
diff --git a/ArmPlatformPkg/PrePi/PeiUniCore.inf b/ArmPlatformPkg/PrePi/PeiUniCore.inf index 823a956074..dd6b82ed38 100755 --- a/ArmPlatformPkg/PrePi/PeiUniCore.inf +++ b/ArmPlatformPkg/PrePi/PeiUniCore.inf @@ -90,8 +90,6 @@ gArmPlatformTokenSpaceGuid.PcdCoreCount
gArmPlatformTokenSpaceGuid.PcdClusterCount
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
diff --git a/ArmPlatformPkg/PrePi/PrePi.c b/ArmPlatformPkg/PrePi/PrePi.c index bdeb60d84c..238b0989ab 100755 --- a/ArmPlatformPkg/PrePi/PrePi.c +++ b/ArmPlatformPkg/PrePi/PrePi.c @@ -217,7 +217,7 @@ CEntryPoint ( // Initialize the platform specific controllers
ArmPlatformInitialize (MpId);
- if (IS_PRIMARY_CORE(MpId) && PerformanceMeasurementEnabled ()) {
+ if (ArmPlatformIsPrimaryCore (MpId) && PerformanceMeasurementEnabled ()) {
// Initialize the Timer Library to setup the Timer HW controller
TimerConstructor ();
// We cannot call yet the PerformanceLib because the HOB List has not been initialized
@@ -240,7 +240,7 @@ CEntryPoint ( // Define the Global Variable region when we are not running in XIP
if (!IS_XIP()) {
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
mGlobalVariableBase = GlobalVariableBase;
if (ArmIsMpCore()) {
// Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)
@@ -253,7 +253,7 @@ CEntryPoint ( }
// If not primary Jump to Secondary Main
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
// Goto primary Main.
PrimaryMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
} else {
diff --git a/ArmPlatformPkg/Sec/Arm/Helper.S b/ArmPlatformPkg/Sec/Arm/Helper.S index 4eede5faba..c99987d3a1 100644 --- a/ArmPlatformPkg/Sec/Arm/Helper.S +++ b/ArmPlatformPkg/Sec/Arm/Helper.S @@ -1,10 +1,10 @@ #========================================================================================
-# Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
-# http:#opensource.org/licenses/bsd-license.php
+# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S index 92035a1ffe..07fb71fdcc 100644 --- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S +++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S @@ -1,5 +1,5 @@ //
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -19,6 +19,7 @@ .align 3
GCC_ASM_IMPORT(CEntryPoint)
+GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_IMPORT(ArmPlatformSecBootAction)
GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit)
GCC_ASM_IMPORT(ArmDisableInterrupts)
@@ -45,13 +46,12 @@ ASM_PFX(_ModuleEntryPoint): _IdentifyCpu:
// Identify CPU ID
bl ASM_PFX(ArmReadMpidr)
- // Get ID of this CPU in Multicore system
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
- and r5, r0, r1
+ // Keep a copy of the MpId register value
+ mov r9, r0
// Is it the Primary Core ?
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
- cmp r5, r3
+ bl ASM_PFX(ArmPlatformIsPrimaryCore)
+ cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
@@ -74,9 +74,6 @@ _InitMem: // Initialize Init Boot Memory
bl ASM_PFX(ArmPlatformSecBootMemoryInit)
- // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
-
_SetupPrimaryCoreStack:
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
@@ -97,7 +94,7 @@ _SetupSecondaryCoreStack: add r1, r1, r2
// Get the Core Position (ClusterId * 4) + CoreId
- GetCorePositionFromMpId(r0, r5, r2)
+ GetCorePositionFromMpId(r0, r9, r2)
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
add r0, r0, #1
@@ -115,7 +112,7 @@ _PrepareArguments: // Jump to SEC C code
// r0 = mp_id
// r1 = Boot Mode
- mov r0, r5
+ mov r0, r9
mov r1, r10
blx r3
diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm index 9305e8e529..f89aefd2d6 100644 --- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm +++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm @@ -1,5 +1,5 @@ //
-// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -18,6 +18,7 @@ INCLUDE AsmMacroIoLib.inc
IMPORT CEntryPoint
+ IMPORT ArmPlatformIsPrimaryCore
IMPORT ArmPlatformSecBootAction
IMPORT ArmPlatformSecBootMemoryInit
IMPORT ArmDisableInterrupts
@@ -47,13 +48,12 @@ _ModuleEntryPoint FUNCTION _IdentifyCpu
// Identify CPU ID
bl ArmReadMpidr
- // Get ID of this CPU in Multicore system
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
- and r5, r0, r1
+ // Keep a copy of the MpId register value
+ mov r9, r0
// Is it the Primary Core ?
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
- cmp r5, r3
+ bl ArmPlatformIsPrimaryCore
+ cmp r0, #1
// Only the primary core initialize the memory (SMC)
beq _InitMem
@@ -76,9 +76,6 @@ _InitMem // Initialize Init Boot Memory
bl ArmPlatformSecBootMemoryInit
- // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
- LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
-
_SetupPrimaryCoreStack
// Get the top of the primary stacks (and the base of the secondary stacks)
LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
@@ -99,7 +96,7 @@ _SetupSecondaryCoreStack add r1, r1, r2
// Get the Core Position (ClusterId * 4) + CoreId
- GetCorePositionFromMpId(r0, r5, r2)
+ GetCorePositionFromMpId(r0, r9, r2)
// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
add r0, r0, #1
@@ -117,7 +114,7 @@ _PrepareArguments // Jump to SEC C code
// r0 = mp_id
// r1 = Boot Mode
- mov r0, r5
+ mov r0, r9
mov r1, r10
blx r3
ENDFUNC
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c index 52fa53a647..5282d68ec7 100644 --- a/ArmPlatformPkg/Sec/Sec.c +++ b/ArmPlatformPkg/Sec/Sec.c @@ -56,7 +56,7 @@ CEntryPoint ( ArmPlatformSecInitialize (MpId);
// Primary CPU clears out the SCU tag RAMs, secondaries wait
- if (IS_PRIMARY_CORE(MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) {
+ if (ArmPlatformIsPrimaryCore (MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) {
if (ArmIsMpCore()) {
// Signal for the initial memory is configured (event: BOOT_MEM_INIT)
ArmCallSEV ();
@@ -108,7 +108,7 @@ CEntryPoint ( // Enter Monitor Mode
enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, SecBootMode, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
} else {
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
SerialPrint ("Trust Zone Configuration is disabled\n\r");
}
@@ -147,7 +147,7 @@ TrustedWorldInitialization ( // Setup the Trustzone Chipsets
if (SecBootMode == ARM_SEC_COLD_BOOT) {
- if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmPlatformIsPrimaryCore (MpId)) {
if (ArmIsMpCore()) {
// Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
ArmCallSEV ();
diff --git a/ArmPlatformPkg/Sec/Sec.inf b/ArmPlatformPkg/Sec/Sec.inf index 3cf9f339e0..8e64a73142 100644 --- a/ArmPlatformPkg/Sec/Sec.inf +++ b/ArmPlatformPkg/Sec/Sec.inf @@ -38,6 +38,7 @@ [LibraryClasses]
ArmCpuLib
ArmLib
+ ArmPlatformLib
ArmPlatformSecLib
ArmTrustedMonitorLib
BaseLib
@@ -61,14 +62,11 @@ gArmTokenSpaceGuid.PcdArmNsacr
gArmTokenSpaceGuid.PcdArmNonSecModeTransition
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
- gArmTokenSpaceGuid.PcdArmPrimaryCore
-
gArmTokenSpaceGuid.PcdSecureFvBaseAddress
gArmTokenSpaceGuid.PcdSecureFvSize
gArmTokenSpaceGuid.PcdFvBaseAddress
-
+
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize
diff --git a/ArmPlatformPkg/Sec/SecInternal.h b/ArmPlatformPkg/Sec/SecInternal.h index eeaf40c0c8..255059af5f 100644 --- a/ArmPlatformPkg/Sec/SecInternal.h +++ b/ArmPlatformPkg/Sec/SecInternal.h @@ -19,6 +19,7 @@ #include <Base.h>
#include <Library/ArmLib.h>
#include <Library/ArmCpuLib.h>
+#include <Library/ArmPlatformLib.h>
#include <Library/ArmPlatformSecLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S new file mode 100644 index 0000000000..29c4b5e8ad --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.S @@ -0,0 +1,31 @@ +#
+# Copyright (c) 2012, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#
+
+#include <AsmMacroIoLib.h>
+#include <AutoGen.h>
+
+.text
+.align 2
+
+GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_PFX(ArmPlatformIsPrimaryCore):
+ // BeagleBoard has a single core. We must always return 1.
+ mov r0, #1
+ bx lr
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm new file mode 100644 index 0000000000..35115d0140 --- /dev/null +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardHelper.asm @@ -0,0 +1,36 @@ +//
+// Copyright (c) 2012, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <AsmMacroIoLib.h>
+#include <Base.h>
+
+#include <AutoGen.h>
+
+ INCLUDE AsmMacroIoLib.inc
+
+ EXPORT ArmPlatformIsPrimaryCore
+
+ AREA BeagleBoardHelper, CODE, READONLY
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ArmPlatformIsPrimaryCore FUNCTION
+ // BeagleBoard has a single core. We must always return 1.
+ mov r0, #1
+ bx lr
+ ENDFUNC
+
+ END
+
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf index 7ca98c2bbb..48fab7c66a 100755 --- a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf @@ -39,6 +39,8 @@ BeagleBoardMem.c
PadConfiguration.c
Clock.c
+ BeagleBoardHelper.S | GCC
+ BeagleBoardHelper.asm | RVCT
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