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-rw-r--r--MdePkg/Include/Register/Amd/Fam17Msr.h19
-rw-r--r--MdePkg/Include/Register/Amd/Msr.h3
-rw-r--r--MdePkg/Include/Register/Amd/Svsm.h101
-rw-r--r--MdePkg/Include/Register/Amd/SvsmMsr.h35
4 files changed, 156 insertions, 2 deletions
diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h
index bb4e143e24..f2d5ccb39d 100644
--- a/MdePkg/Include/Register/Amd/Fam17Msr.h
+++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
@@ -6,7 +6,7 @@
returned is a single 32-bit or 64-bit value, then a data structure is not
provided for that MSR.
- Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>
+ Copyright (c) 2017 - 2024, Advanced Micro Devices. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Specification Reference:
@@ -71,9 +71,24 @@ typedef union {
UINT32 ErrorCode;
} SnpPageStateChangeResponse;
+ struct {
+ UINT64 Function : 12;
+ UINT64 Reserved1 : 20;
+ UINT64 Vmpl : 8;
+ UINT64 Reserved2 : 56;
+ } SnpVmplRequest;
+
+ struct {
+ UINT32 Function : 12;
+ UINT32 Reserved : 20;
+ UINT32 ErrorCode;
+ } SnpVmplResponse;
+
VOID *Ghcb;
UINT64 GhcbPhysicalAddress;
+
+ UINT64 Uint64;
} MSR_SEV_ES_GHCB_REGISTER;
#define GHCB_INFO_SEV_INFO 1
@@ -84,6 +99,8 @@ typedef union {
#define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE 19
#define GHCB_INFO_SNP_PAGE_STATE_CHANGE_REQUEST 20
#define GHCB_INFO_SNP_PAGE_STATE_CHANGE_RESPONSE 21
+#define GHCB_INFO_SNP_VMPL_REQUEST 22
+#define GHCB_INFO_SNP_VMPL_RESPONSE 23
#define GHCB_HYPERVISOR_FEATURES_REQUEST 128
#define GHCB_HYPERVISOR_FEATURES_RESPONSE 129
#define GHCB_INFO_TERMINATE_REQUEST 256
diff --git a/MdePkg/Include/Register/Amd/Msr.h b/MdePkg/Include/Register/Amd/Msr.h
index 084eb892cd..04a3cbeb43 100644
--- a/MdePkg/Include/Register/Amd/Msr.h
+++ b/MdePkg/Include/Register/Amd/Msr.h
@@ -6,7 +6,7 @@
returned is a single 32-bit or 64-bit value, then a data structure is not
provided for that MSR.
- Copyright (c) 2017 - 2019, Advanced Micro Devices. All rights reserved.<BR>
+ Copyright (c) 2017 - 2024, Advanced Micro Devices. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Specification Reference:
@@ -19,5 +19,6 @@
#include <Register/Intel/ArchitecturalMsr.h>
#include <Register/Amd/Fam17Msr.h>
+#include <Register/Amd/SvsmMsr.h>
#endif
diff --git a/MdePkg/Include/Register/Amd/Svsm.h b/MdePkg/Include/Register/Amd/Svsm.h
new file mode 100644
index 0000000000..9a989f8031
--- /dev/null
+++ b/MdePkg/Include/Register/Amd/Svsm.h
@@ -0,0 +1,101 @@
+/** @file
+ Secure VM Service Module (SVSM) Definition.
+
+ Provides data types allowing an SEV-SNP guest to interact with the SVSM.
+
+ Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ Secure VM Service Module Specification
+
+**/
+
+#ifndef SVSM_H_
+#define SVSM_H_
+
+#include <Base.h>
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+
+//
+// The SVSM definitions are part of the SNP Secrets Page:
+// An SVSM is considered present if the SvsmSize field is non-zero.
+//
+typedef PACKED struct {
+ UINT8 Reserved1[320];
+
+ UINT64 SvsmBase;
+ UINT64 SvsmSize;
+ UINT64 SvsmCaa;
+ UINT32 SvsmMaxVersion;
+ UINT8 SvsmGuestVmpl;
+ UINT8 Reserved2[3];
+} SVSM_INFORMATION;
+
+typedef PACKED struct {
+ UINT8 SvsmCallPending;
+ UINT8 SvsmMemAvailable;
+ UINT8 Reserved1[6];
+
+ //
+ // The remainder of the CAA 4KB area can be used for argument
+ // passing to the SVSM.
+ //
+ UINT8 SvsmBuffer[SIZE_4KB - 8];
+} SVSM_CAA;
+
+#define SVSM_SUCCESS 0x00000000
+#define SVSM_ERR_INCOMPLETE 0x80000000
+#define SVSM_ERR_UNSUPPORTED_PROTOCOL 0x80000001
+#define SVSM_ERR_UNSUPPORTED_CALL 0x80000002
+#define SVSM_ERR_INVALID_ADDRESS 0x80000003
+#define SVSM_ERR_INVALID_FORMAT 0x80000004
+#define SVSM_ERR_INVALID_PARAMETER 0x80000005
+#define SVSM_ERR_INVALID_REQUEST 0x80000006
+#define SVSM_ERR_BUSY 0x80000007
+
+#define SVSM_ERR_PVALIDATE_FAIL_INPUT 0x80001001
+#define SVSM_ERR_PVALIDATE_FAIL_SIZE_MISMATCH 0x80001006
+#define SVSM_ERR_PVALIDATE_FAIL_NO_CHANGE 0x80001010
+
+typedef PACKED struct {
+ UINT16 Entries;
+ UINT16 Next;
+
+ UINT8 Reserved[4];
+} SVSM_PVALIDATE_HEADER;
+
+typedef union {
+ struct {
+ UINT64 PageSize : 2;
+ UINT64 Action : 1;
+ UINT64 IgnoreCf : 1;
+ UINT64 Reserved_2 : 8;
+ UINT64 Address : 52;
+ } Bits;
+ UINT64 Uint64;
+} SVSM_PVALIDATE_ENTRY;
+
+typedef PACKED struct {
+ SVSM_PVALIDATE_HEADER Header;
+ SVSM_PVALIDATE_ENTRY Entry[];
+} SVSM_PVALIDATE_REQUEST;
+
+#define SVSM_PVALIDATE_MAX_ENTRY \
+ ((sizeof (((SVSM_CAA *)0)->SvsmBuffer) - sizeof (SVSM_PVALIDATE_HEADER)) / sizeof (SVSM_PVALIDATE_ENTRY))
+
+typedef union {
+ SVSM_PVALIDATE_REQUEST PvalidateRequest;
+} SVSM_REQUEST;
+
+typedef union {
+ struct {
+ UINT32 CallId;
+ UINT32 Protocol;
+ } Id;
+
+ UINT64 Uint64;
+} SVSM_FUNCTION;
+
+#endif
diff --git a/MdePkg/Include/Register/Amd/SvsmMsr.h b/MdePkg/Include/Register/Amd/SvsmMsr.h
new file mode 100644
index 0000000000..9e7fca880b
--- /dev/null
+++ b/MdePkg/Include/Register/Amd/SvsmMsr.h
@@ -0,0 +1,35 @@
+/** @file
+ MSR Definitions.
+
+ Provides defines for Machine Specific Registers(MSR) indexes. Data structures
+ are provided for MSRs that contain one or more bit fields. If the MSR value
+ returned is a single 32-bit or 64-bit value, then a data structure is not
+ provided for that MSR.
+
+ Copyright (c) 2024, Advanced Micro Devices. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef SVSM_MSR_H_
+#define SVSM_MSR_H_
+
+/**
+ Secure VM Service Module CAA register
+
+**/
+#define MSR_SVSM_CAA 0xc001f000
+
+/**
+ MSR information returned for #MSR_SVSM_CAA
+**/
+typedef union {
+ struct {
+ UINT32 Lower32Bits;
+ UINT32 Upper32Bits;
+ } Bits;
+
+ UINT64 Uint64;
+} MSR_SVSM_CAA_REGISTER;
+
+#endif