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-rw-r--r--ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S8
-rw-r--r--ArmPkg/Library/ArmLib/AArch64/AArch64Support.S8
-rw-r--r--ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S8
3 files changed, 12 insertions, 12 deletions
diff --git a/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S b/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S
index a15ae03e0f..99a1d21ce7 100644
--- a/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S
+++ b/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S
@@ -18,8 +18,8 @@
GCC_ASM_EXPORT(ArmCallHvc)
ASM_PFX(ArmCallHvc):
- // Push x0 on the stack
- str x0, [sp, #-8]!
+ // Push x0 on the stack - The stack must always be quad-word aligned
+ str x0, [sp, #-16]!
// Load the HVC arguments values into the appropriate registers
ldp x6, x7, [x0, #48]
@@ -30,9 +30,9 @@ ASM_PFX(ArmCallHvc):
hvc #0
// Pop the ARM_HVC_ARGS structure address from the stack into x9
- ldr x9, [sp], #8
+ ldr x9, [sp], #16
- // Store the HVC returned values into the appropriate registers
+ // Store the HVC returned values into the ARM_HVC_ARGS structure.
// A HVC call can return up to 4 values
stp x2, x3, [x9, #16]
stp x0, x1, [x9, #0]
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index 98eba3cac2..bdede48724 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -313,8 +313,8 @@ ASM_PFX(ArmDisableBranchPrediction):
ASM_PFX(AArch64AllDataCachesOperation):
// We can use regs 0-7 and 9-15 without having to save/restore.
-// Save our link register on the stack.
- str x30, [sp, #-0x10]!
+// Save our link register on the stack. - The stack must always be quad-word aligned
+ str x30, [sp, #-16]!
mov x1, x0 // Save Function call in x1
mrs x6, clidr_el1 // Read EL1 CLIDR
and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC)
@@ -326,8 +326,8 @@ ASM_PFX(AArch64AllDataCachesOperation):
ASM_PFX(AArch64PerformPoUDataCacheOperation):
// We can use regs 0-7 and 9-15 without having to save/restore.
-// Save our link register on the stack.
- str x30, [sp, #-0x10]!
+// Save our link register on the stack. - The stack must always be quad-word aligned
+ str x30, [sp, #-16]!
mov x1, x0 // Save Function call in x1
mrs x6, clidr_el1 // Read EL1 CLIDR
and x3, x6, #0x38000000 // Mask out all but Point of Unification (PoU)
diff --git a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
index f73c98cfc3..46c17674c1 100644
--- a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
+++ b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
@@ -17,8 +17,8 @@
GCC_ASM_EXPORT(ArmCallSmc)
ASM_PFX(ArmCallSmc):
- // Push x0 on the stack
- str x0, [sp, #-8]!
+ // Push x0 on the stack - The stack must always be quad-word aligned
+ str x0, [sp, #-16]!
// Load the SMC arguments values into the appropriate registers
ldp x6, x7, [x0, #48]
@@ -29,9 +29,9 @@ ASM_PFX(ArmCallSmc):
smc #0
// Pop the ARM_SMC_ARGS structure address from the stack into x9
- ldr x9, [sp], #8
+ ldr x9, [sp], #16
- // Store the SMC returned values into the appropriate registers
+ // Store the SMC returned values into the ARM_SMC_ARGS structure.
// A SMC call can return up to 4 values - we do not need to store back x4-x7.
stp x2, x3, [x9, #16]
stp x0, x1, [x9, #0]