diff options
Diffstat (limited to 'ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c')
| -rw-r--r-- | ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c | 180 |
1 files changed, 94 insertions, 86 deletions
diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c index 3c58a0f39a..60f9bc5fb0 100644 --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c @@ -25,7 +25,7 @@ // EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE is the only
// control bit that is not supported.
//
-STATIC CONST UINT32 mInvalidControlBits = EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;
+STATIC CONST UINT32 mInvalidControlBits = EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;
/**
@@ -73,16 +73,16 @@ PL011UartInitializePort ( IN OUT EFI_STOP_BITS_TYPE *StopBits
)
{
- UINT32 LineControl;
- UINT32 Divisor;
- UINT32 Integer;
- UINT32 Fractional;
- UINT32 HardwareFifoDepth;
- UINT32 UartPid2;
+ UINT32 LineControl;
+ UINT32 Divisor;
+ UINT32 Integer;
+ UINT32 Fractional;
+ UINT32 HardwareFifoDepth;
+ UINT32 UartPid2;
HardwareFifoDepth = FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth);
if (HardwareFifoDepth == 0) {
- UartPid2 = MmioRead32 (UartBase + UARTPID2);
+ UartPid2 = MmioRead32 (UartBase + UARTPID2);
HardwareFifoDepth = (PL011_UARTPID2_VER (UartPid2) > PL011_VER_R1P4) ? 32 : 16;
}
@@ -91,7 +91,7 @@ PL011UartInitializePort ( // down, there is no maximum FIFO size.
if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= HardwareFifoDepth)) {
// Enable FIFO
- LineControl = PL011_UARTLCR_H_FEN;
+ LineControl = PL011_UARTLCR_H_FEN;
*ReceiveFifoDepth = HardwareFifoDepth;
} else {
// Disable FIFO
@@ -104,67 +104,67 @@ PL011UartInitializePort ( // Parity
//
switch (*Parity) {
- case DefaultParity:
- *Parity = NoParity;
- case NoParity:
- // Nothing to do. Parity is disabled by default.
- break;
- case EvenParity:
- LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_EPS);
- break;
- case OddParity:
- LineControl |= PL011_UARTLCR_H_PEN;
- break;
- case MarkParity:
- LineControl |= ( PL011_UARTLCR_H_PEN \
- | PL011_UARTLCR_H_SPS \
- | PL011_UARTLCR_H_EPS);
- break;
- case SpaceParity:
- LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS);
- break;
- default:
- return RETURN_INVALID_PARAMETER;
+ case DefaultParity:
+ *Parity = NoParity;
+ case NoParity:
+ // Nothing to do. Parity is disabled by default.
+ break;
+ case EvenParity:
+ LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_EPS);
+ break;
+ case OddParity:
+ LineControl |= PL011_UARTLCR_H_PEN;
+ break;
+ case MarkParity:
+ LineControl |= (PL011_UARTLCR_H_PEN \
+ | PL011_UARTLCR_H_SPS \
+ | PL011_UARTLCR_H_EPS);
+ break;
+ case SpaceParity:
+ LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS);
+ break;
+ default:
+ return RETURN_INVALID_PARAMETER;
}
//
// Data Bits
//
switch (*DataBits) {
- case 0:
- *DataBits = 8;
- case 8:
- LineControl |= PL011_UARTLCR_H_WLEN_8;
- break;
- case 7:
- LineControl |= PL011_UARTLCR_H_WLEN_7;
- break;
- case 6:
- LineControl |= PL011_UARTLCR_H_WLEN_6;
- break;
- case 5:
- LineControl |= PL011_UARTLCR_H_WLEN_5;
- break;
- default:
- return RETURN_INVALID_PARAMETER;
+ case 0:
+ *DataBits = 8;
+ case 8:
+ LineControl |= PL011_UARTLCR_H_WLEN_8;
+ break;
+ case 7:
+ LineControl |= PL011_UARTLCR_H_WLEN_7;
+ break;
+ case 6:
+ LineControl |= PL011_UARTLCR_H_WLEN_6;
+ break;
+ case 5:
+ LineControl |= PL011_UARTLCR_H_WLEN_5;
+ break;
+ default:
+ return RETURN_INVALID_PARAMETER;
}
//
// Stop Bits
//
switch (*StopBits) {
- case DefaultStopBits:
- *StopBits = OneStopBit;
- case OneStopBit:
- // Nothing to do. One stop bit is enabled by default.
- break;
- case TwoStopBits:
- LineControl |= PL011_UARTLCR_H_STP2;
- break;
- case OneFiveStopBits:
+ case DefaultStopBits:
+ *StopBits = OneStopBit;
+ case OneStopBit:
+ // Nothing to do. One stop bit is enabled by default.
+ break;
+ case TwoStopBits:
+ LineControl |= PL011_UARTLCR_H_STP2;
+ break;
+ case OneFiveStopBits:
// Only 1 or 2 stop bits are supported
- default:
- return RETURN_INVALID_PARAMETER;
+ default:
+ return RETURN_INVALID_PARAMETER;
}
// Don't send the LineControl value to the PL011 yet,
@@ -178,7 +178,7 @@ PL011UartInitializePort ( // If PL011 Integer value has been defined then always ignore the BAUD rate
if (FixedPcdGet32 (PL011UartInteger) != 0) {
- Integer = FixedPcdGet32 (PL011UartInteger);
+ Integer = FixedPcdGet32 (PL011UartInteger);
Fractional = FixedPcdGet32 (PL011UartFractional);
} else {
// If BAUD rate is zero then replace it with the system default value
@@ -188,12 +188,13 @@ PL011UartInitializePort ( return RETURN_INVALID_PARAMETER;
}
}
+
if (0 == UartClkInHz) {
return RETURN_INVALID_PARAMETER;
}
- Divisor = (UartClkInHz * 4) / *BaudRate;
- Integer = Divisor >> FRACTION_PART_SIZE_IN_BITS;
+ Divisor = (UartClkInHz * 4) / *BaudRate;
+ Integer = Divisor >> FRACTION_PART_SIZE_IN_BITS;
Fractional = Divisor & FRACTION_PART_MASK;
}
@@ -202,15 +203,17 @@ PL011UartInitializePort ( // and re-initialize only if the settings are different.
//
if (((MmioRead32 (UartBase + UARTCR) & PL011_UARTCR_UARTEN) != 0) &&
- (MmioRead32 (UartBase + UARTLCR_H) == LineControl) &&
- (MmioRead32 (UartBase + UARTIBRD) == Integer) &&
- (MmioRead32 (UartBase + UARTFBRD) == Fractional)) {
+ (MmioRead32 (UartBase + UARTLCR_H) == LineControl) &&
+ (MmioRead32 (UartBase + UARTIBRD) == Integer) &&
+ (MmioRead32 (UartBase + UARTFBRD) == Fractional))
+ {
// Nothing to do - already initialized with correct attributes
return RETURN_SUCCESS;
}
// Wait for the end of transmission
- while ((MmioRead32 (UartBase + UARTFR) & PL011_UARTFR_TXFE) == 0);
+ while ((MmioRead32 (UartBase + UARTFR) & PL011_UARTFR_TXFE) == 0) {
+ }
// Disable UART: "The UARTLCR_H, UARTIBRD, and UARTFBRD registers must not be changed
// when the UART is enabled"
@@ -227,8 +230,10 @@ PL011UartInitializePort ( MmioWrite32 (UartBase + UARTECR, 0);
// Enable Tx, Rx, and UART overall
- MmioWrite32 (UartBase + UARTCR,
- PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN);
+ MmioWrite32 (
+ UartBase + UARTCR,
+ PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN
+ );
return RETURN_SUCCESS;
}
@@ -263,8 +268,8 @@ PL011UartInitializePort ( RETURN_STATUS
EFIAPI
PL011UartSetControl (
- IN UINTN UartBase,
- IN UINT32 Control
+ IN UINTN UartBase,
+ IN UINT32 Control
)
{
UINT32 Bits;
@@ -340,15 +345,14 @@ PL011UartSetControl ( RETURN_STATUS
EFIAPI
PL011UartGetControl (
- IN UINTN UartBase,
- OUT UINT32 *Control
+ IN UINTN UartBase,
+ OUT UINT32 *Control
)
{
- UINT32 FlagRegister;
- UINT32 ControlRegister;
+ UINT32 FlagRegister;
+ UINT32 ControlRegister;
-
- FlagRegister = MmioRead32 (UartBase + UARTFR);
+ FlagRegister = MmioRead32 (UartBase + UARTFR);
ControlRegister = MmioRead32 (UartBase + UARTCR);
*Control = 0;
@@ -386,7 +390,8 @@ PL011UartGetControl ( }
if ((ControlRegister & (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN))
- == (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN)) {
+ == (PL011_UARTCR_CTSEN | PL011_UARTCR_RTSEN))
+ {
*Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE;
}
@@ -410,16 +415,17 @@ PL011UartGetControl ( UINTN
EFIAPI
PL011UartWrite (
- IN UINTN UartBase,
- IN UINT8 *Buffer,
- IN UINTN NumberOfBytes
+ IN UINTN UartBase,
+ IN UINT8 *Buffer,
+ IN UINTN NumberOfBytes
)
{
- UINT8* CONST Final = &Buffer[NumberOfBytes];
+ UINT8 *CONST Final = &Buffer[NumberOfBytes];
while (Buffer < Final) {
// Wait until UART able to accept another char
- while ((MmioRead32 (UartBase + UARTFR) & UART_TX_FULL_FLAG_MASK));
+ while ((MmioRead32 (UartBase + UARTFR) & UART_TX_FULL_FLAG_MASK)) {
+ }
MmioWrite8 (UartBase + UARTDR, *Buffer++);
}
@@ -440,15 +446,17 @@ PL011UartWrite ( UINTN
EFIAPI
PL011UartRead (
- IN UINTN UartBase,
- OUT UINT8 *Buffer,
- IN UINTN NumberOfBytes
+ IN UINTN UartBase,
+ OUT UINT8 *Buffer,
+ IN UINTN NumberOfBytes
)
{
- UINTN Count;
+ UINTN Count;
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
- while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0);
+ while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0) {
+ }
+
*Buffer = MmioRead8 (UartBase + UARTDR);
}
@@ -465,7 +473,7 @@ PL011UartRead ( BOOLEAN
EFIAPI
PL011UartPoll (
- IN UINTN UartBase
+ IN UINTN UartBase
)
{
return ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) == 0);
|