diff options
Diffstat (limited to 'ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c')
| -rw-r--r-- | ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c | 64 |
1 files changed, 39 insertions, 25 deletions
diff --git a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c index 9b4a02045a..3f3f7019f1 100644 --- a/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c +++ b/ArmPlatformPkg/Library/PL111Lcd/PL111Lcd.c @@ -1,6 +1,6 @@ -/** @file PL111Lcd.c
+/** @file
- Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -19,13 +19,10 @@ #include "PL111Lcd.h"
-/**********************************************************************
- *
- * This file contains all the bits of the PL111 that are
- * platform independent.
- *
- **********************************************************************/
+/** This file contains all the bits of the PL111 that are
+ platform independent.
+**/
EFI_STATUS
LcdIdentify (
VOID
@@ -54,11 +51,11 @@ LcdInitialize ( )
{
// Define start of the VRAM. This never changes for any graphics mode
- MmioWrite32(PL111_REG_LCD_UP_BASE, (UINT32) VramBaseAddress);
- MmioWrite32(PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer
+ MmioWrite32 (PL111_REG_LCD_UP_BASE, (UINT32)VramBaseAddress);
+ MmioWrite32 (PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer
// Disable all interrupts from the PL111
- MmioWrite32(PL111_REG_LCD_IMSC, 0);
+ MmioWrite32 (PL111_REG_LCD_IMSC, 0);
return EFI_SUCCESS;
}
@@ -81,37 +78,54 @@ LcdSetMode ( LCD_BPP LcdBpp;
// Set the video mode timings and other relevant information
- Status = LcdPlatformGetTimings (ModeNumber,
- &HRes,&HSync,&HBackPorch,&HFrontPorch,
- &VRes,&VSync,&VBackPorch,&VFrontPorch);
+ Status = LcdPlatformGetTimings (
+ ModeNumber,
+ &HRes,
+ &HSync,
+ &HBackPorch,
+ &HFrontPorch,
+ &VRes,
+ &VSync,
+ &VBackPorch,
+ &VFrontPorch
+ );
ASSERT_EFI_ERROR (Status);
- if (EFI_ERROR( Status )) {
+ if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
- Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);
+ Status = LcdPlatformGetBpp (ModeNumber, &LcdBpp);
ASSERT_EFI_ERROR (Status);
- if (EFI_ERROR( Status )) {
+ if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
}
// Disable the CLCD_LcdEn bit
- LcdControl = MmioRead32( PL111_REG_LCD_CONTROL);
- MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl & ~1);
+ LcdControl = MmioRead32 (PL111_REG_LCD_CONTROL);
+ MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl & ~1);
// Set Timings
- MmioWrite32 (PL111_REG_LCD_TIMING_0, HOR_AXIS_PANEL(HBackPorch, HFrontPorch, HSync, HRes));
- MmioWrite32 (PL111_REG_LCD_TIMING_1, VER_AXIS_PANEL(VBackPorch, VFrontPorch, VSync, VRes));
- MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY(HRes));
+ MmioWrite32 (
+ PL111_REG_LCD_TIMING_0,
+ HOR_AXIS_PANEL (HBackPorch, HFrontPorch, HSync, HRes)
+ );
+
+ MmioWrite32 (
+ PL111_REG_LCD_TIMING_1,
+ VER_AXIS_PANEL (VBackPorch, VFrontPorch, VSync, VRes)
+ );
+
+ MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY (HRes));
MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);
// PL111_REG_LCD_CONTROL
- LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP(LcdBpp) | PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;
- MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl);
+ LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP (LcdBpp) |
+ PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;
+ MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);
// Turn on power to the LCD Panel
LcdControl |= PL111_CTRL_LCD_PWR;
- MmioWrite32(PL111_REG_LCD_CONTROL, LcdControl);
+ MmioWrite32 (PL111_REG_LCD_CONTROL, LcdControl);
return EFI_SUCCESS;
}
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