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-rw-r--r--ArmPlatformPkg/Sec/Sec.c22
1 files changed, 6 insertions, 16 deletions
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 00293f0d00..f9746ad891 100644
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -19,7 +19,6 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SerialPortLib.h>
#include <Library/ArmGicLib.h>
-#include <Library/ArmCpuLib.h>
#include "SecInternal.h"
@@ -50,7 +49,11 @@ CEntryPoint (
if (FixedPcdGet32 (PcdVFPEnabled)) {
ArmEnableVFP();
}
-
+
+ // Initialize peripherals that must be done at the early stage
+ // Example: Some L2 controller, interconnect, clock, DMC, etc
+ ArmPlatformSecInitialize (MpId);
+
// Primary CPU clears out the SCU tag RAMs, secondaries wait
if (IS_PRIMARY_CORE(MpId)) {
if (ArmIsMpCore()) {
@@ -93,19 +96,6 @@ CEntryPoint (
// Enable Full Access to CoProcessors
ArmWriteCpacr (CPACR_CP_FULL_ACCESS);
- if (IS_PRIMARY_CORE(MpId)) {
- // Initialize peripherals that must be done at the early stage
- // Example: Some L2x0 controllers must be initialized in Secure World
- ArmPlatformSecInitialize ();
-
- // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
- // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
- if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
- // Initialize system memory (DRAM)
- ArmPlatformInitializeSystemMemory ();
- }
- }
-
// Test if Trustzone is supported on this platform
if (FixedPcdGetBool (PcdTrustzoneSupport)) {
if (ArmIsMpCore()) {
@@ -155,7 +145,7 @@ TrustedWorldInitialization (
ArmGicSetupNonSecure (MpId, PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
// Initialize platform specific security policy
- ArmPlatformTrustzoneInit (MpId);
+ ArmPlatformSecTrustzoneInit (MpId);
// Setup the Trustzone Chipsets
if (IS_PRIMARY_CORE(MpId)) {