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Diffstat (limited to 'MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c')
-rw-r--r--MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c592
1 files changed, 297 insertions, 295 deletions
diff --git a/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c b/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c
index cd1f87911b..37dd9012e2 100644
--- a/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c
+++ b/MdeModulePkg/Bus/Pci/EhciPei/EhcPeim.c
@@ -15,19 +15,19 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
// to the UEFI protocol's port state (change).
//
USB_PORT_STATE_MAP mUsbPortStateMap[] = {
- {PORTSC_CONN, USB_PORT_STAT_CONNECTION},
- {PORTSC_ENABLED, USB_PORT_STAT_ENABLE},
- {PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND},
- {PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT},
- {PORTSC_RESET, USB_PORT_STAT_RESET},
- {PORTSC_POWER, USB_PORT_STAT_POWER},
- {PORTSC_OWNER, USB_PORT_STAT_OWNER}
+ { PORTSC_CONN, USB_PORT_STAT_CONNECTION },
+ { PORTSC_ENABLED, USB_PORT_STAT_ENABLE },
+ { PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND },
+ { PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT },
+ { PORTSC_RESET, USB_PORT_STAT_RESET },
+ { PORTSC_POWER, USB_PORT_STAT_POWER },
+ { PORTSC_OWNER, USB_PORT_STAT_OWNER }
};
USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
- {PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION},
- {PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE},
- {PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT}
+ { PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION },
+ { PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE },
+ { PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT }
};
/**
@@ -41,11 +41,11 @@ USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
**/
UINT32
EhcReadOpReg (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
ASSERT (Ehc->CapLen != 0);
@@ -64,16 +64,14 @@ EhcReadOpReg (
**/
VOID
EhcWriteOpReg (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Data
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Data
)
{
-
ASSERT (Ehc->CapLen != 0);
- MmioWrite32(Ehc->UsbHostControllerBaseAddress + Ehc->CapLen + Offset, Data);
-
+ MmioWrite32 (Ehc->UsbHostControllerBaseAddress + Ehc->CapLen + Offset, Data);
}
/**
@@ -86,12 +84,12 @@ EhcWriteOpReg (
**/
VOID
EhcSetOpRegBit (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = EhcReadOpReg (Ehc, Offset);
Data |= Bit;
@@ -108,12 +106,12 @@ EhcSetOpRegBit (
**/
VOID
EhcClearOpRegBit (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit
)
{
- UINT32 Data;
+ UINT32 Data;
Data = EhcReadOpReg (Ehc, Offset);
Data &= ~Bit;
@@ -136,14 +134,14 @@ EhcClearOpRegBit (
**/
EFI_STATUS
EhcWaitOpRegBit (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset,
- IN UINT32 Bit,
- IN BOOLEAN WaitToSet,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset,
+ IN UINT32 Bit,
+ IN BOOLEAN WaitToSet,
+ IN UINT32 Timeout
)
{
- UINT32 Index;
+ UINT32 Index;
for (Index = 0; Index < Timeout / EHC_SYNC_POLL_INTERVAL + 1; Index++) {
if (EHC_REG_BIT_IS_SET (Ehc, Offset, Bit) == WaitToSet) {
@@ -167,13 +165,13 @@ EhcWaitOpRegBit (
**/
UINT32
EhcReadCapRegister (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Offset
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Offset
)
{
- UINT32 Data;
+ UINT32 Data;
- Data = MmioRead32(Ehc->UsbHostControllerBaseAddress + Offset);
+ Data = MmioRead32 (Ehc->UsbHostControllerBaseAddress + Offset);
return Data;
}
@@ -191,12 +189,12 @@ EhcReadCapRegister (
**/
EFI_STATUS
EhcSetAndWaitDoorBell (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
- UINT32 Data;
+ EFI_STATUS Status;
+ UINT32 Data;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_IAAD);
@@ -224,7 +222,7 @@ EhcSetAndWaitDoorBell (
**/
VOID
EhcAckAllInterrupt (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
EhcWriteOpReg (Ehc, EHC_USBSTS_OFFSET, USBSTS_INTACK_MASK);
@@ -243,11 +241,11 @@ EhcAckAllInterrupt (
**/
EFI_STATUS
EhcEnablePeriodSchd (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_PERIOD);
@@ -267,11 +265,11 @@ EhcEnablePeriodSchd (
**/
EFI_STATUS
EhcEnableAsyncSchd (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_ENABLE_ASYNC);
@@ -290,7 +288,7 @@ EhcEnableAsyncSchd (
**/
BOOLEAN
EhcIsHalt (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT);
@@ -307,7 +305,7 @@ EhcIsHalt (
**/
BOOLEAN
EhcIsSysError (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
return EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR);
@@ -325,11 +323,11 @@ EhcIsSysError (
**/
EFI_STATUS
EhcResetHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Host can only be reset when it is halt. If not so, halt it
@@ -359,11 +357,11 @@ EhcResetHC (
**/
EFI_STATUS
EhcHaltHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcClearOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, TRUE, Timeout);
@@ -382,11 +380,11 @@ EhcHaltHC (
**/
EFI_STATUS
EhcRunHC (
- IN PEI_USB2_HC_DEV *Ehc,
- IN UINT32 Timeout
+ IN PEI_USB2_HC_DEV *Ehc,
+ IN UINT32 Timeout
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
EhcSetOpRegBit (Ehc, EHC_USBCMD_OFFSET, USBCMD_RUN);
Status = EhcWaitOpRegBit (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT, FALSE, Timeout);
@@ -401,12 +399,12 @@ EhcRunHC (
**/
VOID
EhcPowerOnAllPorts (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
- UINT8 PortNumber;
- UINT8 Index;
- UINT32 RegVal;
+ UINT8 PortNumber;
+ UINT8 Index;
+ UINT32 RegVal;
PortNumber = (UINT8)(Ehc->HcStructParams & HCSP_NPORTS);
for (Index = 0; Index < PortNumber; Index++) {
@@ -414,7 +412,7 @@ EhcPowerOnAllPorts (
// Do not clear port status bits on initialization. Otherwise devices will
// not enumerate properly at startup.
//
- RegVal = EhcReadOpReg(Ehc, EHC_PORT_STAT_OFFSET + 4 * Index);
+ RegVal = EhcReadOpReg (Ehc, EHC_PORT_STAT_OFFSET + 4 * Index);
RegVal &= ~PORTSC_CHANGE_MASK;
RegVal |= PORTSC_POWER;
EhcWriteOpReg (Ehc, EHC_PORT_STAT_OFFSET + 4 * Index, RegVal);
@@ -438,12 +436,12 @@ EhcPowerOnAllPorts (
**/
EFI_STATUS
EhcInitHC (
- IN PEI_USB2_HC_DEV *Ehc
+ IN PEI_USB2_HC_DEV *Ehc
)
{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS TempPtr;
- UINTN PageNumber;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS TempPtr;
+ UINTN PageNumber;
ASSERT (EhcIsHalt (Ehc));
@@ -454,13 +452,14 @@ EhcInitHC (
if (Ehc->PeriodFrame != NULL) {
EhcFreeSched (Ehc);
}
- PageNumber = sizeof(PEI_URB)/PAGESIZE +1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- PageNumber,
- &TempPtr
- );
- Ehc->Urb = (PEI_URB *) ((UINTN) TempPtr);
+
+ PageNumber = sizeof (PEI_URB)/PAGESIZE +1;
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ PageNumber,
+ &TempPtr
+ );
+ Ehc->Urb = (PEI_URB *)((UINTN)TempPtr);
if (Ehc->Urb == NULL) {
return Status;
}
@@ -473,6 +472,7 @@ EhcInitHC (
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// 1. Program the CTRLDSSEGMENT register with the high 32 bit addr
//
@@ -563,15 +563,16 @@ EhcBulkTransfer (
OUT UINT32 *TransferResult
)
{
- PEI_USB2_HC_DEV *Ehc;
- PEI_URB *Urb;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ PEI_URB *Urb;
+ EFI_STATUS Status;
//
// Validate the parameters
//
if ((DataLength == NULL) || (*DataLength == 0) ||
- (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
+ (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -581,11 +582,12 @@ EhcBulkTransfer (
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
- ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {
+ ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)))
+ {
return EFI_INVALID_PARAMETER;
}
- Ehc =PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(This);
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
*TransferResult = EFI_USB_ERR_SYSTEM;
Status = EFI_DEVICE_ERROR;
@@ -656,13 +658,13 @@ ON_EXIT:
EFI_STATUS
EFIAPI
EhcGetRootHubPortNumber (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- OUT UINT8 *PortNumber
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ OUT UINT8 *PortNumber
)
{
+ PEI_USB2_HC_DEV *EhcDev;
- PEI_USB2_HC_DEV *EhcDev;
EhcDev = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
if (PortNumber == NULL) {
@@ -671,7 +673,6 @@ EhcGetRootHubPortNumber (
*PortNumber = (UINT8)(EhcDev->HcStructParams & HCSP_NPORTS);
return EFI_SUCCESS;
-
}
/**
@@ -692,20 +693,20 @@ EhcGetRootHubPortNumber (
EFI_STATUS
EFIAPI
EhcClearRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- PEI_USB2_HC_DEV *Ehc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ EFI_STATUS Status;
- Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
- Status = EFI_SUCCESS;
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -714,82 +715,82 @@ EhcClearRootHubPortFeature (
goto ON_EXIT;
}
- Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);
- State = EhcReadOpReg (Ehc, Offset);
+ Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);
+ State = EhcReadOpReg (Ehc, Offset);
State &= ~PORTSC_CHANGE_MASK;
switch (PortFeature) {
- case EfiUsbPortEnable:
- //
- // Clear PORT_ENABLE feature means disable port.
- //
- State &= ~PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnable:
+ //
+ // Clear PORT_ENABLE feature means disable port.
+ //
+ State &= ~PORTSC_ENABLED;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortSuspend:
- //
- // A write of zero to this bit is ignored by the host
- // controller. The host controller will unconditionally
- // set this bit to a zero when:
- // 1. software sets the Forct Port Resume bit to a zero from a one.
- // 2. software sets the Port Reset bit to a one frome a zero.
- //
- State &= ~PORSTSC_RESUME;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortSuspend:
+ //
+ // A write of zero to this bit is ignored by the host
+ // controller. The host controller will unconditionally
+ // set this bit to a zero when:
+ // 1. software sets the Forct Port Resume bit to a zero from a one.
+ // 2. software sets the Port Reset bit to a one frome a zero.
+ //
+ State &= ~PORSTSC_RESUME;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortReset:
- //
- // Clear PORT_RESET means clear the reset signal.
- //
- State &= ~PORTSC_RESET;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortReset:
+ //
+ // Clear PORT_RESET means clear the reset signal.
+ //
+ State &= ~PORTSC_RESET;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortOwner:
- //
- // Clear port owner means this port owned by EHC
- //
- State &= ~PORTSC_OWNER;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortOwner:
+ //
+ // Clear port owner means this port owned by EHC
+ //
+ State &= ~PORTSC_OWNER;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortConnectChange:
- //
- // Clear connect status change
- //
- State |= PORTSC_CONN_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortConnectChange:
+ //
+ // Clear connect status change
+ //
+ State |= PORTSC_CONN_CHANGE;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortEnableChange:
- //
- // Clear enable status change
- //
- State |= PORTSC_ENABLE_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnableChange:
+ //
+ // Clear enable status change
+ //
+ State |= PORTSC_ENABLE_CHANGE;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortOverCurrentChange:
- //
- // Clear PortOverCurrent change
- //
- State |= PORTSC_OVERCUR_CHANGE;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortOverCurrentChange:
+ //
+ // Clear PortOverCurrent change
+ //
+ State |= PORTSC_OVERCUR_CHANGE;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortPower:
- case EfiUsbPortSuspendChange:
- case EfiUsbPortResetChange:
- //
- // Not supported or not related operation
- //
- break;
+ case EfiUsbPortPower:
+ case EfiUsbPortSuspendChange:
+ case EfiUsbPortResetChange:
+ //
+ // Not supported or not related operation
+ //
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
- break;
+ default:
+ Status = EFI_INVALID_PARAMETER;
+ break;
}
ON_EXIT:
@@ -812,20 +813,20 @@ ON_EXIT:
EFI_STATUS
EFIAPI
EhcSetRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
)
{
- PEI_USB2_HC_DEV *Ehc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ EFI_STATUS Status;
- Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
- Status = EFI_SUCCESS;
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -834,8 +835,8 @@ EhcSetRootHubPortFeature (
goto ON_EXIT;
}
- Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));
- State = EhcReadOpReg (Ehc, Offset);
+ Offset = (UINT32)(EHC_PORT_STAT_OFFSET + (4 * PortNumber));
+ State = EhcReadOpReg (Ehc, Offset);
//
// Mask off the port status change bits, these bits are
@@ -844,54 +845,54 @@ EhcSetRootHubPortFeature (
State &= ~PORTSC_CHANGE_MASK;
switch (PortFeature) {
- case EfiUsbPortEnable:
- //
- // Sofeware can't set this bit, Port can only be enable by
- // EHCI as a part of the reset and enable
- //
- State |= PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortEnable:
+ //
+ // Sofeware can't set this bit, Port can only be enable by
+ // EHCI as a part of the reset and enable
+ //
+ State |= PORTSC_ENABLED;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortSuspend:
- State |= PORTSC_SUSPEND;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortSuspend:
+ State |= PORTSC_SUSPEND;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortReset:
- //
- // Make sure Host Controller not halt before reset it
- //
- if (EhcIsHalt (Ehc)) {
- Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
+ case EfiUsbPortReset:
+ //
+ // Make sure Host Controller not halt before reset it
+ //
+ if (EhcIsHalt (Ehc)) {
+ Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);
- if (EFI_ERROR (Status)) {
- break;
+ if (EFI_ERROR (Status)) {
+ break;
+ }
}
- }
- //
- // Set one to PortReset bit must also set zero to PortEnable bit
- //
- State |= PORTSC_RESET;
- State &= ~PORTSC_ENABLED;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ //
+ // Set one to PortReset bit must also set zero to PortEnable bit
+ //
+ State |= PORTSC_RESET;
+ State &= ~PORTSC_ENABLED;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- case EfiUsbPortPower:
- //
- // Not supported, ignore the operation
- //
- Status = EFI_SUCCESS;
- break;
+ case EfiUsbPortPower:
+ //
+ // Not supported, ignore the operation
+ //
+ Status = EFI_SUCCESS;
+ break;
- case EfiUsbPortOwner:
- State |= PORTSC_OWNER;
- EhcWriteOpReg (Ehc, Offset, State);
- break;
+ case EfiUsbPortOwner:
+ State |= PORTSC_OWNER;
+ EhcWriteOpReg (Ehc, Offset, State);
+ break;
- default:
- Status = EFI_INVALID_PARAMETER;
+ default:
+ Status = EFI_INVALID_PARAMETER;
}
ON_EXIT:
@@ -914,26 +915,26 @@ ON_EXIT:
EFI_STATUS
EFIAPI
EhcGetRootHubPortStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB2_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB2_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
)
{
- PEI_USB2_HC_DEV *Ehc;
- UINT32 Offset;
- UINT32 State;
- UINT32 TotalPort;
- UINTN Index;
- UINTN MapSize;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ UINT32 Offset;
+ UINT32 State;
+ UINT32 TotalPort;
+ UINTN Index;
+ UINTN MapSize;
+ EFI_STATUS Status;
if (PortStatus == NULL) {
return EFI_INVALID_PARAMETER;
}
- Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(This);
- Status = EFI_SUCCESS;
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
+ Status = EFI_SUCCESS;
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);
@@ -942,11 +943,11 @@ EhcGetRootHubPortStatus (
goto ON_EXIT;
}
- Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));
- PortStatus->PortStatus = 0;
- PortStatus->PortChangeStatus = 0;
+ Offset = (UINT32)(EHC_PORT_STAT_OFFSET + (4 * PortNumber));
+ PortStatus->PortStatus = 0;
+ PortStatus->PortChangeStatus = 0;
- State = EhcReadOpReg (Ehc, Offset);
+ State = EhcReadOpReg (Ehc, Offset);
//
// Identify device speed. If in K state, it is low speed.
@@ -956,7 +957,6 @@ EhcGetRootHubPortStatus (
//
if (EHC_BIT_IS_SET (State, PORTSC_LINESTATE_K)) {
PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
-
} else if (EHC_BIT_IS_SET (State, PORTSC_ENABLED)) {
PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
}
@@ -968,7 +968,7 @@ EhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (EHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
- PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
+ PortStatus->PortStatus = (UINT16)(PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
}
}
@@ -976,7 +976,7 @@ EhcGetRootHubPortStatus (
for (Index = 0; Index < MapSize; Index++) {
if (EHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
- PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
+ PortStatus->PortChangeStatus = (UINT16)(PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
}
}
@@ -1027,10 +1027,10 @@ EhcControlTransfer (
OUT UINT32 *TransferResult
)
{
- PEI_USB2_HC_DEV *Ehc;
- PEI_URB *Urb;
- UINT8 Endpoint;
- EFI_STATUS Status;
+ PEI_USB2_HC_DEV *Ehc;
+ PEI_URB *Urb;
+ UINT8 Endpoint;
+ EFI_STATUS Status;
//
// Validate parameters
@@ -1041,33 +1041,37 @@ EhcControlTransfer (
if ((TransferDirection != EfiUsbDataIn) &&
(TransferDirection != EfiUsbDataOut) &&
- (TransferDirection != EfiUsbNoData)) {
+ (TransferDirection != EfiUsbNoData))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection == EfiUsbNoData) &&
- ((Data != NULL) || (*DataLength != 0))) {
+ ((Data != NULL) || (*DataLength != 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((TransferDirection != EfiUsbNoData) &&
- ((Data == NULL) || (*DataLength == 0))) {
+ ((Data == NULL) || (*DataLength == 0)))
+ {
return EFI_INVALID_PARAMETER;
}
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
- (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {
+ (MaximumPacketLength != 32) && (MaximumPacketLength != 64))
+ {
return EFI_INVALID_PARAMETER;
}
-
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
- ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {
+ ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)))
+ {
return EFI_INVALID_PARAMETER;
}
- Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
+ Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS (This);
Status = EFI_DEVICE_ERROR;
*TransferResult = EFI_USB_ERR_SYSTEM;
@@ -1088,23 +1092,23 @@ EhcControlTransfer (
// endpoint is bidirectional. EhcCreateUrb expects this
// combination of Ep addr and its direction.
//
- Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
- Urb = EhcCreateUrb (
- Ehc,
- DeviceAddress,
- Endpoint,
- DeviceSpeed,
- 0,
- MaximumPacketLength,
- Translator,
- EHC_CTRL_TRANSFER,
- Request,
- Data,
- *DataLength,
- NULL,
- NULL,
- 1
- );
+ Endpoint = (UINT8)(0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
+ Urb = EhcCreateUrb (
+ Ehc,
+ DeviceAddress,
+ Endpoint,
+ DeviceSpeed,
+ 0,
+ MaximumPacketLength,
+ Translator,
+ EHC_CTRL_TRANSFER,
+ Request,
+ Data,
+ *DataLength,
+ NULL,
+ NULL,
+ 1
+ );
if (Urb == NULL) {
Status = EFI_OUT_OF_RESOURCES;
@@ -1152,7 +1156,7 @@ EhcEndOfPei (
IN VOID *Ppi
)
{
- PEI_USB2_HC_DEV *Ehc;
+ PEI_USB2_HC_DEV *Ehc;
Ehc = PEI_RECOVERY_USB_EHC_DEV_FROM_THIS_NOTIFY (NotifyDescriptor);
@@ -1177,14 +1181,14 @@ EhcPeimEntry (
IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- PEI_USB_CONTROLLER_PPI *ChipSetUsbControllerPpi;
- EFI_STATUS Status;
- UINT8 Index;
- UINTN ControllerType;
- UINTN BaseAddress;
- UINTN MemPages;
- PEI_USB2_HC_DEV *EhcDev;
- EFI_PHYSICAL_ADDRESS TempPtr;
+ PEI_USB_CONTROLLER_PPI *ChipSetUsbControllerPpi;
+ EFI_STATUS Status;
+ UINT8 Index;
+ UINTN ControllerType;
+ UINTN BaseAddress;
+ UINTN MemPages;
+ PEI_USB2_HC_DEV *EhcDev;
+ EFI_PHYSICAL_ADDRESS TempPtr;
//
// Shadow this PEIM to run from memory
@@ -1197,7 +1201,7 @@ EhcPeimEntry (
&gPeiUsbControllerPpiGuid,
0,
NULL,
- (VOID **) &ChipSetUsbControllerPpi
+ (VOID **)&ChipSetUsbControllerPpi
);
if (EFI_ERROR (Status)) {
return EFI_UNSUPPORTED;
@@ -1206,7 +1210,7 @@ EhcPeimEntry (
Index = 0;
while (TRUE) {
Status = ChipSetUsbControllerPpi->GetUsbController (
- (EFI_PEI_SERVICES **) PeiServices,
+ (EFI_PEI_SERVICES **)PeiServices,
ChipSetUsbControllerPpi,
Index,
&ControllerType,
@@ -1228,24 +1232,23 @@ EhcPeimEntry (
}
MemPages = sizeof (PEI_USB2_HC_DEV) / PAGESIZE + 1;
- Status = PeiServicesAllocatePages (
- EfiBootServicesCode,
- MemPages,
- &TempPtr
- );
+ Status = PeiServicesAllocatePages (
+ EfiBootServicesCode,
+ MemPages,
+ &TempPtr
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- ZeroMem((VOID *)(UINTN)TempPtr, MemPages*PAGESIZE);
- EhcDev = (PEI_USB2_HC_DEV *) ((UINTN) TempPtr);
+ ZeroMem ((VOID *)(UINTN)TempPtr, MemPages*PAGESIZE);
+ EhcDev = (PEI_USB2_HC_DEV *)((UINTN)TempPtr);
EhcDev->Signature = USB2_HC_DEV_SIGNATURE;
IoMmuInit (&EhcDev->IoMmu);
- EhcDev->UsbHostControllerBaseAddress = (UINT32) BaseAddress;
-
+ EhcDev->UsbHostControllerBaseAddress = (UINT32)BaseAddress;
EhcDev->HcStructParams = EhcReadCapRegister (EhcDev, EHC_HCSPARAMS_OFFSET);
EhcDev->HcCapParams = EhcReadCapRegister (EhcDev, EHC_HCCPARAMS_OFFSET);
@@ -1258,16 +1261,16 @@ EhcPeimEntry (
return Status;
}
- EhcDev->Usb2HostControllerPpi.ControlTransfer = EhcControlTransfer;
- EhcDev->Usb2HostControllerPpi.BulkTransfer = EhcBulkTransfer;
- EhcDev->Usb2HostControllerPpi.GetRootHubPortNumber = EhcGetRootHubPortNumber;
- EhcDev->Usb2HostControllerPpi.GetRootHubPortStatus = EhcGetRootHubPortStatus;
- EhcDev->Usb2HostControllerPpi.SetRootHubPortFeature = EhcSetRootHubPortFeature;
- EhcDev->Usb2HostControllerPpi.ClearRootHubPortFeature = EhcClearRootHubPortFeature;
+ EhcDev->Usb2HostControllerPpi.ControlTransfer = EhcControlTransfer;
+ EhcDev->Usb2HostControllerPpi.BulkTransfer = EhcBulkTransfer;
+ EhcDev->Usb2HostControllerPpi.GetRootHubPortNumber = EhcGetRootHubPortNumber;
+ EhcDev->Usb2HostControllerPpi.GetRootHubPortStatus = EhcGetRootHubPortStatus;
+ EhcDev->Usb2HostControllerPpi.SetRootHubPortFeature = EhcSetRootHubPortFeature;
+ EhcDev->Usb2HostControllerPpi.ClearRootHubPortFeature = EhcClearRootHubPortFeature;
EhcDev->PpiDescriptor.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
- EhcDev->PpiDescriptor.Guid = &gPeiUsb2HostControllerPpiGuid;
- EhcDev->PpiDescriptor.Ppi = &EhcDev->Usb2HostControllerPpi;
+ EhcDev->PpiDescriptor.Guid = &gPeiUsb2HostControllerPpiGuid;
+ EhcDev->PpiDescriptor.Ppi = &EhcDev->Usb2HostControllerPpi;
Status = PeiServicesInstallPpi (&EhcDev->PpiDescriptor);
if (EFI_ERROR (Status)) {
@@ -1275,8 +1278,8 @@ EhcPeimEntry (
continue;
}
- EhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
- EhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
+ EhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);
+ EhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;
EhcDev->EndOfPeiNotifyList.Notify = EhcEndOfPei;
PeiServicesNotifyPpi (&EhcDev->EndOfPeiNotifyList);
@@ -1296,12 +1299,11 @@ EhcPeimEntry (
**/
EFI_STATUS
InitializeUsbHC (
- IN PEI_USB2_HC_DEV *EhcDev
+ IN PEI_USB2_HC_DEV *EhcDev
)
{
EFI_STATUS Status;
-
EhcResetHC (EhcDev, EHC_RESET_TIMEOUT);
Status = EhcInitHC (EhcDev);
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 11:26:01 +0000