diff options
Diffstat (limited to 'MdeModulePkg/Bus/Pci/NvmExpressPei')
13 files changed, 606 insertions, 550 deletions
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c index 6f9ff4b7dd..9b454a7dd8 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/DevicePath.c @@ -17,8 +17,8 @@ NVME_NAMESPACE_DEVICE_PATH mNvmeDevicePathNodeTemplate = { MESSAGING_DEVICE_PATH,
MSG_NVME_NAMESPACE_DP,
{
- (UINT8) (sizeof (NVME_NAMESPACE_DEVICE_PATH)),
- (UINT8) ((sizeof (NVME_NAMESPACE_DEVICE_PATH)) >> 8)
+ (UINT8)(sizeof (NVME_NAMESPACE_DEVICE_PATH)),
+ (UINT8)((sizeof (NVME_NAMESPACE_DEVICE_PATH)) >> 8)
}
},
0x0, // NamespaceId
@@ -32,8 +32,8 @@ EFI_DEVICE_PATH_PROTOCOL mNvmeEndDevicePathNodeTemplate = { END_DEVICE_PATH_TYPE,
END_ENTIRE_DEVICE_PATH_SUBTYPE,
{
- (UINT8) (sizeof (EFI_DEVICE_PATH_PROTOCOL)),
- (UINT8) ((sizeof (EFI_DEVICE_PATH_PROTOCOL)) >> 8)
+ (UINT8)(sizeof (EFI_DEVICE_PATH_PROTOCOL)),
+ (UINT8)((sizeof (EFI_DEVICE_PATH_PROTOCOL)) >> 8)
}
};
@@ -78,7 +78,7 @@ NextDevicePathNode ( )
{
ASSERT (Node != NULL);
- return (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)(Node) + DevicePathNodeLength(Node));
+ return (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)(Node) + DevicePathNodeLength (Node));
}
/**
@@ -96,14 +96,14 @@ NextDevicePathNode ( **/
EFI_STATUS
GetDevicePathInstanceSize (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINTN *InstanceSize,
- OUT BOOLEAN *EntireDevicePathEnd
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINTN *InstanceSize,
+ OUT BOOLEAN *EntireDevicePathEnd
)
{
- EFI_DEVICE_PATH_PROTOCOL *Walker;
+ EFI_DEVICE_PATH_PROTOCOL *Walker;
- if (DevicePath == NULL || InstanceSize == NULL || EntireDevicePathEnd == NULL) {
+ if ((DevicePath == NULL) || (InstanceSize == NULL) || (EntireDevicePathEnd == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -129,7 +129,7 @@ GetDevicePathInstanceSize ( //
// Compute the size of the device path instance
//
- *InstanceSize = ((UINTN) Walker - (UINTN) (DevicePath)) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+ *InstanceSize = ((UINTN)Walker - (UINTN)(DevicePath)) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
return EFI_SUCCESS;
}
@@ -147,12 +147,12 @@ GetDevicePathInstanceSize ( **/
EFI_STATUS
NvmeIsHcDevicePathValid (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINTN DevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN UINTN DevicePathLength
)
{
- EFI_DEVICE_PATH_PROTOCOL *Start;
- UINTN Size;
+ EFI_DEVICE_PATH_PROTOCOL *Start;
+ UINTN Size;
if (DevicePath == NULL) {
return EFI_INVALID_PARAMETER;
@@ -167,22 +167,24 @@ NvmeIsHcDevicePathValid ( Start = DevicePath;
while (!(DevicePath->Type == END_DEVICE_PATH_TYPE &&
- DevicePath->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE)) {
+ DevicePath->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE))
+ {
DevicePath = NextDevicePathNode (DevicePath);
//
// Prevent overflow and invalid zero in the 'Length' field of a device path
// node.
//
- if ((UINTN) DevicePath <= (UINTN) Start) {
+ if ((UINTN)DevicePath <= (UINTN)Start) {
return EFI_INVALID_PARAMETER;
}
//
// Prevent touching memory beyond given DevicePathLength.
//
- if ((UINTN) DevicePath - (UINTN) Start >
- DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)) {
+ if ((UINTN)DevicePath - (UINTN)Start >
+ DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL))
+ {
return EFI_INVALID_PARAMETER;
}
}
@@ -190,7 +192,7 @@ NvmeIsHcDevicePathValid ( //
// Check if the device path and its size match exactly with each other.
//
- Size = ((UINTN) DevicePath - (UINTN) Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
+ Size = ((UINTN)DevicePath - (UINTN)Start) + sizeof (EFI_DEVICE_PATH_PROTOCOL);
if (Size != DevicePathLength) {
return EFI_INVALID_PARAMETER;
}
@@ -217,17 +219,17 @@ NvmeIsHcDevicePathValid ( **/
EFI_STATUS
NvmeBuildDevicePath (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN UINT64 NamespaceUuid,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN UINT64 NamespaceUuid,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- EFI_DEVICE_PATH_PROTOCOL *DevicePathWalker;
- NVME_NAMESPACE_DEVICE_PATH *NvmeDeviceNode;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathWalker;
+ NVME_NAMESPACE_DEVICE_PATH *NvmeDeviceNode;
- if (DevicePathLength == NULL || DevicePath == NULL) {
+ if ((DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -251,8 +253,8 @@ NvmeBuildDevicePath ( //
// Construct the Nvm Express device node
//
- DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *) ((UINT8 *)DevicePathWalker +
- (Private->DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
+ DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)DevicePathWalker +
+ (Private->DevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)));
CopyMem (
DevicePathWalker,
&mNvmeDevicePathNodeTemplate,
@@ -265,8 +267,8 @@ NvmeBuildDevicePath ( //
// Construct the end device node
//
- DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *) ((UINT8 *)DevicePathWalker +
- sizeof (NVME_NAMESPACE_DEVICE_PATH));
+ DevicePathWalker = (EFI_DEVICE_PATH_PROTOCOL *)((UINT8 *)DevicePathWalker +
+ sizeof (NVME_NAMESPACE_DEVICE_PATH));
CopyMem (
DevicePathWalker,
&mNvmeEndDevicePathNodeTemplate,
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c index 7b049b9e4a..36bebc5bc1 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c @@ -20,15 +20,15 @@ GetIoMmu ( VOID
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = NULL;
Status = PeiServicesLocatePpi (
&gEdkiiIoMmuPpiGuid,
0,
NULL,
- (VOID **) &IoMmu
+ (VOID **)&IoMmu
);
if (!EFI_ERROR (Status) && (IoMmu != NULL)) {
return IoMmu;
@@ -58,48 +58,50 @@ GetIoMmu ( **/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
- EFI_STATUS Status;
- UINT64 Attribute;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ UINT64 Attribute;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
if (IoMmu != NULL) {
Status = IoMmu->Map (
- IoMmu,
- Operation,
- HostAddress,
- NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ IoMmu,
+ Operation,
+ HostAddress,
+ NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -110,9 +112,10 @@ IoMmuMap ( }
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -127,11 +130,11 @@ IoMmuMap ( **/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
@@ -141,6 +144,7 @@ IoMmuUnmap ( } else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -175,7 +179,7 @@ IoMmuAllocateBuffer ( EFI_PHYSICAL_ADDRESS HostPhyAddress;
EDKII_IOMMU_PPI *IoMmu;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
IoMmu = GetIoMmu ();
@@ -192,18 +196,19 @@ IoMmuAllocateBuffer ( return EFI_OUT_OF_RESOURCES;
}
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = IoMmu->Map (
- IoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = IoMmu->Map (
+ IoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = IoMmu->SetAttribute (
IoMmu,
*Mapping,
@@ -221,10 +226,12 @@ IoMmuAllocateBuffer ( if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(UINTN)HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -242,13 +249,13 @@ IoMmuAllocateBuffer ( **/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
- EFI_STATUS Status;
- EDKII_IOMMU_PPI *IoMmu;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
IoMmu = GetIoMmu ();
@@ -259,5 +266,6 @@ IoMmuFreeBuffer ( } else {
Status = EFI_SUCCESS;
}
+
return Status;
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c index a8cb7f3a67..f73053fc3f 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c @@ -53,19 +53,19 @@ EFI_PEI_NOTIFY_DESCRIPTOR mNvmeEndOfPeiNotifyListTemplate = { **/
EFI_STATUS
EnumerateNvmeDevNamespace (
- IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId
+ IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId
)
{
- EFI_STATUS Status;
- NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
- PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
- UINT32 DeviceIndex;
- UINT32 Lbads;
- UINT32 Flbas;
- UINT32 LbaFmtIdx;
-
- NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *) AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
+ EFI_STATUS Status;
+ NVME_ADMIN_NAMESPACE_DATA *NamespaceData;
+ PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
+ UINT32 DeviceIndex;
+ UINT32 Lbads;
+ UINT32 Flbas;
+ UINT32 LbaFmtIdx;
+
+ NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
if (NamespaceData == NULL) {
return EFI_OUT_OF_RESOURCES;
}
@@ -92,8 +92,8 @@ EnumerateNvmeDevNamespace ( goto Exit;
}
- DeviceIndex = Private->ActiveNamespaceNum;
- NamespaceInfo = &Private->NamespaceInfo[DeviceIndex];
+ DeviceIndex = Private->ActiveNamespaceNum;
+ NamespaceInfo = &Private->NamespaceInfo[DeviceIndex];
NamespaceInfo->NamespaceId = NamespaceId;
NamespaceInfo->NamespaceUuid = NamespaceData->Eui64;
NamespaceInfo->Controller = Private;
@@ -110,8 +110,8 @@ EnumerateNvmeDevNamespace ( NamespaceInfo->Media.RemovableMedia = FALSE;
NamespaceInfo->Media.MediaPresent = TRUE;
NamespaceInfo->Media.ReadOnly = FALSE;
- NamespaceInfo->Media.BlockSize = (UINT32) 1 << Lbads;
- NamespaceInfo->Media.LastBlock = (EFI_PEI_LBA) NamespaceData->Nsze - 1;
+ NamespaceInfo->Media.BlockSize = (UINT32)1 << Lbads;
+ NamespaceInfo->Media.LastBlock = (EFI_PEI_LBA)NamespaceData->Nsze - 1;
DEBUG ((
DEBUG_INFO,
"%a: Namespace ID %d - BlockSize = 0x%x, LastBlock = 0x%lx\n",
@@ -140,10 +140,10 @@ Exit: **/
EFI_STATUS
NvmeDiscoverNamespaces (
- IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- UINT32 NamespaceId;
+ UINT32 NamespaceId;
Private->ActiveNamespaceNum = 0;
Private->NamespaceInfo = AllocateZeroPool (Private->ControllerData->Nn * sizeof (PEI_NVME_NAMESPACE_INFO));
@@ -161,6 +161,7 @@ NvmeDiscoverNamespaces ( //
EnumerateNvmeDevNamespace (Private, NamespaceId);
}
+
if (Private->ActiveNamespaceNum == 0) {
return EFI_NOT_FOUND;
}
@@ -187,7 +188,7 @@ NvmePeimEndOfPei ( IN VOID *Ppi
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);
NvmeFreeDmaResource (Private);
@@ -207,19 +208,19 @@ NvmePeimEndOfPei ( EFI_STATUS
EFIAPI
NvmExpressPeimEntry (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- EFI_BOOT_MODE BootMode;
- EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *NvmeHcPpi;
- UINT8 Controller;
- UINTN MmioBase;
- UINTN DevicePathLength;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_PHYSICAL_ADDRESS DeviceAddress;
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+ EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *NvmeHcPpi;
+ UINT8 Controller;
+ UINTN MmioBase;
+ UINTN DevicePathLength;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_PHYSICAL_ADDRESS DeviceAddress;
DEBUG ((DEBUG_INFO, "%a: Enters.\n", __FUNCTION__));
@@ -239,7 +240,7 @@ NvmExpressPeimEntry ( &gEdkiiPeiNvmExpressHostControllerPpiGuid,
0,
NULL,
- (VOID **) &NvmeHcPpi
+ (VOID **)&NvmeHcPpi
);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Fail to locate NvmeHostControllerPpi.\n", __FUNCTION__));
@@ -269,8 +270,10 @@ NvmExpressPeimEntry ( );
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_ERROR, "%a: Fail to allocate get the device path for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Fail to allocate get the device path for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
return Status;
}
@@ -281,8 +284,10 @@ NvmExpressPeimEntry ( Status = NvmeIsHcDevicePathValid (DevicePath, DevicePathLength);
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_ERROR, "%a: The device path is invalid for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: The device path is invalid for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
Controller++;
continue;
@@ -295,10 +300,13 @@ NvmExpressPeimEntry ( // during S3 resume.
//
if ((BootMode == BOOT_ON_S3_RESUME) &&
- (NvmeS3SkipThisController (DevicePath, DevicePathLength))) {
+ (NvmeS3SkipThisController (DevicePath, DevicePathLength)))
+ {
DEBUG ((
- DEBUG_ERROR, "%a: Controller %d is skipped during S3.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Controller %d is skipped during S3.\n",
+ __FUNCTION__,
+ Controller
));
Controller++;
continue;
@@ -310,8 +318,10 @@ NvmExpressPeimEntry ( Private = AllocateZeroPool (sizeof (PEI_NVME_CONTROLLER_PRIVATE_DATA));
if (Private == NULL) {
DEBUG ((
- DEBUG_ERROR, "%a: Fail to allocate private data for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Fail to allocate private data for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
return EFI_OUT_OF_RESOURCES;
}
@@ -327,12 +337,15 @@ NvmExpressPeimEntry ( );
if (EFI_ERROR (Status)) {
DEBUG ((
- DEBUG_ERROR, "%a: Fail to allocate DMA buffers for Controller %d.\n",
- __FUNCTION__, Controller
+ DEBUG_ERROR,
+ "%a: Fail to allocate DMA buffers for Controller %d.\n",
+ __FUNCTION__,
+ Controller
));
return Status;
}
- ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS) (UINTN) Private->Buffer));
+
+ ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS)(UINTN)Private->Buffer));
DEBUG ((DEBUG_INFO, "%a: DMA buffer base at 0x%x\n", __FUNCTION__, Private->Buffer));
//
@@ -351,7 +364,9 @@ NvmExpressPeimEntry ( DEBUG ((
DEBUG_ERROR,
"%a: Controller initialization fail for Controller %d with Status - %r.\n",
- __FUNCTION__, Controller, Status
+ __FUNCTION__,
+ Controller,
+ Status
));
NvmeFreeDmaResource (Private);
Controller++;
@@ -369,7 +384,9 @@ NvmExpressPeimEntry ( DEBUG ((
DEBUG_ERROR,
"%a: Namespaces discovery fail for Controller %d with Status - %r.\n",
- __FUNCTION__, Controller, Status
+ __FUNCTION__,
+ Controller,
+ Status
));
NvmeFreeDmaResource (Private);
Controller++;
@@ -379,35 +396,35 @@ NvmExpressPeimEntry ( //
// Nvm Express Pass Thru PPI
//
- Private->PassThruMode.Attributes = EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL |
- EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL |
- EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_CMD_SET_NVM;
- Private->PassThruMode.IoAlign = sizeof (UINTN);
- Private->PassThruMode.NvmeVersion = EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_REVISION;
- Private->NvmePassThruPpi.Mode = &Private->PassThruMode;
- Private->NvmePassThruPpi.GetDevicePath = NvmePassThruGetDevicePath;
- Private->NvmePassThruPpi.GetNextNameSpace = NvmePassThruGetNextNameSpace;
- Private->NvmePassThruPpi.PassThru = NvmePassThru;
+ Private->PassThruMode.Attributes = EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL |
+ EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL |
+ EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_CMD_SET_NVM;
+ Private->PassThruMode.IoAlign = sizeof (UINTN);
+ Private->PassThruMode.NvmeVersion = EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_REVISION;
+ Private->NvmePassThruPpi.Mode = &Private->PassThruMode;
+ Private->NvmePassThruPpi.GetDevicePath = NvmePassThruGetDevicePath;
+ Private->NvmePassThruPpi.GetNextNameSpace = NvmePassThruGetNextNameSpace;
+ Private->NvmePassThruPpi.PassThru = NvmePassThru;
CopyMem (
&Private->NvmePassThruPpiList,
&mNvmePassThruPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->NvmePassThruPpiList.Ppi = &Private->NvmePassThruPpi;
+ Private->NvmePassThruPpiList.Ppi = &Private->NvmePassThruPpi;
PeiServicesInstallPpi (&Private->NvmePassThruPpiList);
//
// Block Io PPI
//
- Private->BlkIoPpi.GetNumberOfBlockDevices = NvmeBlockIoPeimGetDeviceNo;
- Private->BlkIoPpi.GetBlockDeviceMediaInfo = NvmeBlockIoPeimGetMediaInfo;
- Private->BlkIoPpi.ReadBlocks = NvmeBlockIoPeimReadBlocks;
+ Private->BlkIoPpi.GetNumberOfBlockDevices = NvmeBlockIoPeimGetDeviceNo;
+ Private->BlkIoPpi.GetBlockDeviceMediaInfo = NvmeBlockIoPeimGetMediaInfo;
+ Private->BlkIoPpi.ReadBlocks = NvmeBlockIoPeimReadBlocks;
CopyMem (
&Private->BlkIoPpiList,
&mNvmeBlkIoPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->BlkIoPpiList.Ppi = &Private->BlkIoPpi;
+ Private->BlkIoPpiList.Ppi = &Private->BlkIoPpi;
Private->BlkIo2Ppi.Revision = EFI_PEI_RECOVERY_BLOCK_IO2_PPI_REVISION;
Private->BlkIo2Ppi.GetNumberOfBlockDevices = NvmeBlockIoPeimGetDeviceNo2;
@@ -418,7 +435,7 @@ NvmExpressPeimEntry ( &mNvmeBlkIo2PpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->BlkIo2PpiList.Ppi = &Private->BlkIo2Ppi;
+ Private->BlkIo2PpiList.Ppi = &Private->BlkIo2Ppi;
PeiServicesInstallPpi (&Private->BlkIoPpiList);
//
@@ -428,7 +445,8 @@ NvmExpressPeimEntry ( DEBUG ((
DEBUG_INFO,
"%a: Security Security Command PPI will be produced for Controller %d.\n",
- __FUNCTION__, Controller
+ __FUNCTION__,
+ Controller
));
Private->StorageSecurityPpi.Revision = EDKII_STORAGE_SECURITY_PPI_REVISION;
Private->StorageSecurityPpi.GetNumberofDevices = NvmeStorageSecurityGetDeviceNo;
@@ -440,7 +458,7 @@ NvmExpressPeimEntry ( &mNvmeStorageSecurityPpiListTemplate,
sizeof (EFI_PEI_PPI_DESCRIPTOR)
);
- Private->StorageSecurityPpiList.Ppi = &Private->StorageSecurityPpi;
+ Private->StorageSecurityPpiList.Ppi = &Private->StorageSecurityPpi;
PeiServicesInstallPpi (&Private->StorageSecurityPpiList);
}
@@ -449,11 +467,13 @@ NvmExpressPeimEntry ( &mNvmeEndOfPeiNotifyListTemplate,
sizeof (EFI_PEI_NOTIFY_DESCRIPTOR)
);
- PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);
+ PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);
DEBUG ((
- DEBUG_INFO, "%a: Controller %d has been successfully initialized.\n",
- __FUNCTION__, Controller
+ DEBUG_INFO,
+ "%a: Controller %d has been successfully initialized.\n",
+ __FUNCTION__,
+ Controller
));
Controller++;
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h index 8cd905191b..78a6b70165 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h @@ -44,68 +44,68 @@ typedef struct _PEI_NVME_CONTROLLER_PRIVATE_DATA PEI_NVME_CONTROLLER_PRIVATE_DA //
// NVME PEI driver implementation related definitions
//
-#define NVME_MAX_QUEUES 2 // Number of I/O queues supported by the driver, 1 for AQ, 1 for CQ
-#define NVME_ASQ_SIZE 1 // Number of admin submission queue entries, which is 0-based
-#define NVME_ACQ_SIZE 1 // Number of admin completion queue entries, which is 0-based
-#define NVME_CSQ_SIZE 63 // Number of I/O submission queue entries, which is 0-based
-#define NVME_CCQ_SIZE 63 // Number of I/O completion queue entries, which is 0-based
-#define NVME_PRP_SIZE (8) // Pages of PRP list
+#define NVME_MAX_QUEUES 2 // Number of I/O queues supported by the driver, 1 for AQ, 1 for CQ
+#define NVME_ASQ_SIZE 1 // Number of admin submission queue entries, which is 0-based
+#define NVME_ACQ_SIZE 1 // Number of admin completion queue entries, which is 0-based
+#define NVME_CSQ_SIZE 63 // Number of I/O submission queue entries, which is 0-based
+#define NVME_CCQ_SIZE 63 // Number of I/O completion queue entries, which is 0-based
+#define NVME_PRP_SIZE (8) // Pages of PRP list
#define NVME_MEM_MAX_PAGES \
( \
- 1 /* ASQ */ + \
- 1 /* ACQ */ + \
- 1 /* SQs */ + \
- 1 /* CQs */ + \
+ 1 /* ASQ */ + \
+ 1 /* ACQ */ + \
+ 1 /* SQs */ + \
+ 1 /* CQs */ + \
NVME_PRP_SIZE) /* PRPs */
-#define NVME_ADMIN_QUEUE 0x00
-#define NVME_IO_QUEUE 0x01
-#define NVME_GENERIC_TIMEOUT 5000000 // Generic PassThru command timeout value, in us unit
-#define NVME_POLL_INTERVAL 100 // Poll interval for PassThru command, in us unit
+#define NVME_ADMIN_QUEUE 0x00
+#define NVME_IO_QUEUE 0x01
+#define NVME_GENERIC_TIMEOUT 5000000 // Generic PassThru command timeout value, in us unit
+#define NVME_POLL_INTERVAL 100 // Poll interval for PassThru command, in us unit
//
// Nvme namespace data structure.
//
struct _PEI_NVME_NAMESPACE_INFO {
- UINT32 NamespaceId;
- UINT64 NamespaceUuid;
- EFI_PEI_BLOCK_IO2_MEDIA Media;
+ UINT32 NamespaceId;
+ UINT64 NamespaceUuid;
+ EFI_PEI_BLOCK_IO2_MEDIA Media;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Controller;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Controller;
};
-#define NVME_CONTROLLER_NSID 0
+#define NVME_CONTROLLER_NSID 0
//
// Unique signature for private data structure.
//
-#define NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('N','V','P','C')
+#define NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('N','V','P','C')
//
// Nvme controller private data structure.
//
struct _PEI_NVME_CONTROLLER_PRIVATE_DATA {
- UINT32 Signature;
- UINTN MmioBase;
- EFI_NVM_EXPRESS_PASS_THRU_MODE PassThruMode;
- UINTN DevicePathLength;
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;
-
- EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
- EFI_PEI_RECOVERY_BLOCK_IO2_PPI BlkIo2Ppi;
- EDKII_PEI_STORAGE_SECURITY_CMD_PPI StorageSecurityPpi;
- EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI NvmePassThruPpi;
- EFI_PEI_PPI_DESCRIPTOR BlkIoPpiList;
- EFI_PEI_PPI_DESCRIPTOR BlkIo2PpiList;
- EFI_PEI_PPI_DESCRIPTOR StorageSecurityPpiList;
- EFI_PEI_PPI_DESCRIPTOR NvmePassThruPpiList;
- EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
+ UINT32 Signature;
+ UINTN MmioBase;
+ EFI_NVM_EXPRESS_PASS_THRU_MODE PassThruMode;
+ UINTN DevicePathLength;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ EFI_PEI_RECOVERY_BLOCK_IO_PPI BlkIoPpi;
+ EFI_PEI_RECOVERY_BLOCK_IO2_PPI BlkIo2Ppi;
+ EDKII_PEI_STORAGE_SECURITY_CMD_PPI StorageSecurityPpi;
+ EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI NvmePassThruPpi;
+ EFI_PEI_PPI_DESCRIPTOR BlkIoPpiList;
+ EFI_PEI_PPI_DESCRIPTOR BlkIo2PpiList;
+ EFI_PEI_PPI_DESCRIPTOR StorageSecurityPpiList;
+ EFI_PEI_PPI_DESCRIPTOR NvmePassThruPpiList;
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
//
// Pointer to identify controller data
//
- NVME_ADMIN_CONTROLLER_DATA *ControllerData;
+ NVME_ADMIN_CONTROLLER_DATA *ControllerData;
//
// (4 + NVME_PRP_SIZE) x 4kB aligned buffers will be carved out of this buffer
@@ -115,34 +115,34 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA { // 4th 4kB boundary is the start of I/O completion queue
// 5th 4kB boundary is the start of PRP list buffers
//
- VOID *Buffer;
- VOID *BufferMapping;
+ VOID *Buffer;
+ VOID *BufferMapping;
//
// Pointers to 4kB aligned submission & completion queues
//
- NVME_SQ *SqBuffer[NVME_MAX_QUEUES];
- NVME_CQ *CqBuffer[NVME_MAX_QUEUES];
+ NVME_SQ *SqBuffer[NVME_MAX_QUEUES];
+ NVME_CQ *CqBuffer[NVME_MAX_QUEUES];
//
// Submission and completion queue indices
//
- NVME_SQTDBL SqTdbl[NVME_MAX_QUEUES];
- NVME_CQHDBL CqHdbl[NVME_MAX_QUEUES];
+ NVME_SQTDBL SqTdbl[NVME_MAX_QUEUES];
+ NVME_CQHDBL CqHdbl[NVME_MAX_QUEUES];
- UINT8 Pt[NVME_MAX_QUEUES];
- UINT16 Cid[NVME_MAX_QUEUES];
+ UINT8 Pt[NVME_MAX_QUEUES];
+ UINT16 Cid[NVME_MAX_QUEUES];
//
// Nvme controller capabilities
//
- NVME_CAP Cap;
+ NVME_CAP Cap;
//
// Namespaces information on the controller
//
- UINT32 ActiveNamespaceNum;
- PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
+ UINT32 ActiveNamespaceNum;
+ PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
};
#define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO(a) \
@@ -156,7 +156,6 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA { #define GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) \
CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, EndOfPeiNotifyList, NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE)
-
//
// Internal functions
//
@@ -201,9 +200,9 @@ IoMmuAllocateBuffer ( **/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
@@ -227,11 +226,11 @@ IoMmuFreeBuffer ( **/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -245,7 +244,7 @@ IoMmuMap ( **/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
);
/**
@@ -282,9 +281,9 @@ NvmePeimEndOfPei ( **/
EFI_STATUS
GetDevicePathInstanceSize (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- OUT UINTN *InstanceSize,
- OUT BOOLEAN *EntireDevicePathEnd
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINTN *InstanceSize,
+ OUT BOOLEAN *EntireDevicePathEnd
);
/**
@@ -300,8 +299,8 @@ GetDevicePathInstanceSize ( **/
EFI_STATUS
NvmeIsHcDevicePathValid (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN UINTN DevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN UINTN DevicePathLength
);
/**
@@ -323,11 +322,11 @@ NvmeIsHcDevicePathValid ( **/
EFI_STATUS
NvmeBuildDevicePath (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN UINT64 NamespaceUuid,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN UINT64 NamespaceUuid,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -342,8 +341,8 @@ NvmeBuildDevicePath ( **/
BOOLEAN
NvmeS3SkipThisController (
- IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
- IN UINTN HcDevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
+ IN UINTN HcDevicePathLength
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c index a9bf4f8190..576481dcee 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.c @@ -24,29 +24,29 @@ **/
EFI_STATUS
ReadSectors (
- IN PEI_NVME_NAMESPACE_INFO *NamespaceInfo,
- OUT UINTN Buffer,
- IN UINT64 Lba,
- IN UINT32 Blocks
+ IN PEI_NVME_NAMESPACE_INFO *NamespaceInfo,
+ OUT UINTN Buffer,
+ IN UINT64 Lba,
+ IN UINT32 Blocks
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 Bytes;
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *NvmePassThru;
-
- Private = NamespaceInfo->Controller;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 Bytes;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *NvmePassThru;
+
+ Private = NamespaceInfo->Controller;
NvmePassThru = &Private->NvmePassThruPpi;
- BlockSize = NamespaceInfo->Media.BlockSize;
- Bytes = Blocks * BlockSize;
+ BlockSize = NamespaceInfo->Media.BlockSize;
+ Bytes = Blocks * BlockSize;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
@@ -60,7 +60,7 @@ ReadSectors ( CommandPacket.QueueType = NVME_IO_QUEUE;
CommandPacket.NvmeCmd->Cdw10 = (UINT32)Lba;
- CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64(Lba, 32);
+ CommandPacket.NvmeCmd->Cdw11 = (UINT32)RShiftU64 (Lba, 32);
CommandPacket.NvmeCmd->Cdw12 = (Blocks - 1) & 0xFFFF;
CommandPacket.NvmeCmd->Flags = CDW10_VALID | CDW11_VALID | CDW12_VALID;
@@ -88,18 +88,18 @@ ReadSectors ( **/
EFI_STATUS
NvmeRead (
- IN PEI_NVME_NAMESPACE_INFO *NamespaceInfo,
- OUT UINTN Buffer,
- IN UINT64 Lba,
- IN UINTN Blocks
+ IN PEI_NVME_NAMESPACE_INFO *NamespaceInfo,
+ OUT UINTN Buffer,
+ IN UINT64 Lba,
+ IN UINTN Blocks
)
{
- EFI_STATUS Status;
- UINT32 Retries;
- UINT32 BlockSize;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 MaxTransferBlocks;
- UINTN OrginalBlocks;
+ EFI_STATUS Status;
+ UINT32 Retries;
+ UINT32 BlockSize;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 MaxTransferBlocks;
+ UINTN OrginalBlocks;
Status = EFI_SUCCESS;
Retries = 0;
@@ -120,14 +120,15 @@ NvmeRead ( Lba,
Blocks > MaxTransferBlocks ? MaxTransferBlocks : (UINT32)Blocks
);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
Retries++;
MaxTransferBlocks = MaxTransferBlocks >> 1;
- if (Retries > NVME_READ_MAX_RETRY || MaxTransferBlocks < 1) {
+ if ((Retries > NVME_READ_MAX_RETRY) || (MaxTransferBlocks < 1)) {
DEBUG ((DEBUG_ERROR, "%a: ReadSectors fail, Status - %r\n", __FUNCTION__, Status));
break;
}
+
DEBUG ((
DEBUG_BLKIO,
"%a: ReadSectors fail, retry with smaller transfer block number - 0x%x\n",
@@ -142,13 +143,21 @@ NvmeRead ( Buffer += (MaxTransferBlocks * BlockSize);
Lba += MaxTransferBlocks;
} else {
- Blocks = 0;
+ Blocks = 0;
}
}
- DEBUG ((DEBUG_BLKIO, "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
- "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n", __FUNCTION__, Lba,
- (UINT64)OrginalBlocks, (UINT64)Blocks, BlockSize, Status));
+ DEBUG ((
+ DEBUG_BLKIO,
+ "%a: Lba = 0x%08Lx, Original = 0x%08Lx, "
+ "Remaining = 0x%08Lx, BlockSize = 0x%x, Status = %r\n",
+ __FUNCTION__,
+ Lba,
+ (UINT64)OrginalBlocks,
+ (UINT64)Blocks,
+ BlockSize,
+ Status
+ ));
return Status;
}
@@ -176,13 +185,13 @@ NvmeBlockIoPeimGetDeviceNo ( OUT UINTN *NumberBlockDevices
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberBlockDevices == NULL) {
+ if ((This == NULL) || (NumberBlockDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
+ Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
*NumberBlockDevices = Private->ActiveNamespaceNum;
return EFI_SUCCESS;
@@ -238,9 +247,9 @@ NvmeBlockIoPeimGetMediaInfo ( OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || MediaInfo == NULL) {
+ if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -250,7 +259,7 @@ NvmeBlockIoPeimGetMediaInfo ( return EFI_INVALID_PARAMETER;
}
- MediaInfo->DeviceType = (EFI_PEI_BLOCK_DEVICE_TYPE) EDKII_PEI_BLOCK_DEVICE_TYPE_NVME;
+ MediaInfo->DeviceType = (EFI_PEI_BLOCK_DEVICE_TYPE)EDKII_PEI_BLOCK_DEVICE_TYPE_NVME;
MediaInfo->MediaPresent = TRUE;
MediaInfo->LastBlock = (UINTN)Private->NamespaceInfo[DeviceIndex-1].Media.LastBlock;
MediaInfo->BlockSize = Private->NamespaceInfo[DeviceIndex-1].Media.BlockSize;
@@ -303,17 +312,17 @@ NvmeBlockIoPeimReadBlocks ( OUT VOID *Buffer
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
- UINT32 BlockSize;
- UINTN NumberOfBlocks;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_NAMESPACE_INFO *NamespaceInfo;
+ UINT32 BlockSize;
+ UINTN NumberOfBlocks;
Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
//
// Check parameters
//
- if (This == NULL || Buffer == NULL) {
+ if ((This == NULL) || (Buffer == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -329,7 +338,7 @@ NvmeBlockIoPeimReadBlocks ( // Check BufferSize and StartLBA
//
NamespaceInfo = &(Private->NamespaceInfo[DeviceIndex - 1]);
- BlockSize = NamespaceInfo->Media.BlockSize;
+ BlockSize = NamespaceInfo->Media.BlockSize;
if (BufferSize % BlockSize != 0) {
return EFI_BAD_BUFFER_SIZE;
}
@@ -337,6 +346,7 @@ NvmeBlockIoPeimReadBlocks ( if (StartLBA > NamespaceInfo->Media.LastBlock) {
return EFI_INVALID_PARAMETER;
}
+
NumberOfBlocks = BufferSize / BlockSize;
if (NumberOfBlocks - 1 > NamespaceInfo->Media.LastBlock - StartLBA) {
return EFI_INVALID_PARAMETER;
@@ -369,13 +379,13 @@ NvmeBlockIoPeimGetDeviceNo2 ( OUT UINTN *NumberBlockDevices
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberBlockDevices == NULL) {
+ if ((This == NULL) || (NumberBlockDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2 (This);
+ Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2 (This);
*NumberBlockDevices = Private->ActiveNamespaceNum;
return EFI_SUCCESS;
@@ -431,22 +441,22 @@ NvmeBlockIoPeimGetMediaInfo2 ( OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
- EFI_STATUS Status;
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_PEI_BLOCK_IO_MEDIA Media;
+ EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_PEI_BLOCK_IO_MEDIA Media;
- if (This == NULL || MediaInfo == NULL) {
+ if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO2 (This);
- Status = NvmeBlockIoPeimGetMediaInfo (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- &Media
- );
+ Status = NvmeBlockIoPeimGetMediaInfo (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ &Media
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -505,7 +515,7 @@ NvmeBlockIoPeimReadBlocks2 ( OUT VOID *Buffer
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
if (This == NULL) {
return EFI_INVALID_PARAMETER;
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h index 2c7065cb79..9c0a1eadf8 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiBlockIo.h @@ -14,9 +14,9 @@ //
// Nvme device for EFI_PEI_BLOCK_DEVICE_TYPE
//
-#define EDKII_PEI_BLOCK_DEVICE_TYPE_NVME 7
+#define EDKII_PEI_BLOCK_DEVICE_TYPE_NVME 7
-#define NVME_READ_MAX_RETRY 3
+#define NVME_READ_MAX_RETRY 3
/**
Gets the count of block I/O devices that one specific block driver detects.
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c index 1d7e3d26e0..ac956bdce4 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.c @@ -22,14 +22,14 @@ **/
EFI_STATUS
NvmeMmioRead (
- IN OUT VOID *MemBuffer,
- IN UINTN MmioAddr,
- IN UINTN Size
+ IN OUT VOID *MemBuffer,
+ IN UINTN MmioAddr,
+ IN UINTN Size
)
{
- UINTN Offset;
- UINT8 Data;
- UINT8 *Ptr;
+ UINTN Offset;
+ UINT8 Data;
+ UINT8 *Ptr;
// priority has adjusted
switch (Size) {
@@ -52,9 +52,10 @@ NvmeMmioRead ( default:
Ptr = (UINT8 *)MemBuffer;
for (Offset = 0; Offset < Size; Offset += 1) {
- Data = MmioRead8 (MmioAddr + Offset);
+ Data = MmioRead8 (MmioAddr + Offset);
Ptr[Offset] = Data;
}
+
break;
}
@@ -73,14 +74,14 @@ NvmeMmioRead ( **/
EFI_STATUS
NvmeMmioWrite (
- IN OUT UINTN MmioAddr,
- IN VOID *MemBuffer,
- IN UINTN Size
+ IN OUT UINTN MmioAddr,
+ IN VOID *MemBuffer,
+ IN UINTN Size
)
{
- UINTN Offset;
- UINT8 Data;
- UINT8 *Ptr;
+ UINTN Offset;
+ UINT8 Data;
+ UINT8 *Ptr;
// priority has adjusted
switch (Size) {
@@ -106,6 +107,7 @@ NvmeMmioWrite ( Data = Ptr[Offset];
MmioWrite8 (MmioAddr + Offset, Data);
}
+
break;
}
@@ -122,18 +124,18 @@ NvmeMmioWrite ( **/
UINT32
NvmeBaseMemPageOffset (
- IN UINTN BaseMemIndex
+ IN UINTN BaseMemIndex
)
{
- UINT32 Pages;
- UINTN Index;
- UINT32 PageSizeList[5];
+ UINT32 Pages;
+ UINTN Index;
+ UINT32 PageSizeList[5];
- PageSizeList[0] = 1; /* ASQ */
- PageSizeList[1] = 1; /* ACQ */
- PageSizeList[2] = 1; /* SQs */
- PageSizeList[3] = 1; /* CQs */
- PageSizeList[4] = NVME_PRP_SIZE; /* PRPs */
+ PageSizeList[0] = 1; /* ASQ */
+ PageSizeList[1] = 1; /* ACQ */
+ PageSizeList[2] = 1; /* SQs */
+ PageSizeList[3] = 1; /* CQs */
+ PageSizeList[4] = NVME_PRP_SIZE; /* PRPs */
if (BaseMemIndex > MAX_BASEMEM_COUNT) {
DEBUG ((DEBUG_ERROR, "%a: The input BaseMem index is invalid.\n", __FUNCTION__));
@@ -161,14 +163,14 @@ NvmeBaseMemPageOffset ( **/
EFI_STATUS
NvmeWaitController (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN BOOLEAN WaitReady
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN BOOLEAN WaitReady
)
{
- NVME_CSTS Csts;
- EFI_STATUS Status;
- UINT32 Index;
- UINT8 Timeout;
+ NVME_CSTS Csts;
+ EFI_STATUS Status;
+ UINT32 Index;
+ UINT8 Timeout;
//
// Cap.To specifies max delay time in 500ms increments for Csts.Rdy to set after
@@ -181,19 +183,19 @@ NvmeWaitController ( }
Status = EFI_SUCCESS;
- for(Index = (Timeout * 500); Index != 0; --Index) {
+ for (Index = (Timeout * 500); Index != 0; --Index) {
MicroSecondDelay (1000);
//
// Check if the controller is initialized
//
Status = NVME_GET_CSTS (Private, &Csts);
- if (EFI_ERROR(Status)) {
+ if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: NVME_GET_CSTS fail, Status - %r\n", __FUNCTION__, Status));
return Status;
}
- if ((BOOLEAN) Csts.Rdy == WaitReady) {
+ if ((BOOLEAN)Csts.Rdy == WaitReady) {
break;
}
}
@@ -216,12 +218,12 @@ NvmeWaitController ( **/
EFI_STATUS
NvmeDisableController (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- NVME_CC Cc;
- NVME_CSTS Csts;
- EFI_STATUS Status;
+ NVME_CC Cc;
+ NVME_CSTS Csts;
+ EFI_STATUS Status;
Status = NVME_GET_CSTS (Private, &Csts);
@@ -271,11 +273,11 @@ ErrorExit: **/
EFI_STATUS
NvmeEnableController (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- NVME_CC Cc;
- EFI_STATUS Status;
+ NVME_CC Cc;
+ EFI_STATUS Status;
//
// Enable the controller
@@ -316,25 +318,25 @@ ErrorExit: **/
EFI_STATUS
NvmeIdentifyController (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN VOID *Buffer
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN VOID *Buffer
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
Command.Cdw0.Opcode = NVME_ADMIN_IDENTIFY_CMD;
//
// According to Nvm Express 1.1 spec Figure 38, When not used, the field shall be cleared to 0h.
// For the Identify command, the Namespace Identifier is only used for the Namespace Data structure.
//
- Command.Nsid = 0;
+ Command.Nsid = 0;
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
@@ -369,19 +371,19 @@ NvmeIdentifyController ( **/
EFI_STATUS
NvmeIdentifyNamespace (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN VOID *Buffer
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN VOID *Buffer
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
Command.Cdw0.Opcode = NVME_ADMIN_IDENTIFY_CMD;
Command.Nsid = NamespaceId;
@@ -414,11 +416,11 @@ NvmeIdentifyNamespace ( **/
VOID
NvmeDumpControllerData (
- IN NVME_ADMIN_CONTROLLER_DATA *ControllerData
+ IN NVME_ADMIN_CONTROLLER_DATA *ControllerData
)
{
- UINT8 Sn[21];
- UINT8 Mn[41];
+ UINT8 Sn[21];
+ UINT8 Mn[41];
CopyMem (Sn, ControllerData->Sn, sizeof (ControllerData->Sn));
Sn[20] = 0;
@@ -428,11 +430,11 @@ NvmeDumpControllerData ( DEBUG ((DEBUG_INFO, " == NVME IDENTIFY CONTROLLER DATA ==\n"));
DEBUG ((DEBUG_INFO, " PCI VID : 0x%x\n", ControllerData->Vid));
DEBUG ((DEBUG_INFO, " PCI SSVID : 0x%x\n", ControllerData->Ssvid));
- DEBUG ((DEBUG_INFO, " SN : %a\n", Sn));
- DEBUG ((DEBUG_INFO, " MN : %a\n", Mn));
- DEBUG ((DEBUG_INFO, " FR : 0x%lx\n", *((UINT64*)ControllerData->Fr)));
+ DEBUG ((DEBUG_INFO, " SN : %a\n", Sn));
+ DEBUG ((DEBUG_INFO, " MN : %a\n", Mn));
+ DEBUG ((DEBUG_INFO, " FR : 0x%lx\n", *((UINT64 *)ControllerData->Fr)));
DEBUG ((DEBUG_INFO, " RAB : 0x%x\n", ControllerData->Rab));
- DEBUG ((DEBUG_INFO, " IEEE : 0x%x\n", *(UINT32*)ControllerData->Ieee_oui));
+ DEBUG ((DEBUG_INFO, " IEEE : 0x%x\n", *(UINT32 *)ControllerData->Ieee_oui));
DEBUG ((DEBUG_INFO, " AERL : 0x%x\n", ControllerData->Aerl));
DEBUG ((DEBUG_INFO, " SQES : 0x%x\n", ControllerData->Sqes));
DEBUG ((DEBUG_INFO, " CQES : 0x%x\n", ControllerData->Cqes));
@@ -451,24 +453,24 @@ NvmeDumpControllerData ( **/
EFI_STATUS
NvmeCreateIoCompletionQueue (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- NVME_ADMIN_CRIOCQ CrIoCq;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ NVME_ADMIN_CRIOCQ CrIoCq;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
- ZeroMem (&CrIoCq, sizeof(NVME_ADMIN_CRIOCQ));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CrIoCq, sizeof (NVME_ADMIN_CRIOCQ));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
- Command.Cdw0.Opcode = NVME_ADMIN_CRIOCQ_CMD;
+ Command.Cdw0.Opcode = NVME_ADMIN_CRIOCQ_CMD;
CommandPacket.TransferBuffer = Private->CqBuffer[NVME_IO_QUEUE];
CommandPacket.TransferLength = EFI_PAGE_SIZE;
CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
@@ -499,24 +501,24 @@ NvmeCreateIoCompletionQueue ( **/
EFI_STATUS
NvmeCreateIoSubmissionQueue (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- NVME_ADMIN_CRIOSQ CrIoSq;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ NVME_ADMIN_CRIOSQ CrIoSq;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
- ZeroMem (&CrIoSq, sizeof(NVME_ADMIN_CRIOSQ));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CrIoSq, sizeof (NVME_ADMIN_CRIOSQ));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
- Command.Cdw0.Opcode = NVME_ADMIN_CRIOSQ_CMD;
+ Command.Cdw0.Opcode = NVME_ADMIN_CRIOSQ_CMD;
CommandPacket.TransferBuffer = Private->SqBuffer[NVME_IO_QUEUE];
CommandPacket.TransferLength = EFI_PAGE_SIZE;
CommandPacket.CommandTimeout = NVME_GENERIC_TIMEOUT;
@@ -549,15 +551,15 @@ NvmeCreateIoSubmissionQueue ( **/
EFI_STATUS
NvmeControllerInit (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
- EFI_STATUS Status;
- UINTN Index;
- NVME_AQA Aqa;
- NVME_ASQ Asq;
- NVME_ACQ Acq;
- NVME_VER Ver;
+ EFI_STATUS Status;
+ UINTN Index;
+ NVME_AQA Aqa;
+ NVME_ASQ Asq;
+ NVME_ACQ Acq;
+ NVME_VER Ver;
//
// Dump the NVME controller implementation version
@@ -589,6 +591,7 @@ NvmeControllerInit ( ZeroMem ((VOID *)(UINTN)(&Private->SqTdbl[Index]), sizeof (NVME_SQTDBL));
ZeroMem ((VOID *)(UINTN)(&Private->CqHdbl[Index]), sizeof (NVME_CQHDBL));
}
+
ZeroMem (Private->Buffer, EFI_PAGE_SIZE * NVME_MEM_MAX_PAGES);
//
@@ -657,11 +660,13 @@ NvmeControllerInit ( return EFI_OUT_OF_RESOURCES;
}
}
+
Status = NvmeIdentifyController (Private, Private->ControllerData);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: NvmeIdentifyController fail, Status - %r\n", __FUNCTION__, Status));
return Status;
}
+
NvmeDumpControllerData (Private->ControllerData);
//
@@ -684,6 +689,7 @@ NvmeControllerInit ( DEBUG ((DEBUG_ERROR, "%a: Create IO completion queue fail, Status - %r\n", __FUNCTION__, Status));
return Status;
}
+
Status = NvmeCreateIoSubmissionQueue (Private);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "%a: Create IO submission queue fail, Status - %r\n", __FUNCTION__, Status));
@@ -700,17 +706,17 @@ NvmeControllerInit ( **/
VOID
NvmeFreeDmaResource (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
)
{
ASSERT (Private != NULL);
if (Private->BufferMapping != NULL) {
IoMmuFreeBuffer (
- NVME_MEM_MAX_PAGES,
- Private->Buffer,
- Private->BufferMapping
- );
+ NVME_MEM_MAX_PAGES,
+ Private->Buffer,
+ Private->BufferMapping
+ );
}
return;
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h index 89fee735fe..a6bec510f0 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiHci.h @@ -43,14 +43,13 @@ enum { //
// All of base memories are 4K(0x1000) alignment
//
-#define ALIGN(v, a) (UINTN)((((v) - 1) | ((a) - 1)) + 1)
-#define NVME_MEM_BASE(Private) ((UINTN)(Private->Buffer))
-#define NVME_ASQ_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_ASQ)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-#define NVME_ACQ_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_ACQ)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-#define NVME_SQ_BASE(Private, Index) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_SQ) + ((Index)*(NVME_MAX_QUEUES-1))) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-#define NVME_CQ_BASE(Private, Index) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_CQ) + ((Index)*(NVME_MAX_QUEUES-1))) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-#define NVME_PRP_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_PRP)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
-
+#define ALIGN(v, a) (UINTN)((((v) - 1) | ((a) - 1)) + 1)
+#define NVME_MEM_BASE(Private) ((UINTN)(Private->Buffer))
+#define NVME_ASQ_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_ASQ)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
+#define NVME_ACQ_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_ACQ)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
+#define NVME_SQ_BASE(Private, Index) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_SQ) + ((Index)*(NVME_MAX_QUEUES-1))) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
+#define NVME_CQ_BASE(Private, Index) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_CQ) + ((Index)*(NVME_MAX_QUEUES-1))) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
+#define NVME_PRP_BASE(Private) (ALIGN (NVME_MEM_BASE(Private) + ((NvmeBaseMemPageOffset (BASEMEM_PRP)) * EFI_PAGE_SIZE), EFI_PAGE_SIZE))
/**
Transfer MMIO Data to memory.
@@ -64,9 +63,9 @@ enum { **/
EFI_STATUS
NvmeMmioRead (
- IN OUT VOID *MemBuffer,
- IN UINTN MmioAddr,
- IN UINTN Size
+ IN OUT VOID *MemBuffer,
+ IN UINTN MmioAddr,
+ IN UINTN Size
);
/**
@@ -81,9 +80,9 @@ NvmeMmioRead ( **/
EFI_STATUS
NvmeMmioWrite (
- IN OUT UINTN MmioAddr,
- IN VOID *MemBuffer,
- IN UINTN Size
+ IN OUT UINTN MmioAddr,
+ IN VOID *MemBuffer,
+ IN UINTN Size
);
/**
@@ -96,7 +95,7 @@ NvmeMmioWrite ( **/
UINT32
NvmeBaseMemPageOffset (
- IN UINTN BaseMemIndex
+ IN UINTN BaseMemIndex
);
/**
@@ -110,7 +109,7 @@ NvmeBaseMemPageOffset ( **/
EFI_STATUS
NvmeControllerInit (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
);
/**
@@ -126,9 +125,9 @@ NvmeControllerInit ( **/
EFI_STATUS
NvmeIdentifyNamespace (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN VOID *Buffer
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN VOID *Buffer
);
/**
@@ -139,7 +138,7 @@ NvmeIdentifyNamespace ( **/
VOID
NvmeFreeDmaResource (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c index 370a54e5a2..dc280ec4e3 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.c @@ -22,22 +22,22 @@ **/
UINT64
NvmeCreatePrpList (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN EFI_PHYSICAL_ADDRESS PhysicalAddr,
- IN UINTN Pages
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN EFI_PHYSICAL_ADDRESS PhysicalAddr,
+ IN UINTN Pages
)
{
- UINTN PrpEntryNo;
- UINTN PrpListNo;
- UINT64 PrpListBase;
- VOID *PrpListHost;
- UINTN PrpListIndex;
- UINTN PrpEntryIndex;
- UINT64 Remainder;
- EFI_PHYSICAL_ADDRESS PrpListPhyAddr;
- UINTN Bytes;
- UINT8 *PrpEntry;
- EFI_PHYSICAL_ADDRESS NewPhyAddr;
+ UINTN PrpEntryNo;
+ UINTN PrpListNo;
+ UINT64 PrpListBase;
+ VOID *PrpListHost;
+ UINTN PrpListIndex;
+ UINTN PrpEntryIndex;
+ UINT64 Remainder;
+ EFI_PHYSICAL_ADDRESS PrpListPhyAddr;
+ UINTN Bytes;
+ UINT8 *PrpEntry;
+ EFI_PHYSICAL_ADDRESS NewPhyAddr;
//
// The number of Prp Entry in a memory page.
@@ -47,7 +47,7 @@ NvmeCreatePrpList ( //
// Calculate total PrpList number.
//
- PrpListNo = (UINTN) DivU64x64Remainder ((UINT64)Pages, (UINT64)PrpEntryNo, &Remainder);
+ PrpListNo = (UINTN)DivU64x64Remainder ((UINT64)Pages, (UINT64)PrpEntryNo, &Remainder);
if (Remainder != 0) {
PrpListNo += 1;
}
@@ -62,9 +62,10 @@ NvmeCreatePrpList ( ));
return 0;
}
- PrpListHost = (VOID *)(UINTN) NVME_PRP_BASE (Private);
- Bytes = EFI_PAGES_TO_SIZE (PrpListNo);
+ PrpListHost = (VOID *)(UINTN)NVME_PRP_BASE (Private);
+
+ Bytes = EFI_PAGES_TO_SIZE (PrpListNo);
PrpListPhyAddr = (UINT64)(UINTN)(PrpListHost);
//
@@ -75,19 +76,19 @@ NvmeCreatePrpList ( PrpListBase = (UINTN)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
for (PrpEntryIndex = 0; PrpEntryIndex < PrpEntryNo; ++PrpEntryIndex) {
- PrpEntry = (UINT8 *)(UINTN) (PrpListBase + PrpEntryIndex * sizeof(UINT64));
+ PrpEntry = (UINT8 *)(UINTN)(PrpListBase + PrpEntryIndex * sizeof (UINT64));
if (PrpEntryIndex != PrpEntryNo - 1) {
//
// Fill all PRP entries except of last one.
//
- CopyMem (PrpEntry, (VOID *)(UINTN) (&PhysicalAddr), sizeof (UINT64));
+ CopyMem (PrpEntry, (VOID *)(UINTN)(&PhysicalAddr), sizeof (UINT64));
PhysicalAddr += EFI_PAGE_SIZE;
} else {
//
// Fill last PRP entries with next PRP List pointer.
//
NewPhyAddr = (PrpListPhyAddr + (PrpListIndex + 1) * EFI_PAGE_SIZE);
- CopyMem (PrpEntry, (VOID *)(UINTN) (&NewPhyAddr), sizeof (UINT64));
+ CopyMem (PrpEntry, (VOID *)(UINTN)(&NewPhyAddr), sizeof (UINT64));
}
}
}
@@ -97,8 +98,8 @@ NvmeCreatePrpList ( //
PrpListBase = (UINTN)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
for (PrpEntryIndex = 0; PrpEntryIndex < ((Remainder != 0) ? Remainder : PrpEntryNo); ++PrpEntryIndex) {
- PrpEntry = (UINT8 *)(UINTN) (PrpListBase + PrpEntryIndex * sizeof(UINT64));
- CopyMem (PrpEntry, (VOID *)(UINTN) (&PhysicalAddr), sizeof (UINT64));
+ PrpEntry = (UINT8 *)(UINTN)(PrpListBase + PrpEntryIndex * sizeof (UINT64));
+ CopyMem (PrpEntry, (VOID *)(UINTN)(&PhysicalAddr), sizeof (UINT64));
PhysicalAddr += EFI_PAGE_SIZE;
}
@@ -114,10 +115,10 @@ NvmeCreatePrpList ( **/
EFI_STATUS
NvmeCheckCqStatus (
- IN NVME_CQ *Cq
+ IN NVME_CQ *Cq
)
{
- if (Cq->Sct == 0x0 && Cq->Sc == 0x0) {
+ if ((Cq->Sct == 0x0) && (Cq->Sc == 0x0)) {
return EFI_SUCCESS;
}
@@ -202,6 +203,7 @@ NvmeCheckCqStatus ( DEBUG ((DEBUG_INFO, "Reservation Conflict\n"));
break;
}
+
break;
case 0x1:
@@ -264,6 +266,7 @@ NvmeCheckCqStatus ( DEBUG ((DEBUG_INFO, "Attempted Write to Read Only Range\n"));
break;
}
+
break;
case 0x2:
@@ -290,6 +293,7 @@ NvmeCheckCqStatus ( DEBUG ((DEBUG_INFO, "Access Denied\n"));
break;
}
+
break;
default:
@@ -333,26 +337,26 @@ NvmeCheckCqStatus ( **/
EFI_STATUS
NvmePassThruExecute (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
)
{
- EFI_STATUS Status;
- NVME_SQ *Sq;
- NVME_CQ *Cq;
- UINT8 QueueId;
- UINTN SqSize;
- UINTN CqSize;
- EDKII_IOMMU_OPERATION MapOp;
- UINTN MapLength;
- EFI_PHYSICAL_ADDRESS PhyAddr;
- VOID *MapData;
- VOID *MapMeta;
- UINT32 Bytes;
- UINT32 Offset;
- UINT32 Data32;
- UINT64 Timer;
+ EFI_STATUS Status;
+ NVME_SQ *Sq;
+ NVME_CQ *Cq;
+ UINT8 QueueId;
+ UINTN SqSize;
+ UINTN CqSize;
+ EDKII_IOMMU_OPERATION MapOp;
+ UINTN MapLength;
+ EFI_PHYSICAL_ADDRESS PhyAddr;
+ VOID *MapData;
+ VOID *MapMeta;
+ UINT32 Bytes;
+ UINT32 Offset;
+ UINT32 Data32;
+ UINT64 Timer;
//
// Check the data fields in Packet parameter
@@ -378,7 +382,7 @@ NvmePassThruExecute ( return EFI_INVALID_PARAMETER;
}
- if (Packet->QueueType != NVME_ADMIN_QUEUE && Packet->QueueType != NVME_IO_QUEUE) {
+ if ((Packet->QueueType != NVME_ADMIN_QUEUE) && (Packet->QueueType != NVME_IO_QUEUE)) {
DEBUG ((
DEBUG_ERROR,
"%a, Invalid parameter: QueueId(%lx)\n",
@@ -413,7 +417,7 @@ NvmePassThruExecute ( ZeroMem (Sq, sizeof (NVME_SQ));
Sq->Opc = (UINT8)Packet->NvmeCmd->Cdw0.Opcode;
Sq->Fuse = (UINT8)Packet->NvmeCmd->Cdw0.FusedOperation;
- Sq->Cid = Private->Cid[QueueId]++;;
+ Sq->Cid = Private->Cid[QueueId]++;
Sq->Nsid = Packet->NvmeCmd->Nsid;
//
@@ -436,7 +440,8 @@ NvmePassThruExecute ( //
if ((Sq->Opc & (BIT0 | BIT1)) != 0) {
if (((Packet->TransferLength != 0) && (Packet->TransferBuffer == NULL)) ||
- ((Packet->TransferLength == 0) && (Packet->TransferBuffer != NULL))) {
+ ((Packet->TransferLength == 0) && (Packet->TransferBuffer != NULL)))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -445,9 +450,11 @@ NvmePassThruExecute ( // allocated internally by the driver.
//
if ((Packet->QueueType == NVME_ADMIN_QUEUE) &&
- ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD))) {
+ ((Sq->Opc == NVME_ADMIN_CRIOCQ_CMD) || (Sq->Opc == NVME_ADMIN_CRIOSQ_CMD)))
+ {
if ((Packet->TransferBuffer != Private->SqBuffer[NVME_IO_QUEUE]) &&
- (Packet->TransferBuffer != Private->CqBuffer[NVME_IO_QUEUE])) {
+ (Packet->TransferBuffer != Private->CqBuffer[NVME_IO_QUEUE]))
+ {
DEBUG ((
DEBUG_ERROR,
"%a: Does not support external IO queues creation request.\n",
@@ -464,13 +471,13 @@ NvmePassThruExecute ( if ((Packet->TransferLength != 0) && (Packet->TransferBuffer != NULL)) {
MapLength = Packet->TransferLength;
- Status = IoMmuMap (
- MapOp,
- Packet->TransferBuffer,
- &MapLength,
- &PhyAddr,
- &MapData
- );
+ Status = IoMmuMap (
+ MapOp,
+ Packet->TransferBuffer,
+ &MapLength,
+ &PhyAddr,
+ &MapData
+ );
if (EFI_ERROR (Status) || (MapLength != Packet->TransferLength)) {
Status = EFI_OUT_OF_RESOURCES;
DEBUG ((DEBUG_ERROR, "%a: Fail to map data buffer.\n", __FUNCTION__));
@@ -480,20 +487,21 @@ NvmePassThruExecute ( Sq->Prp[0] = PhyAddr;
}
- if((Packet->MetadataLength != 0) && (Packet->MetadataBuffer != NULL)) {
+ if ((Packet->MetadataLength != 0) && (Packet->MetadataBuffer != NULL)) {
MapLength = Packet->MetadataLength;
- Status = IoMmuMap (
- MapOp,
- Packet->MetadataBuffer,
- &MapLength,
- &PhyAddr,
- &MapMeta
- );
+ Status = IoMmuMap (
+ MapOp,
+ Packet->MetadataBuffer,
+ &MapLength,
+ &PhyAddr,
+ &MapMeta
+ );
if (EFI_ERROR (Status) || (MapLength != Packet->MetadataLength)) {
Status = EFI_OUT_OF_RESOURCES;
DEBUG ((DEBUG_ERROR, "%a: Fail to map meta data buffer.\n", __FUNCTION__));
goto Exit;
}
+
Sq->Mptr = PhyAddr;
}
}
@@ -510,18 +518,17 @@ NvmePassThruExecute ( //
// Create PrpList for remaining Data Buffer.
//
- PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
+ PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
Sq->Prp[1] = NvmeCreatePrpList (
Private,
PhyAddr,
- EFI_SIZE_TO_PAGES(Offset + Bytes) - 1
+ EFI_SIZE_TO_PAGES (Offset + Bytes) - 1
);
if (Sq->Prp[1] == 0) {
Status = EFI_OUT_OF_RESOURCES;
DEBUG ((DEBUG_ERROR, "%a: Create PRP list fail, Status - %r\n", __FUNCTION__, Status));
goto Exit;
}
-
} else if ((Offset + Bytes) > EFI_PAGE_SIZE) {
Sq->Prp[1] = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
}
@@ -529,18 +536,23 @@ NvmePassThruExecute ( if (Packet->NvmeCmd->Flags & CDW10_VALID) {
Sq->Payload.Raw.Cdw10 = Packet->NvmeCmd->Cdw10;
}
+
if (Packet->NvmeCmd->Flags & CDW11_VALID) {
Sq->Payload.Raw.Cdw11 = Packet->NvmeCmd->Cdw11;
}
+
if (Packet->NvmeCmd->Flags & CDW12_VALID) {
Sq->Payload.Raw.Cdw12 = Packet->NvmeCmd->Cdw12;
}
+
if (Packet->NvmeCmd->Flags & CDW13_VALID) {
Sq->Payload.Raw.Cdw13 = Packet->NvmeCmd->Cdw13;
}
+
if (Packet->NvmeCmd->Flags & CDW14_VALID) {
Sq->Payload.Raw.Cdw14 = Packet->NvmeCmd->Cdw14;
}
+
if (Packet->NvmeCmd->Flags & CDW15_VALID) {
Sq->Payload.Raw.Cdw15 = Packet->NvmeCmd->Cdw15;
}
@@ -552,6 +564,7 @@ NvmePassThruExecute ( if (Private->SqTdbl[QueueId].Sqt == SqSize) {
Private->SqTdbl[QueueId].Sqt = 0;
}
+
Data32 = ReadUnaligned32 ((UINT32 *)&Private->SqTdbl[QueueId]);
Status = NVME_SET_SQTDBL (Private, QueueId, &Data32);
if (EFI_ERROR (Status)) {
@@ -588,6 +601,7 @@ NvmePassThruExecute ( //
Status = EFI_TIMEOUT;
}
+
goto Exit;
}
@@ -597,7 +611,7 @@ NvmePassThruExecute ( Private->CqHdbl[QueueId].Cqh++;
if (Private->CqHdbl[QueueId].Cqh == CqSize) {
Private->CqHdbl[QueueId].Cqh = 0;
- Private->Pt[QueueId] ^= 1;
+ Private->Pt[QueueId] ^= 1;
}
//
@@ -643,14 +657,14 @@ Exit: EFI_STATUS
EFIAPI
NvmePassThruGetDevicePath (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || DevicePathLength == NULL || DevicePath == NULL) {
+ if ((This == NULL) || (DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -705,15 +719,15 @@ NvmePassThruGetDevicePath ( EFI_STATUS
EFIAPI
NvmePassThruGetNextNameSpace (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- IN OUT UINT32 *NamespaceId
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN OUT UINT32 *NamespaceId
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- UINT32 DeviceIndex;
- EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ UINT32 DeviceIndex;
+ EFI_STATUS Status;
- if (This == NULL || NamespaceId == NULL) {
+ if ((This == NULL) || (NamespaceId == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -736,7 +750,7 @@ NvmePassThruGetNextNameSpace ( // Start with the first namespace ID
//
*NamespaceId = Private->NamespaceInfo[0].NamespaceId;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
} else {
if (*NamespaceId > Private->ControllerData->Nn) {
return EFI_INVALID_PARAMETER;
@@ -750,15 +764,15 @@ NvmePassThruGetNextNameSpace ( if (*NamespaceId == Private->NamespaceInfo[DeviceIndex].NamespaceId) {
if ((DeviceIndex + 1) < Private->ActiveNamespaceNum) {
*NamespaceId = Private->NamespaceInfo[DeviceIndex + 1].NamespaceId;
- Status = EFI_SUCCESS;
+ Status = EFI_SUCCESS;
}
+
break;
}
}
}
return Status;
-
}
/**
@@ -795,15 +809,15 @@ NvmePassThruGetNextNameSpace ( EFI_STATUS
EFIAPI
NvmePassThru (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
- if (This == NULL || Packet == NULL) {
+ if ((This == NULL) || (Packet == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -812,7 +826,8 @@ NvmePassThru ( // Check NamespaceId is valid or not.
//
if ((NamespaceId > Private->ControllerData->Nn) &&
- (NamespaceId != (UINT32) -1)) {
+ (NamespaceId != (UINT32)-1))
+ {
return EFI_INVALID_PARAMETER;
}
@@ -823,6 +838,4 @@ NvmePassThru ( );
return Status;
-
}
-
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h index 00e8f0abda..080e785126 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiPassThru.h @@ -11,8 +11,6 @@ #ifndef _NVM_EXPRESS_PEI_PASSTHRU_H_
#define _NVM_EXPRESS_PEI_PASSTHRU_H_
-
-
/**
Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function only
supports blocking execution of the command.
@@ -46,9 +44,9 @@ **/
EFI_STATUS
NvmePassThruExecute (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
);
/**
@@ -71,9 +69,9 @@ NvmePassThruExecute ( EFI_STATUS
EFIAPI
NvmePassThruGetDevicePath (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- OUT UINTN *DevicePathLength,
- OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ OUT UINTN *DevicePathLength,
+ OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
);
/**
@@ -115,8 +113,8 @@ NvmePassThruGetDevicePath ( EFI_STATUS
EFIAPI
NvmePassThruGetNextNameSpace (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- IN OUT UINT32 *NamespaceId
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN OUT UINT32 *NamespaceId
);
/**
@@ -153,9 +151,9 @@ NvmePassThruGetNextNameSpace ( EFI_STATUS
EFIAPI
NvmePassThru (
- IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
- IN UINT32 NamespaceId,
- IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
+ IN EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *This,
+ IN UINT32 NamespaceId,
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet
);
#endif
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c index f409285d54..d704c62eaa 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiS3.c @@ -26,18 +26,18 @@ **/
BOOLEAN
NvmeS3SkipThisController (
- IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
- IN UINTN HcDevicePathLength
+ IN EFI_DEVICE_PATH_PROTOCOL *HcDevicePath,
+ IN UINTN HcDevicePathLength
)
{
- EFI_STATUS Status;
- UINT8 DummyData;
- UINTN S3InitDevicesLength;
- EFI_DEVICE_PATH_PROTOCOL *S3InitDevices;
- EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
- UINTN DevicePathInstLength;
- BOOLEAN EntireEnd;
- BOOLEAN Skip;
+ EFI_STATUS Status;
+ UINT8 DummyData;
+ UINTN S3InitDevicesLength;
+ EFI_DEVICE_PATH_PROTOCOL *S3InitDevices;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePathInst;
+ UINTN DevicePathInstLength;
+ BOOLEAN EntireEnd;
+ BOOLEAN Skip;
//
// From the LockBox, get the list of device paths for devices need to be
@@ -47,7 +47,7 @@ NvmeS3SkipThisController ( S3InitDevicesLength = sizeof (DummyData);
EntireEnd = FALSE;
Skip = TRUE;
- Status = RestoreLockBox (&gS3StorageDeviceInitListGuid, &DummyData, &S3InitDevicesLength);
+ Status = RestoreLockBox (&gS3StorageDeviceInitListGuid, &DummyData, &S3InitDevicesLength);
if (Status != EFI_BUFFER_TOO_SMALL) {
return Skip;
} else {
@@ -83,7 +83,7 @@ NvmeS3SkipThisController ( }
DevicePathInst = S3InitDevices;
- S3InitDevices = (EFI_DEVICE_PATH_PROTOCOL *)((UINTN) S3InitDevices + DevicePathInstLength);
+ S3InitDevices = (EFI_DEVICE_PATH_PROTOCOL *)((UINTN)S3InitDevices + DevicePathInstLength);
if (HcDevicePathLength >= DevicePathInstLength) {
continue;
@@ -97,7 +97,8 @@ NvmeS3SkipThisController ( DevicePathInst,
HcDevicePath,
HcDevicePathLength - sizeof (EFI_DEVICE_PATH_PROTOCOL)
- ) == 0) {
+ ) == 0)
+ {
Skip = FALSE;
break;
}
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c index 094d61bb8a..d45487efed 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.c @@ -47,27 +47,27 @@ **/
EFI_STATUS
TrustTransferNvmeDevice (
- IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
- IN OUT VOID *Buffer,
- IN UINT8 SecurityProtocolId,
- IN UINT16 SecurityProtocolSpecificData,
- IN UINTN TransferLength,
- IN BOOLEAN IsTrustSend,
- IN UINT64 Timeout,
- OUT UINTN *TransferLengthOut
+ IN PEI_NVME_CONTROLLER_PRIVATE_DATA *Private,
+ IN OUT VOID *Buffer,
+ IN UINT8 SecurityProtocolId,
+ IN UINT16 SecurityProtocolSpecificData,
+ IN UINTN TransferLength,
+ IN BOOLEAN IsTrustSend,
+ IN UINT64 Timeout,
+ OUT UINTN *TransferLengthOut
)
{
- EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
- EFI_NVM_EXPRESS_COMMAND Command;
- EFI_NVM_EXPRESS_COMPLETION Completion;
- EFI_STATUS Status;
- UINT16 SpecificData;
- EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *NvmePassThru;
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET CommandPacket;
+ EFI_NVM_EXPRESS_COMMAND Command;
+ EFI_NVM_EXPRESS_COMPLETION Completion;
+ EFI_STATUS Status;
+ UINT16 SpecificData;
+ EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI *NvmePassThru;
NvmePassThru = &Private->NvmePassThruPpi;
- ZeroMem (&CommandPacket, sizeof(EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
- ZeroMem (&Command, sizeof(EFI_NVM_EXPRESS_COMMAND));
- ZeroMem (&Completion, sizeof(EFI_NVM_EXPRESS_COMPLETION));
+ ZeroMem (&CommandPacket, sizeof (EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET));
+ ZeroMem (&Command, sizeof (EFI_NVM_EXPRESS_COMMAND));
+ ZeroMem (&Completion, sizeof (EFI_NVM_EXPRESS_COMPLETION));
CommandPacket.NvmeCmd = &Command;
CommandPacket.NvmeCompletion = &Completion;
@@ -103,10 +103,10 @@ TrustTransferNvmeDevice ( );
if (!IsTrustSend) {
- if (EFI_ERROR (Status)) {
+ if (EFI_ERROR (Status)) {
*TransferLengthOut = 0;
} else {
- *TransferLengthOut = (UINTN) TransferLength;
+ *TransferLengthOut = (UINTN)TransferLength;
}
}
@@ -126,17 +126,17 @@ TrustTransferNvmeDevice ( EFI_STATUS
EFIAPI
NvmeStorageSecurityGetDeviceNo (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- OUT UINTN *NumberofDevices
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ OUT UINTN *NumberofDevices
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || NumberofDevices == NULL) {
+ if ((This == NULL) || (NumberofDevices == NULL)) {
return EFI_INVALID_PARAMETER;
}
- Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_STROAGE_SECURITY (This);
+ Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_STROAGE_SECURITY (This);
*NumberofDevices = Private->ActiveNamespaceNum;
return EFI_SUCCESS;
@@ -176,9 +176,9 @@ NvmeStorageSecurityGetDevicePath ( OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- if (This == NULL || DevicePathLength == NULL || DevicePath == NULL) {
+ if ((This == NULL) || (DevicePathLength == NULL) || (DevicePath == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -295,8 +295,8 @@ NvmeStorageSecurityReceiveData ( OUT UINTN *PayloadTransferSize
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
if ((PayloadBuffer == NULL) || (PayloadTransferSize == NULL) || (PayloadBufferSize == 0)) {
return EFI_INVALID_PARAMETER;
@@ -394,8 +394,8 @@ NvmeStorageSecuritySendData ( IN VOID *PayloadBuffer
)
{
- PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
- EFI_STATUS Status;
+ PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
+ EFI_STATUS Status;
if ((PayloadBuffer == NULL) && (PayloadBufferSize != 0)) {
return EFI_INVALID_PARAMETER;
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h index 18f3e1ce26..16351882ef 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPeiStorageSecurity.h @@ -24,8 +24,8 @@ EFI_STATUS
EFIAPI
NvmeStorageSecurityGetDeviceNo (
- IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
- OUT UINTN *NumberofDevices
+ IN EDKII_PEI_STORAGE_SECURITY_CMD_PPI *This,
+ OUT UINTN *NumberofDevices
);
/**
|