diff options
Diffstat (limited to 'MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h | 42 |
1 files changed, 20 insertions, 22 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h index cf9903270d..1822afea97 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciCommand.h @@ -6,7 +6,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/
-
#ifndef _EFI_PCI_COMMAND_H_
#define _EFI_PCI_COMMAND_H_
@@ -16,7 +15,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
-#define EFI_PCI_COMMAND_BITS_OWNED ( \
+#define EFI_PCI_COMMAND_BITS_OWNED ( \
EFI_PCI_COMMAND_IO_SPACE | \
EFI_PCI_COMMAND_MEMORY_SPACE | \
EFI_PCI_COMMAND_BUS_MASTER | \
@@ -31,7 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
-#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \
+#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \
EFI_PCI_BRIDGE_CONTROL_ISA | \
EFI_PCI_BRIDGE_CONTROL_VGA | \
EFI_PCI_BRIDGE_CONTROL_VGA_16 | \
@@ -44,13 +43,12 @@ SPDX-License-Identifier: BSD-2-Clause-Patent // They should be cleared at the beginning. The other registers
// are owned by chipset, we should not touch them.
//
-#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \
+#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \
EFI_PCI_BRIDGE_CONTROL_ISA | \
EFI_PCI_BRIDGE_CONTROL_VGA | \
EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
)
-
#define EFI_GET_REGISTER 1
#define EFI_SET_REGISTER 2
#define EFI_ENABLE_REGISTER 3
@@ -70,11 +68,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/
EFI_STATUS
PciOperateRegister (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT16 Command,
- IN UINT8 Offset,
- IN UINT8 Operation,
- OUT UINT16 *PtrCommand
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT16 Command,
+ IN UINT8 Offset,
+ IN UINT8 Operation,
+ OUT UINT16 *PtrCommand
);
/**
@@ -127,10 +125,10 @@ LocateCapabilityRegBlock ( **/
EFI_STATUS
LocatePciExpressCapabilityRegBlock (
- IN PCI_IO_DEVICE *PciIoDevice,
- IN UINT16 CapId,
- IN OUT UINT32 *Offset,
- OUT UINT32 *NextRegBlock OPTIONAL
+ IN PCI_IO_DEVICE *PciIoDevice,
+ IN UINT16 CapId,
+ IN OUT UINT32 *Offset,
+ OUT UINT32 *NextRegBlock OPTIONAL
);
/**
@@ -142,7 +140,7 @@ LocatePciExpressCapabilityRegBlock ( @return status of PciIo operation
**/
-#define PCI_READ_COMMAND_REGISTER(a,b) \
+#define PCI_READ_COMMAND_REGISTER(a, b) \
PciOperateRegister (a, 0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)
/**
@@ -154,7 +152,7 @@ LocatePciExpressCapabilityRegBlock ( @return status of PciIo operation
**/
-#define PCI_SET_COMMAND_REGISTER(a,b) \
+#define PCI_SET_COMMAND_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)
/**
@@ -166,7 +164,7 @@ LocatePciExpressCapabilityRegBlock ( @return status of PciIo operation
**/
-#define PCI_ENABLE_COMMAND_REGISTER(a,b) \
+#define PCI_ENABLE_COMMAND_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
/**
@@ -178,7 +176,7 @@ LocatePciExpressCapabilityRegBlock ( @return status of PciIo operation
**/
-#define PCI_DISABLE_COMMAND_REGISTER(a,b) \
+#define PCI_DISABLE_COMMAND_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)
/**
@@ -190,7 +188,7 @@ LocatePciExpressCapabilityRegBlock ( @return status of PciIo operation
**/
-#define PCI_READ_BRIDGE_CONTROL_REGISTER(a,b) \
+#define PCI_READ_BRIDGE_CONTROL_REGISTER(a, b) \
PciOperateRegister (a, 0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b)
/**
@@ -202,7 +200,7 @@ LocatePciExpressCapabilityRegBlock ( @return status of PciIo operation
**/
-#define PCI_SET_BRIDGE_CONTROL_REGISTER(a,b) \
+#define PCI_SET_BRIDGE_CONTROL_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL)
/**
@@ -214,7 +212,7 @@ LocatePciExpressCapabilityRegBlock ( @return status of PciIo operation
**/
-#define PCI_ENABLE_BRIDGE_CONTROL_REGISTER(a,b) \
+#define PCI_ENABLE_BRIDGE_CONTROL_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)
/**
@@ -226,7 +224,7 @@ LocatePciExpressCapabilityRegBlock ( @return status of PciIo operation
**/
-#define PCI_DISABLE_BRIDGE_CONTROL_REGISTER(a,b) \
+#define PCI_DISABLE_BRIDGE_CONTROL_REGISTER(a, b) \
PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL)
#endif
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