diff options
Diffstat (limited to 'MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h | 541 |
1 files changed, 267 insertions, 274 deletions
diff --git a/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h b/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h index 9100cbeabd..5b135f2558 100644 --- a/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h +++ b/MdeModulePkg/Bus/Pci/UhciPei/UhcPeim.h @@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #ifndef _RECOVERY_UHC_H_
#define _RECOVERY_UHC_H_
-
#include <PiPei.h>
#include <Ppi/UsbController.h>
@@ -26,39 +25,39 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/IoLib.h>
#include <Library/PeiServicesLib.h>
-#define USB_SLOW_SPEED_DEVICE 0x01
-#define USB_FULL_SPEED_DEVICE 0x02
+#define USB_SLOW_SPEED_DEVICE 0x01
+#define USB_FULL_SPEED_DEVICE 0x02
//
// One memory block uses 16 page
//
-#define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16
-
-#define USBCMD 0 /* Command Register Offset 00-01h */
-#define USBCMD_RS BIT0 /* Run/Stop */
-#define USBCMD_HCRESET BIT1 /* Host reset */
-#define USBCMD_GRESET BIT2 /* Global reset */
-#define USBCMD_EGSM BIT3 /* Global Suspend Mode */
-#define USBCMD_FGR BIT4 /* Force Global Resume */
-#define USBCMD_SWDBG BIT5 /* SW Debug mode */
-#define USBCMD_CF BIT6 /* Config Flag (sw only) */
-#define USBCMD_MAXP BIT7 /* Max Packet (0 = 32, 1 = 64) */
+#define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16
+
+#define USBCMD 0 /* Command Register Offset 00-01h */
+#define USBCMD_RS BIT0 /* Run/Stop */
+#define USBCMD_HCRESET BIT1 /* Host reset */
+#define USBCMD_GRESET BIT2 /* Global reset */
+#define USBCMD_EGSM BIT3 /* Global Suspend Mode */
+#define USBCMD_FGR BIT4 /* Force Global Resume */
+#define USBCMD_SWDBG BIT5 /* SW Debug mode */
+#define USBCMD_CF BIT6 /* Config Flag (sw only) */
+#define USBCMD_MAXP BIT7 /* Max Packet (0 = 32, 1 = 64) */
/* Status register */
-#define USBSTS 2 /* Status Register Offset 02-03h */
-#define USBSTS_USBINT BIT0 /* Interrupt due to IOC */
-#define USBSTS_ERROR BIT1 /* Interrupt due to error */
-#define USBSTS_RD BIT2 /* Resume Detect */
-#define USBSTS_HSE BIT3 /* Host System Error - basically PCI problems */
-#define USBSTS_HCPE BIT4 /* Host Controller Process Error - the scripts were buggy */
-#define USBSTS_HCH BIT5 /* HC Halted */
+#define USBSTS 2 /* Status Register Offset 02-03h */
+#define USBSTS_USBINT BIT0 /* Interrupt due to IOC */
+#define USBSTS_ERROR BIT1 /* Interrupt due to error */
+#define USBSTS_RD BIT2 /* Resume Detect */
+#define USBSTS_HSE BIT3 /* Host System Error - basically PCI problems */
+#define USBSTS_HCPE BIT4 /* Host Controller Process Error - the scripts were buggy */
+#define USBSTS_HCH BIT5 /* HC Halted */
/* Interrupt enable register */
-#define USBINTR 4 /* Interrupt Enable Register 04-05h */
-#define USBINTR_TIMEOUT BIT0 /* Timeout/CRC error enable */
-#define USBINTR_RESUME BIT1 /* Resume interrupt enable */
-#define USBINTR_IOC BIT2 /* Interrupt On Complete enable */
-#define USBINTR_SP BIT3 /* Short packet interrupt enable */
+#define USBINTR 4 /* Interrupt Enable Register 04-05h */
+#define USBINTR_TIMEOUT BIT0 /* Timeout/CRC error enable */
+#define USBINTR_RESUME BIT1 /* Resume interrupt enable */
+#define USBINTR_IOC BIT2 /* Interrupt On Complete enable */
+#define USBINTR_SP BIT3 /* Short packet interrupt enable */
/* Frame Number Register Offset 06-08h */
#define USBFRNUM 6
@@ -70,90 +69,89 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #define USBSOF 0x0c
/* USB port status and control registers */
-#define USBPORTSC1 0x10 /*Port 1 offset 10-11h */
-#define USBPORTSC2 0x12 /*Port 2 offset 12-13h */
-
-#define USBPORTSC_CCS BIT0 /* Current Connect Status ("device present") */
-#define USBPORTSC_CSC BIT1 /* Connect Status Change */
-#define USBPORTSC_PED BIT2 /* Port Enable / Disable */
-#define USBPORTSC_PEDC BIT3 /* Port Enable / Disable Change */
-#define USBPORTSC_LSL BIT4 /* Line Status Low bit*/
-#define USBPORTSC_LSH BIT5 /* Line Status High bit*/
-#define USBPORTSC_RD BIT6 /* Resume Detect */
-#define USBPORTSC_LSDA BIT8 /* Low Speed Device Attached */
-#define USBPORTSC_PR BIT9 /* Port Reset */
-#define USBPORTSC_SUSP BIT12 /* Suspend */
-
-#define SETUP_PACKET_ID 0x2D
-#define INPUT_PACKET_ID 0x69
-#define OUTPUT_PACKET_ID 0xE1
-#define ERROR_PACKET_ID 0x55
+#define USBPORTSC1 0x10 /*Port 1 offset 10-11h */
+#define USBPORTSC2 0x12 /*Port 2 offset 12-13h */
+
+#define USBPORTSC_CCS BIT0 /* Current Connect Status ("device present") */
+#define USBPORTSC_CSC BIT1 /* Connect Status Change */
+#define USBPORTSC_PED BIT2 /* Port Enable / Disable */
+#define USBPORTSC_PEDC BIT3 /* Port Enable / Disable Change */
+#define USBPORTSC_LSL BIT4 /* Line Status Low bit*/
+#define USBPORTSC_LSH BIT5 /* Line Status High bit*/
+#define USBPORTSC_RD BIT6 /* Resume Detect */
+#define USBPORTSC_LSDA BIT8 /* Low Speed Device Attached */
+#define USBPORTSC_PR BIT9 /* Port Reset */
+#define USBPORTSC_SUSP BIT12 /* Suspend */
+
+#define SETUP_PACKET_ID 0x2D
+#define INPUT_PACKET_ID 0x69
+#define OUTPUT_PACKET_ID 0xE1
+#define ERROR_PACKET_ID 0x55
#define STALL_1_MICRO_SECOND 1
#define STALL_1_MILLI_SECOND 1000
-
#pragma pack(1)
typedef struct {
- UINT32 FrameListPtrTerminate : 1;
- UINT32 FrameListPtrQSelect : 1;
- UINT32 FrameListRsvd : 2;
- UINT32 FrameListPtr : 28;
+ UINT32 FrameListPtrTerminate : 1;
+ UINT32 FrameListPtrQSelect : 1;
+ UINT32 FrameListRsvd : 2;
+ UINT32 FrameListPtr : 28;
} FRAMELIST_ENTRY;
typedef struct {
- UINT32 QHHorizontalTerminate : 1;
- UINT32 QHHorizontalQSelect : 1;
- UINT32 QHHorizontalRsvd : 2;
- UINT32 QHHorizontalPtr : 28;
- UINT32 QHVerticalTerminate : 1;
- UINT32 QHVerticalQSelect : 1;
- UINT32 QHVerticalRsvd : 2;
- UINT32 QHVerticalPtr : 28;
+ UINT32 QHHorizontalTerminate : 1;
+ UINT32 QHHorizontalQSelect : 1;
+ UINT32 QHHorizontalRsvd : 2;
+ UINT32 QHHorizontalPtr : 28;
+ UINT32 QHVerticalTerminate : 1;
+ UINT32 QHVerticalQSelect : 1;
+ UINT32 QHVerticalRsvd : 2;
+ UINT32 QHVerticalPtr : 28;
} QUEUE_HEAD;
typedef struct {
- QUEUE_HEAD QueueHead;
- UINT32 Reserved1;
- UINT32 Reserved2;
- VOID *PtrNext;
- VOID *PtrDown;
- VOID *Reserved3;
- UINT32 Reserved4;
+ QUEUE_HEAD QueueHead;
+ UINT32 Reserved1;
+ UINT32 Reserved2;
+ VOID *PtrNext;
+ VOID *PtrDown;
+ VOID *Reserved3;
+ UINT32 Reserved4;
} QH_STRUCT;
typedef struct {
- UINT32 TDLinkPtrTerminate : 1;
- UINT32 TDLinkPtrQSelect : 1;
- UINT32 TDLinkPtrDepthSelect : 1;
- UINT32 TDLinkPtrRsvd : 1;
- UINT32 TDLinkPtr : 28;
- UINT32 TDStatusActualLength : 11;
- UINT32 TDStatusRsvd : 5;
- UINT32 TDStatus : 8;
- UINT32 TDStatusIOC : 1;
- UINT32 TDStatusIOS : 1;
- UINT32 TDStatusLS : 1;
- UINT32 TDStatusErr : 2;
- UINT32 TDStatusSPD : 1;
- UINT32 TDStatusRsvd2 : 2;
- UINT32 TDTokenPID : 8;
- UINT32 TDTokenDevAddr : 7;
- UINT32 TDTokenEndPt : 4;
- UINT32 TDTokenDataToggle : 1;
- UINT32 TDTokenRsvd : 1;
- UINT32 TDTokenMaxLen : 11;
- UINT32 TDBufferPtr;
+ UINT32 TDLinkPtrTerminate : 1;
+ UINT32 TDLinkPtrQSelect : 1;
+ UINT32 TDLinkPtrDepthSelect : 1;
+ UINT32 TDLinkPtrRsvd : 1;
+ UINT32 TDLinkPtr : 28;
+ UINT32 TDStatusActualLength : 11;
+ UINT32 TDStatusRsvd : 5;
+ UINT32 TDStatus : 8;
+ UINT32 TDStatusIOC : 1;
+ UINT32 TDStatusIOS : 1;
+ UINT32 TDStatusLS : 1;
+ UINT32 TDStatusErr : 2;
+ UINT32 TDStatusSPD : 1;
+ UINT32 TDStatusRsvd2 : 2;
+ UINT32 TDTokenPID : 8;
+ UINT32 TDTokenDevAddr : 7;
+ UINT32 TDTokenEndPt : 4;
+ UINT32 TDTokenDataToggle : 1;
+ UINT32 TDTokenRsvd : 1;
+ UINT32 TDTokenMaxLen : 11;
+ UINT32 TDBufferPtr;
} TD;
typedef struct {
- TD TDData;
- UINT8 *PtrTDBuffer;
- VOID *PtrNextTD;
- VOID *PtrNextQH;
- UINT16 TDBufferLength;
- UINT16 Reserved;
+ TD TDData;
+ UINT8 *PtrTDBuffer;
+ VOID *PtrNextTD;
+ VOID *PtrNextQH;
+ UINT16 TDBufferLength;
+ UINT16 Reserved;
} TD_STRUCT;
#pragma pack()
@@ -161,38 +159,37 @@ typedef struct { typedef struct _MEMORY_MANAGE_HEADER MEMORY_MANAGE_HEADER;
struct _MEMORY_MANAGE_HEADER {
- UINT8 *BitArrayPtr;
- UINTN BitArraySizeInBytes;
- UINT8 *MemoryBlockPtr;
- UINTN MemoryBlockSizeInBytes;
- MEMORY_MANAGE_HEADER *Next;
+ UINT8 *BitArrayPtr;
+ UINTN BitArraySizeInBytes;
+ UINT8 *MemoryBlockPtr;
+ UINTN MemoryBlockSizeInBytes;
+ MEMORY_MANAGE_HEADER *Next;
};
-#define USB_UHC_DEV_SIGNATURE SIGNATURE_32 ('p', 'u', 'h', 'c')
+#define USB_UHC_DEV_SIGNATURE SIGNATURE_32 ('p', 'u', 'h', 'c')
typedef struct {
- UINTN Signature;
- PEI_USB_HOST_CONTROLLER_PPI UsbHostControllerPpi;
- EDKII_IOMMU_PPI *IoMmu;
- EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
+ UINTN Signature;
+ PEI_USB_HOST_CONTROLLER_PPI UsbHostControllerPpi;
+ EDKII_IOMMU_PPI *IoMmu;
+ EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;
//
// EndOfPei callback is used to stop the UHC DMA operation
// after exit PEI phase.
//
- EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;
- UINT32 UsbHostControllerBaseAddress;
- FRAMELIST_ENTRY *FrameListEntry;
- QH_STRUCT *ConfigQH;
- QH_STRUCT *BulkQH;
+ UINT32 UsbHostControllerBaseAddress;
+ FRAMELIST_ENTRY *FrameListEntry;
+ QH_STRUCT *ConfigQH;
+ QH_STRUCT *BulkQH;
//
// Header1 used for QH,TD memory blocks management
//
- MEMORY_MANAGE_HEADER *Header1;
-
+ MEMORY_MANAGE_HEADER *Header1;
} USB_UHC_DEV;
-#define PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS(a) CR (a, USB_UHC_DEV, UsbHostControllerPpi, USB_UHC_DEV_SIGNATURE)
-#define PEI_RECOVERY_USB_UHC_DEV_FROM_THIS_NOTIFY(a) CR (a, USB_UHC_DEV, EndOfPeiNotifyList, USB_UHC_DEV_SIGNATURE)
+#define PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS(a) CR (a, USB_UHC_DEV, UsbHostControllerPpi, USB_UHC_DEV_SIGNATURE)
+#define PEI_RECOVERY_USB_UHC_DEV_FROM_THIS_NOTIFY(a) CR (a, USB_UHC_DEV, EndOfPeiNotifyList, USB_UHC_DEV_SIGNATURE)
/**
Submits control transfer to a target USB device.
@@ -220,17 +217,17 @@ typedef struct { EFI_STATUS
EFIAPI
UhcControlTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI * This,
- IN UINT8 DeviceAddress,
- IN UINT8 DeviceSpeed,
- IN UINT8 MaximumPacketLength,
- IN EFI_USB_DEVICE_REQUEST * Request,
- IN EFI_USB_DATA_DIRECTION TransferDirection,
- IN OUT VOID *Data OPTIONAL,
- IN OUT UINTN *DataLength OPTIONAL,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINT8 MaximumPacketLength,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data OPTIONAL,
+ IN OUT UINTN *DataLength OPTIONAL,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
);
/**
@@ -263,16 +260,16 @@ UhcControlTransfer ( EFI_STATUS
EFIAPI
UhcBulkTransfer (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 DeviceAddress,
- IN UINT8 EndPointAddress,
- IN UINT8 MaximumPacketLength,
- IN OUT VOID *Data,
- IN OUT UINTN *DataLength,
- IN OUT UINT8 *DataToggle,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
);
/**
@@ -290,9 +287,9 @@ UhcBulkTransfer ( EFI_STATUS
EFIAPI
UhcGetRootHubPortNumber (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- OUT UINT8 *PortNumber
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ OUT UINT8 *PortNumber
);
/**
@@ -311,10 +308,10 @@ UhcGetRootHubPortNumber ( EFI_STATUS
EFIAPI
UhcGetRootHubPortStatus (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- OUT EFI_USB_PORT_STATUS *PortStatus
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
);
/**
@@ -333,10 +330,10 @@ UhcGetRootHubPortStatus ( EFI_STATUS
EFIAPI
UhcSetRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
);
/**
@@ -357,10 +354,10 @@ UhcSetRootHubPortFeature ( EFI_STATUS
EFIAPI
UhcClearRootHubPortFeature (
- IN EFI_PEI_SERVICES **PeiServices,
- IN PEI_USB_HOST_CONTROLLER_PPI *This,
- IN UINT8 PortNumber,
- IN EFI_USB_PORT_FEATURE PortFeature
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN PEI_USB_HOST_CONTROLLER_PPI *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
);
/**
@@ -374,7 +371,7 @@ UhcClearRootHubPortFeature ( **/
EFI_STATUS
InitializeUsbHC (
- IN USB_UHC_DEV *UhcDev
+ IN USB_UHC_DEV *UhcDev
);
/**
@@ -388,7 +385,7 @@ InitializeUsbHC ( **/
EFI_STATUS
CreateFrameList (
- USB_UHC_DEV *UhcDev
+ USB_UHC_DEV *UhcDev
);
/**
@@ -402,8 +399,8 @@ CreateFrameList ( **/
UINT16
USBReadPortW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port
);
/**
@@ -416,9 +413,9 @@ USBReadPortW ( **/
VOID
USBWritePortW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port,
- IN UINT16 Data
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port,
+ IN UINT16 Data
);
/**
@@ -431,9 +428,9 @@ USBWritePortW ( **/
VOID
USBWritePortDW (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Port,
- IN UINT32 Data
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Port,
+ IN UINT32 Data
);
/**
@@ -445,8 +442,8 @@ USBWritePortDW ( **/
VOID
ClearStatusReg (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 StatusAddr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 StatusAddr
);
/**
@@ -461,8 +458,8 @@ ClearStatusReg ( **/
BOOLEAN
IsStatusOK (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 StatusRegAddr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 StatusRegAddr
);
/**
@@ -475,9 +472,9 @@ IsStatusOK ( **/
VOID
SetFrameListBaseAddress (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 FrameListRegAddr,
- IN UINT32 Addr
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 FrameListRegAddr,
+ IN UINT32 Addr
);
/**
@@ -574,7 +571,6 @@ SetQHVerticalValidorInvalid ( IN BOOLEAN IsValid
);
-
/**
Allocate TD or QH Struct.
@@ -588,9 +584,9 @@ SetQHVerticalValidorInvalid ( **/
EFI_STATUS
AllocateTDorQHStruct (
- IN USB_UHC_DEV *UhcDev,
- IN UINT32 Size,
- OUT VOID **PtrStruct
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT32 Size,
+ OUT VOID **PtrStruct
);
/**
@@ -605,8 +601,8 @@ AllocateTDorQHStruct ( **/
EFI_STATUS
CreateTD (
- IN USB_UHC_DEV *UhcDev,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ OUT TD_STRUCT **PtrTD
);
/**
@@ -627,14 +623,14 @@ CreateTD ( **/
EFI_STATUS
GenSetupStageTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 DeviceSpeed,
- IN UINT8 *DevRequest,
- IN UINT8 *RequestPhy,
- IN UINT8 RequestLen,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 DeviceSpeed,
+ IN UINT8 *DevRequest,
+ IN UINT8 *RequestPhy,
+ IN UINT8 RequestLen,
+ OUT TD_STRUCT **PtrTD
);
/**
@@ -657,16 +653,16 @@ GenSetupStageTD ( **/
EFI_STATUS
GenDataTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 *PtrData,
- IN UINT8 *DataPhy,
- IN UINT8 Len,
- IN UINT8 PktID,
- IN UINT8 Toggle,
- IN UINT8 DeviceSpeed,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 *PtrData,
+ IN UINT8 *DataPhy,
+ IN UINT8 Len,
+ IN UINT8 PktID,
+ IN UINT8 Toggle,
+ IN UINT8 DeviceSpeed,
+ OUT TD_STRUCT **PtrTD
);
/**
@@ -685,12 +681,12 @@ GenDataTD ( **/
EFI_STATUS
CreateStatusTD (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 DevAddr,
- IN UINT8 Endpoint,
- IN UINT8 PktID,
- IN UINT8 DeviceSpeed,
- OUT TD_STRUCT **PtrTD
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 DevAddr,
+ IN UINT8 Endpoint,
+ IN UINT8 PktID,
+ IN UINT8 DeviceSpeed,
+ OUT TD_STRUCT **PtrTD
);
/**
@@ -702,8 +698,8 @@ CreateStatusTD ( **/
VOID
SetTDLinkPtrValidorInvalid (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsValid
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsValid
);
/**
@@ -715,8 +711,8 @@ SetTDLinkPtrValidorInvalid ( **/
VOID
SetTDLinkPtrQHorTDSelect (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsQH
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsQH
);
/**
@@ -728,8 +724,8 @@ SetTDLinkPtrQHorTDSelect ( **/
VOID
SetTDLinkPtrDepthorBreadth (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsDepth
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsDepth
);
/**
@@ -741,8 +737,8 @@ SetTDLinkPtrDepthorBreadth ( **/
VOID
SetTDLinkPtr (
- IN TD_STRUCT *PtrTDStruct,
- IN VOID *PtrNext
+ IN TD_STRUCT *PtrTDStruct,
+ IN VOID *PtrNext
);
/**
@@ -753,12 +749,11 @@ SetTDLinkPtr ( @retval Get TD Link Pointer in TD.
**/
-VOID*
+VOID *
GetTDLinkPtr (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
-
/**
Enable/Disable short packet detection mechanism.
@@ -768,8 +763,8 @@ GetTDLinkPtr ( **/
VOID
EnableorDisableTDShortPacket (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsEnable
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsEnable
);
/**
@@ -781,8 +776,8 @@ EnableorDisableTDShortPacket ( **/
VOID
SetTDControlErrorCounter (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT8 MaxErrors
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT8 MaxErrors
);
/**
@@ -794,8 +789,8 @@ SetTDControlErrorCounter ( **/
VOID
SetTDLoworFullSpeedDevice (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsLowSpeedDevice
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsLowSpeedDevice
);
/**
@@ -807,8 +802,8 @@ SetTDLoworFullSpeedDevice ( **/
VOID
SetTDControlIsochronousorNot (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsIsochronous
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsIsochronous
);
/**
@@ -821,8 +816,8 @@ SetTDControlIsochronousorNot ( **/
VOID
SetorClearTDControlIOC (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsSet
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsSet
);
/**
@@ -834,8 +829,8 @@ SetorClearTDControlIOC ( **/
VOID
SetTDStatusActiveorInactive (
- IN TD_STRUCT *PtrTDStruct,
- IN BOOLEAN IsActive
+ IN TD_STRUCT *PtrTDStruct,
+ IN BOOLEAN IsActive
);
/**
@@ -848,8 +843,8 @@ SetTDStatusActiveorInactive ( **/
UINT16
SetTDTokenMaxLength (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT16 MaxLen
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT16 MaxLen
);
/**
@@ -860,7 +855,7 @@ SetTDTokenMaxLength ( **/
VOID
SetTDTokenDataToggle1 (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -871,7 +866,7 @@ SetTDTokenDataToggle1 ( **/
VOID
SetTDTokenDataToggle0 (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -883,8 +878,8 @@ SetTDTokenDataToggle0 ( **/
VOID
SetTDTokenEndPoint (
- IN TD_STRUCT *PtrTDStruct,
- IN UINTN EndPoint
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINTN EndPoint
);
/**
@@ -896,8 +891,8 @@ SetTDTokenEndPoint ( **/
VOID
SetTDTokenDeviceAddress (
- IN TD_STRUCT *PtrTDStruct,
- IN UINTN DevAddr
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINTN DevAddr
);
/**
@@ -909,8 +904,8 @@ SetTDTokenDeviceAddress ( **/
VOID
SetTDTokenPacketID (
- IN TD_STRUCT *PtrTDStruct,
- IN UINT8 PacketID
+ IN TD_STRUCT *PtrTDStruct,
+ IN UINT8 PacketID
);
/**
@@ -922,7 +917,7 @@ SetTDTokenPacketID ( **/
VOID
SetTDDataBuffer (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -935,7 +930,7 @@ SetTDDataBuffer ( **/
BOOLEAN
IsTDStatusActive (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -948,7 +943,7 @@ IsTDStatusActive ( **/
BOOLEAN
IsTDStatusStalled (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -961,7 +956,7 @@ IsTDStatusStalled ( **/
BOOLEAN
IsTDStatusBufferError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -974,7 +969,7 @@ IsTDStatusBufferError ( **/
BOOLEAN
IsTDStatusBabbleError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -987,7 +982,7 @@ IsTDStatusBabbleError ( **/
BOOLEAN
IsTDStatusNAKReceived (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1000,7 +995,7 @@ IsTDStatusNAKReceived ( **/
BOOLEAN
IsTDStatusCRCTimeOutError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1013,7 +1008,7 @@ IsTDStatusCRCTimeOutError ( **/
BOOLEAN
IsTDStatusBitStuffError (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1026,7 +1021,7 @@ IsTDStatusBitStuffError ( **/
UINT16
GetTDStatusActualLength (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1039,7 +1034,7 @@ GetTDStatusActualLength ( **/
BOOLEAN
GetTDLinkPtrValidorInvalid (
- IN TD_STRUCT *PtrTDStruct
+ IN TD_STRUCT *PtrTDStruct
);
/**
@@ -1052,7 +1047,7 @@ GetTDLinkPtrValidorInvalid ( **/
UINTN
CountTDsNumber (
- IN TD_STRUCT *PtrFirstTD
+ IN TD_STRUCT *PtrFirstTD
);
/**
@@ -1064,8 +1059,8 @@ CountTDsNumber ( **/
VOID
LinkTDToQH (
- IN QH_STRUCT *PtrQH,
- IN TD_STRUCT *PtrTD
+ IN QH_STRUCT *PtrQH,
+ IN TD_STRUCT *PtrTD
);
/**
@@ -1077,8 +1072,8 @@ LinkTDToQH ( **/
VOID
LinkTDToTD (
- IN TD_STRUCT *PtrPreTD,
- IN TD_STRUCT *PtrTD
+ IN TD_STRUCT *PtrPreTD,
+ IN TD_STRUCT *PtrTD
);
/**
@@ -1097,11 +1092,11 @@ LinkTDToTD ( **/
EFI_STATUS
ExecuteControlTransfer (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrTD,
- OUT UINTN *ActualLen,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrTD,
+ OUT UINTN *ActualLen,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
);
/**
@@ -1121,12 +1116,12 @@ ExecuteControlTransfer ( **/
EFI_STATUS
ExecBulkTransfer (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrTD,
- IN OUT UINTN *ActualLen,
- IN UINT8 *DataToggle,
- IN UINTN TimeOut,
- OUT UINT32 *TransferResult
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrTD,
+ IN OUT UINTN *ActualLen,
+ IN UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
);
/**
@@ -1138,8 +1133,8 @@ ExecBulkTransfer ( **/
VOID
DeleteQueuedTDs (
- IN USB_UHC_DEV *UhcDev,
- IN TD_STRUCT *PtrFirstTD
+ IN USB_UHC_DEV *UhcDev,
+ IN TD_STRUCT *PtrFirstTD
);
/**
@@ -1155,10 +1150,10 @@ DeleteQueuedTDs ( **/
BOOLEAN
CheckTDsResults (
- IN TD_STRUCT *PtrTD,
- OUT UINT32 *Result,
- OUT UINTN *ErrTDPos,
- OUT UINTN *ActualTransferSize
+ IN TD_STRUCT *PtrTD,
+ OUT UINT32 *Result,
+ OUT UINTN *ErrTDPos,
+ OUT UINTN *ActualTransferSize
);
/**
@@ -1190,7 +1185,7 @@ CreateMemoryBlock ( **/
EFI_STATUS
InitializeMemoryManagement (
- IN USB_UHC_DEV *UhcDev
+ IN USB_UHC_DEV *UhcDev
);
/**
@@ -1206,9 +1201,9 @@ InitializeMemoryManagement ( **/
EFI_STATUS
UhcAllocatePool (
- IN USB_UHC_DEV *UhcDev,
- OUT UINT8 **Pool,
- IN UINTN AllocSize
+ IN USB_UHC_DEV *UhcDev,
+ OUT UINT8 **Pool,
+ IN UINTN AllocSize
);
/**
@@ -1239,9 +1234,9 @@ AllocMemInMemoryBlock ( **/
VOID
UhcFreePool (
- IN USB_UHC_DEV *UhcDev,
- IN UINT8 *Pool,
- IN UINTN AllocSize
+ IN USB_UHC_DEV *UhcDev,
+ IN UINT8 *Pool,
+ IN UINTN AllocSize
);
/**
@@ -1257,7 +1252,6 @@ InsertMemoryHeaderToList ( IN MEMORY_MANAGE_HEADER *NewMemoryHeader
);
-
/**
Map address of request structure buffer.
@@ -1272,10 +1266,10 @@ InsertMemoryHeaderToList ( **/
EFI_STATUS
UhciMapUserRequest (
- IN USB_UHC_DEV *Uhc,
- IN OUT VOID *Request,
- OUT UINT8 **MappedAddr,
- OUT VOID **Map
+ IN USB_UHC_DEV *Uhc,
+ IN OUT VOID *Request,
+ OUT UINT8 **MappedAddr,
+ OUT VOID **Map
);
/**
@@ -1343,8 +1337,8 @@ IoMmuMap ( **/
VOID
IoMmuUnmap (
- IN EDKII_IOMMU_PPI *IoMmu,
- IN VOID *Mapping
+ IN EDKII_IOMMU_PPI *IoMmu,
+ IN VOID *Mapping
);
/**
@@ -1375,7 +1369,6 @@ IoMmuAllocateBuffer ( OUT VOID **Mapping
);
-
/**
Initialize IOMMU.
@@ -1384,7 +1377,7 @@ IoMmuAllocateBuffer ( **/
VOID
IoMmuInit (
- OUT EDKII_IOMMU_PPI **IoMmu
+ OUT EDKII_IOMMU_PPI **IoMmu
);
#endif
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