diff options
Diffstat (limited to 'MdeModulePkg/Bus/Sd/EmmcBlockIoPei')
| -rw-r--r-- | MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c | 85 | ||||
| -rw-r--r-- | MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c | 222 | ||||
| -rw-r--r-- | MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h | 126 | ||||
| -rw-r--r-- | MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c | 142 | ||||
| -rw-r--r-- | MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h | 23 | ||||
| -rw-r--r-- | MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c | 846 | ||||
| -rw-r--r-- | MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h | 161 |
7 files changed, 839 insertions, 766 deletions
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c index 2d8bfa1b00..df2f18024e 100644 --- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c +++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/DmaMem.c @@ -32,11 +32,11 @@ EDKII_IOMMU_PPI *mIoMmu; **/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
)
{
EFI_STATUS Status;
@@ -54,23 +54,25 @@ IoMmuMap ( if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
switch (Operation) {
- case EdkiiIoMmuOperationBusMasterRead:
- case EdkiiIoMmuOperationBusMasterRead64:
- Attribute = EDKII_IOMMU_ACCESS_READ;
- break;
- case EdkiiIoMmuOperationBusMasterWrite:
- case EdkiiIoMmuOperationBusMasterWrite64:
- Attribute = EDKII_IOMMU_ACCESS_WRITE;
- break;
- case EdkiiIoMmuOperationBusMasterCommonBuffer:
- case EdkiiIoMmuOperationBusMasterCommonBuffer64:
- Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
- break;
- default:
- ASSERT(FALSE);
- return EFI_INVALID_PARAMETER;
+ case EdkiiIoMmuOperationBusMasterRead:
+ case EdkiiIoMmuOperationBusMasterRead64:
+ Attribute = EDKII_IOMMU_ACCESS_READ;
+ break;
+ case EdkiiIoMmuOperationBusMasterWrite:
+ case EdkiiIoMmuOperationBusMasterWrite64:
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;
+ break;
+ default:
+ ASSERT (FALSE);
+ return EFI_INVALID_PARAMETER;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -81,9 +83,10 @@ IoMmuMap ( }
} else {
*DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
- *Mapping = NULL;
- Status = EFI_SUCCESS;
+ *Mapping = NULL;
+ Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -98,7 +101,7 @@ IoMmuMap ( **/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -109,6 +112,7 @@ IoMmuUnmap ( } else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -142,7 +146,7 @@ IoMmuAllocateBuffer ( UINTN NumberOfBytes;
EFI_PHYSICAL_ADDRESS HostPhyAddress;
- *HostAddress = NULL;
+ *HostAddress = NULL;
*DeviceAddress = 0;
if (mIoMmu != NULL) {
@@ -157,18 +161,19 @@ IoMmuAllocateBuffer ( return EFI_OUT_OF_RESOURCES;
}
- NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = mIoMmu->Map (
- mIoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);
+ Status = mIoMmu->Map (
+ mIoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
+
Status = mIoMmu->SetAttribute (
mIoMmu,
*Mapping,
@@ -186,10 +191,12 @@ IoMmuAllocateBuffer ( if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- *HostAddress = (VOID *)(UINTN)HostPhyAddress;
+
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;
*DeviceAddress = HostPhyAddress;
- *Mapping = NULL;
+ *Mapping = NULL;
}
+
return Status;
}
@@ -207,9 +214,9 @@ IoMmuAllocateBuffer ( **/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
)
{
EFI_STATUS Status;
@@ -221,6 +228,7 @@ IoMmuFreeBuffer ( } else {
Status = EFI_SUCCESS;
}
+
return Status;
}
@@ -239,4 +247,3 @@ IoMmuInit ( (VOID **)&mIoMmu
);
}
-
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c index bf4498df55..a87eb2092f 100644 --- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c +++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.c @@ -10,7 +10,7 @@ //
// Template for EMMC HC Slot Data.
//
-EMMC_PEIM_HC_SLOT gEmmcHcSlotTemplate = {
+EMMC_PEIM_HC_SLOT gEmmcHcSlotTemplate = {
EMMC_PEIM_SLOT_SIG, // Signature
{ // Media
{
@@ -97,7 +97,7 @@ EMMC_PEIM_HC_SLOT gEmmcHcSlotTemplate = { 0,
},
{ // ExtCsd
- {0},
+ { 0 },
},
TRUE, // SectorAddressing
NULL // Private
@@ -106,7 +106,7 @@ EMMC_PEIM_HC_SLOT gEmmcHcSlotTemplate = { //
// Template for EMMC HC Private Data.
//
-EMMC_PEIM_HC_PRIVATE_DATA gEmmcHcPrivateTemplate = {
+EMMC_PEIM_HC_PRIVATE_DATA gEmmcHcPrivateTemplate = {
EMMC_PEIM_SIG, // Signature
NULL, // Pool
{ // BlkIoPpi
@@ -158,6 +158,7 @@ EMMC_PEIM_HC_PRIVATE_DATA gEmmcHcPrivateTemplate = { 0, // SlotNum
0 // TotalBlkIoDevices
};
+
/**
Gets the count of block I/O devices that one specific block driver detects.
@@ -185,9 +186,9 @@ EmmcBlockIoPeimGetDeviceNo ( OUT UINTN *NumberBlockDevices
)
{
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
- Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
+ Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
*NumberBlockDevices = Private->TotalBlkIoDevices;
return EFI_SUCCESS;
}
@@ -242,11 +243,11 @@ EmmcBlockIoPeimGetMediaInfo ( OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
)
{
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
- UINT8 SlotNum;
- UINT8 MediaNum;
- UINT8 Location;
- BOOLEAN Found;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ UINT8 SlotNum;
+ UINT8 MediaNum;
+ UINT8 Location;
+ BOOLEAN Found;
Found = FALSE;
Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS (This);
@@ -259,12 +260,13 @@ EmmcBlockIoPeimGetMediaInfo ( MediaNum = 0;
for (SlotNum = 0; SlotNum < Private->SlotNum; SlotNum++) {
for (MediaNum = 0; MediaNum < Private->Slot[SlotNum].MediaNum; MediaNum++) {
- Location ++;
+ Location++;
if (Location == DeviceIndex) {
Found = TRUE;
break;
}
}
+
if (Found) {
break;
}
@@ -323,17 +325,17 @@ EmmcBlockIoPeimReadBlocks ( OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- UINT32 BlockSize;
- UINTN NumberOfBlocks;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
- UINT8 SlotNum;
- UINT8 MediaNum;
- UINT8 Location;
- UINT8 PartitionConfig;
- UINTN Remaining;
- UINT32 MaxBlock;
- BOOLEAN Found;
+ EFI_STATUS Status;
+ UINT32 BlockSize;
+ UINTN NumberOfBlocks;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ UINT8 SlotNum;
+ UINT8 MediaNum;
+ UINT8 Location;
+ UINT8 PartitionConfig;
+ UINTN Remaining;
+ UINT32 MaxBlock;
+ BOOLEAN Found;
Status = EFI_SUCCESS;
Found = FALSE;
@@ -358,12 +360,13 @@ EmmcBlockIoPeimReadBlocks ( MediaNum = 0;
for (SlotNum = 0; SlotNum < Private->SlotNum; SlotNum++) {
for (MediaNum = 0; MediaNum < Private->Slot[SlotNum].MediaNum; MediaNum++) {
- Location ++;
+ Location++;
if (Location == DeviceIndex) {
Found = TRUE;
break;
}
}
+
if (Found) {
break;
}
@@ -385,20 +388,22 @@ EmmcBlockIoPeimReadBlocks ( //
PartitionConfig = Private->Slot[SlotNum].ExtCsd.PartitionConfig;
if ((PartitionConfig & 0x7) != Private->Slot[SlotNum].PartitionType[MediaNum]) {
- PartitionConfig &= (UINT8)~0x7;
+ PartitionConfig &= (UINT8) ~0x7;
PartitionConfig |= Private->Slot[SlotNum].PartitionType[MediaNum];
- Status = EmmcPeimSwitch (
- &Private->Slot[SlotNum],
- 0x3,
- OFFSET_OF (EMMC_EXT_CSD, PartitionConfig),
- PartitionConfig,
- 0x0
- );
+ Status = EmmcPeimSwitch (
+ &Private->Slot[SlotNum],
+ 0x3,
+ OFFSET_OF (EMMC_EXT_CSD, PartitionConfig),
+ PartitionConfig,
+ 0x0
+ );
if (EFI_ERROR (Status)) {
return Status;
}
+
Private->Slot[SlotNum].ExtCsd.PartitionConfig = PartitionConfig;
}
+
//
// Start to execute data transfer. The max block number in single cmd is 65535 blocks.
//
@@ -418,15 +423,16 @@ EmmcBlockIoPeimReadBlocks ( }
BufferSize = NumberOfBlocks * BlockSize;
- Status = EmmcPeimRwMultiBlocks (&Private->Slot[SlotNum], StartLBA, BlockSize, Buffer, BufferSize, TRUE);
+ Status = EmmcPeimRwMultiBlocks (&Private->Slot[SlotNum], StartLBA, BlockSize, Buffer, BufferSize, TRUE);
if (EFI_ERROR (Status)) {
return Status;
}
StartLBA += NumberOfBlocks;
- Buffer = (UINT8*)Buffer + BufferSize;
+ Buffer = (UINT8 *)Buffer + BufferSize;
Remaining -= NumberOfBlocks;
}
+
return Status;
}
@@ -452,14 +458,14 @@ EmmcBlockIoPeimReadBlocks ( EFI_STATUS
EFIAPI
EmmcBlockIoPeimGetDeviceNo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
)
{
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
- Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
+ Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
*NumberBlockDevices = Private->TotalBlkIoDevices;
return EFI_SUCCESS;
@@ -509,29 +515,29 @@ EmmcBlockIoPeimGetDeviceNo2 ( EFI_STATUS
EFIAPI
EmmcBlockIoPeimGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
)
{
- EFI_STATUS Status;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
- EFI_PEI_BLOCK_IO_MEDIA Media;
- UINT8 SlotNum;
- UINT8 MediaNum;
- UINT8 Location;
- BOOLEAN Found;
+ EFI_STATUS Status;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EFI_PEI_BLOCK_IO_MEDIA Media;
+ UINT8 SlotNum;
+ UINT8 MediaNum;
+ UINT8 Location;
+ BOOLEAN Found;
Found = FALSE;
Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
- Status = EmmcBlockIoPeimGetMediaInfo (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- &Media
- );
+ Status = EmmcBlockIoPeimGetMediaInfo (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ &Media
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -540,12 +546,13 @@ EmmcBlockIoPeimGetMediaInfo2 ( MediaNum = 0;
for (SlotNum = 0; SlotNum < Private->SlotNum; SlotNum++) {
for (MediaNum = 0; MediaNum < Private->Slot[SlotNum].MediaNum; MediaNum++) {
- Location ++;
+ Location++;
if (Location == DeviceIndex) {
Found = TRUE;
break;
}
}
+
if (Found) {
break;
}
@@ -592,28 +599,28 @@ EmmcBlockIoPeimGetMediaInfo2 ( EFI_STATUS
EFIAPI
EmmcBlockIoPeimReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
)
{
- EFI_STATUS Status;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
-
- Status = EFI_SUCCESS;
- Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
-
- Status = EmmcBlockIoPeimReadBlocks (
- PeiServices,
- &Private->BlkIoPpi,
- DeviceIndex,
- StartLBA,
- BufferSize,
- Buffer
- );
+ EFI_STATUS Status;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+
+ Status = EFI_SUCCESS;
+ Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2 (This);
+
+ Status = EmmcBlockIoPeimReadBlocks (
+ PeiServices,
+ &Private->BlkIoPpi,
+ DeviceIndex,
+ StartLBA,
+ BufferSize,
+ Buffer
+ );
return Status;
}
@@ -636,7 +643,7 @@ EmmcBlockIoPeimEndOfPei ( IN VOID *Ppi
)
{
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
Private = GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);
@@ -660,26 +667,26 @@ EmmcBlockIoPeimEndOfPei ( EFI_STATUS
EFIAPI
InitializeEmmcBlockIoPeim (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
)
{
- EFI_STATUS Status;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
- EDKII_SD_MMC_HOST_CONTROLLER_PPI *SdMmcHcPpi;
- UINT32 Index;
- UINT32 PartitionIndex;
- UINTN *MmioBase;
- UINT8 BarNum;
- UINT8 SlotNum;
- UINT8 MediaNum;
- UINT8 Controller;
- UINT64 Capacity;
- EMMC_EXT_CSD *ExtCsd;
- EMMC_HC_SLOT_CAP Capability;
- EMMC_PEIM_HC_SLOT *Slot;
- UINT32 SecCount;
- UINT32 GpSizeMult;
+ EFI_STATUS Status;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ EDKII_SD_MMC_HOST_CONTROLLER_PPI *SdMmcHcPpi;
+ UINT32 Index;
+ UINT32 PartitionIndex;
+ UINTN *MmioBase;
+ UINT8 BarNum;
+ UINT8 SlotNum;
+ UINT8 MediaNum;
+ UINT8 Controller;
+ UINT64 Capacity;
+ EMMC_EXT_CSD *ExtCsd;
+ EMMC_HC_SLOT_CAP Capability;
+ EMMC_PEIM_HC_SLOT *Slot;
+ UINT32 SecCount;
+ UINT32 GpSizeMult;
//
// Shadow this PEIM to run from memory
@@ -695,7 +702,7 @@ InitializeEmmcBlockIoPeim ( &gEdkiiPeiSdMmcHostControllerPpiGuid,
0,
NULL,
- (VOID **) &SdMmcHcPpi
+ (VOID **)&SdMmcHcPpi
);
if (EFI_ERROR (Status)) {
return EFI_DEVICE_ERROR;
@@ -724,8 +731,9 @@ InitializeEmmcBlockIoPeim ( Status = EFI_OUT_OF_RESOURCES;
break;
}
- Private->BlkIoPpiList.Ppi = (VOID*)&Private->BlkIoPpi;
- Private->BlkIo2PpiList.Ppi = (VOID*)&Private->BlkIo2Ppi;
+
+ Private->BlkIoPpiList.Ppi = (VOID *)&Private->BlkIoPpi;
+ Private->BlkIo2PpiList.Ppi = (VOID *)&Private->BlkIo2Ppi;
//
// Initialize the memory pool which will be used in all transactions.
//
@@ -740,6 +748,7 @@ InitializeEmmcBlockIoPeim ( if (EFI_ERROR (Status)) {
continue;
}
+
if (Capability.SlotType != 0x1) {
DEBUG ((DEBUG_INFO, "The slot at 0x%x is not embedded slot type\n", MmioBase[Index]));
Status = EFI_UNSUPPORTED;
@@ -750,10 +759,12 @@ InitializeEmmcBlockIoPeim ( if (EFI_ERROR (Status)) {
continue;
}
+
Status = EmmcPeimHcCardDetect (MmioBase[Index]);
if (EFI_ERROR (Status)) {
continue;
}
+
Status = EmmcPeimHcInitHost (MmioBase[Index]);
if (EFI_ERROR (Status)) {
continue;
@@ -777,6 +788,7 @@ InitializeEmmcBlockIoPeim ( Status = EFI_UNSUPPORTED;
continue;
}
+
if ((ExtCsd->PartitioningSupport & BIT0) != BIT0) {
DEBUG ((DEBUG_ERROR, "The EMMC device doesn't support Partition Feature!!!\n"));
Status = EFI_UNSUPPORTED;
@@ -786,7 +798,7 @@ InitializeEmmcBlockIoPeim ( for (PartitionIndex = 0; PartitionIndex < EMMC_PEIM_MAX_PARTITIONS; PartitionIndex++) {
switch (PartitionIndex) {
case EmmcPartitionUserData:
- SecCount = *(UINT32*)&ExtCsd->SecCount;
+ SecCount = *(UINT32 *)&ExtCsd->SecCount;
Capacity = MultU64x32 ((UINT64)SecCount, 0x200);
break;
case EmmcPartitionBoot1:
@@ -798,19 +810,19 @@ InitializeEmmcBlockIoPeim ( break;
case EmmcPartitionGP1:
GpSizeMult = (ExtCsd->GpSizeMult[0] | (ExtCsd->GpSizeMult[1] << 8) | (ExtCsd->GpSizeMult[2] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP2:
GpSizeMult = (ExtCsd->GpSizeMult[3] | (ExtCsd->GpSizeMult[4] << 8) | (ExtCsd->GpSizeMult[5] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP3:
GpSizeMult = (ExtCsd->GpSizeMult[6] | (ExtCsd->GpSizeMult[7] << 8) | (ExtCsd->GpSizeMult[8] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
case EmmcPartitionGP4:
GpSizeMult = (ExtCsd->GpSizeMult[9] | (ExtCsd->GpSizeMult[10] << 8) | (ExtCsd->GpSizeMult[11] << 16));
- Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
+ Capacity = MultU64x32 (MultU64x32 (MultU64x32 ((UINT64)GpSizeMult, ExtCsd->HcWpGrpSize), ExtCsd->HcEraseGrpSize), SIZE_512KB);
break;
default:
ASSERT (FALSE);
@@ -820,13 +832,15 @@ InitializeEmmcBlockIoPeim ( MediaNum = Slot->MediaNum;
if (Capacity != 0) {
Slot->Media[MediaNum].LastBlock = DivU64x32 (Capacity, Slot->Media[MediaNum].BlockSize) - 1;
- Slot->PartitionType[MediaNum] = PartitionIndex;
+ Slot->PartitionType[MediaNum] = PartitionIndex;
Private->TotalBlkIoDevices++;
Slot->MediaNum++;
}
}
+
Private->SlotNum++;
}
+
Controller++;
if (!EFI_ERROR (Status)) {
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h index 774274e484..f8108c3082 100644 --- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h +++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcBlockIoPei.h @@ -26,31 +26,31 @@ #include <IndustryStandard/Emmc.h>
-typedef struct _EMMC_PEIM_HC_PRIVATE_DATA EMMC_PEIM_HC_PRIVATE_DATA;
-typedef struct _EMMC_PEIM_HC_SLOT EMMC_PEIM_HC_SLOT;
-typedef struct _EMMC_TRB EMMC_TRB;
+typedef struct _EMMC_PEIM_HC_PRIVATE_DATA EMMC_PEIM_HC_PRIVATE_DATA;
+typedef struct _EMMC_PEIM_HC_SLOT EMMC_PEIM_HC_SLOT;
+typedef struct _EMMC_TRB EMMC_TRB;
#include "EmmcHci.h"
#include "EmmcHcMem.h"
-#define EMMC_PEIM_SIG SIGNATURE_32 ('E', 'M', 'C', 'P')
-#define EMMC_PEIM_SLOT_SIG SIGNATURE_32 ('E', 'M', 'C', 'S')
+#define EMMC_PEIM_SIG SIGNATURE_32 ('E', 'M', 'C', 'P')
+#define EMMC_PEIM_SLOT_SIG SIGNATURE_32 ('E', 'M', 'C', 'S')
-#define EMMC_PEIM_MAX_SLOTS 6
-#define EMMC_PEIM_MAX_PARTITIONS 8
+#define EMMC_PEIM_MAX_SLOTS 6
+#define EMMC_PEIM_MAX_PARTITIONS 8
struct _EMMC_PEIM_HC_SLOT {
- UINT32 Signature;
- EFI_PEI_BLOCK_IO2_MEDIA Media[EMMC_PEIM_MAX_PARTITIONS];
- UINT8 MediaNum;
- EMMC_PARTITION_TYPE PartitionType[EMMC_PEIM_MAX_PARTITIONS];
-
- UINTN EmmcHcBase;
- EMMC_HC_SLOT_CAP Capability;
- EMMC_CSD Csd;
- EMMC_EXT_CSD ExtCsd;
- BOOLEAN SectorAddressing;
- EMMC_PEIM_HC_PRIVATE_DATA *Private;
+ UINT32 Signature;
+ EFI_PEI_BLOCK_IO2_MEDIA Media[EMMC_PEIM_MAX_PARTITIONS];
+ UINT8 MediaNum;
+ EMMC_PARTITION_TYPE PartitionType[EMMC_PEIM_MAX_PARTITIONS];
+
+ UINTN EmmcHcBase;
+ EMMC_HC_SLOT_CAP Capability;
+ EMMC_CSD Csd;
+ EMMC_EXT_CSD ExtCsd;
+ BOOLEAN SectorAddressing;
+ EMMC_PEIM_HC_PRIVATE_DATA *Private;
};
struct _EMMC_PEIM_HC_PRIVATE_DATA {
@@ -71,27 +71,27 @@ struct _EMMC_PEIM_HC_PRIVATE_DATA { UINT8 TotalBlkIoDevices;
};
-#define EMMC_TIMEOUT MultU64x32((UINT64)(3), 1000000)
-#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, BlkIoPpi, EMMC_PEIM_SIG)
-#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, EMMC_PEIM_SIG)
-#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, EMMC_PEIM_SIG)
+#define EMMC_TIMEOUT MultU64x32((UINT64)(3), 1000000)
+#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, BlkIoPpi, EMMC_PEIM_SIG)
+#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, EMMC_PEIM_SIG)
+#define GET_EMMC_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, EMMC_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, EMMC_PEIM_SIG)
struct _EMMC_TRB {
- EMMC_PEIM_HC_SLOT *Slot;
- UINT16 BlockSize;
+ EMMC_PEIM_HC_SLOT *Slot;
+ UINT16 BlockSize;
- EMMC_COMMAND_PACKET *Packet;
- VOID *Data;
- UINT32 DataLen;
- BOOLEAN Read;
- EFI_PHYSICAL_ADDRESS DataPhy;
- VOID *DataMap;
- EMMC_HC_TRANSFER_MODE Mode;
+ EMMC_COMMAND_PACKET *Packet;
+ VOID *Data;
+ UINT32 DataLen;
+ BOOLEAN Read;
+ EFI_PHYSICAL_ADDRESS DataPhy;
+ VOID *DataMap;
+ EMMC_HC_TRANSFER_MODE Mode;
- UINT64 Timeout;
+ UINT64 Timeout;
- EMMC_HC_ADMA_DESC_LINE *AdmaDesc;
- UINTN AdmaDescSize;
+ EMMC_HC_ADMA_DESC_LINE *AdmaDesc;
+ UINTN AdmaDescSize;
};
/**
@@ -238,9 +238,9 @@ EmmcBlockIoPeimReadBlocks ( EFI_STATUS
EFIAPI
EmmcBlockIoPeimGetDeviceNo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- OUT UINTN *NumberBlockDevices
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ OUT UINTN *NumberBlockDevices
);
/**
@@ -287,10 +287,10 @@ EmmcBlockIoPeimGetDeviceNo2 ( EFI_STATUS
EFIAPI
EmmcBlockIoPeimGetMediaInfo2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO2_MEDIA *MediaInfo
);
/**
@@ -330,12 +330,12 @@ EmmcBlockIoPeimGetMediaInfo2 ( EFI_STATUS
EFIAPI
EmmcBlockIoPeimReadBlocks2 (
- IN EFI_PEI_SERVICES **PeiServices,
- IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
- IN UINTN DeviceIndex,
- IN EFI_PEI_LBA StartLBA,
- IN UINTN BufferSize,
- OUT VOID *Buffer
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO2_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
);
/**
@@ -349,7 +349,7 @@ EmmcBlockIoPeimReadBlocks2 ( **/
EFI_STATUS
EmmcPeimInitMemPool (
- IN EMMC_PEIM_HC_PRIVATE_DATA *Private
+ IN EMMC_PEIM_HC_PRIVATE_DATA *Private
);
/**
@@ -363,7 +363,7 @@ EmmcPeimInitMemPool ( **/
EFI_STATUS
EmmcPeimFreeMemPool (
- IN EMMC_PEIM_MEM_POOL *Pool
+ IN EMMC_PEIM_MEM_POOL *Pool
);
/**
@@ -378,8 +378,8 @@ EmmcPeimFreeMemPool ( **/
VOID *
EmmcPeimAllocateMem (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN UINTN Size
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN UINTN Size
);
/**
@@ -392,9 +392,9 @@ EmmcPeimAllocateMem ( **/
VOID
EmmcPeimFreeMem (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
);
/**
@@ -426,11 +426,11 @@ IoMmuInit ( **/
EFI_STATUS
IoMmuMap (
- IN EDKII_IOMMU_OPERATION Operation,
- IN VOID *HostAddress,
- IN OUT UINTN *NumberOfBytes,
- OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
- OUT VOID **Mapping
+ IN EDKII_IOMMU_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
);
/**
@@ -444,7 +444,7 @@ IoMmuMap ( **/
EFI_STATUS
IoMmuUnmap (
- IN VOID *Mapping
+ IN VOID *Mapping
);
/**
@@ -487,9 +487,9 @@ IoMmuAllocateBuffer ( **/
EFI_STATUS
IoMmuFreeBuffer (
- IN UINTN Pages,
- IN VOID *HostAddress,
- IN VOID *Mapping
+ IN UINTN Pages,
+ IN VOID *HostAddress,
+ IN VOID *Mapping
);
/**
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c index 19a0afcb6d..6778254b61 100644 --- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c +++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.c @@ -18,25 +18,25 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/
EMMC_PEIM_MEM_BLOCK *
EmmcPeimAllocMemBlock (
- IN UINTN Pages
+ IN UINTN Pages
)
{
- EMMC_PEIM_MEM_BLOCK *Block;
- VOID *BufHost;
- VOID *Mapping;
- EFI_PHYSICAL_ADDRESS MappedAddr;
- EFI_STATUS Status;
- VOID *TempPtr;
+ EMMC_PEIM_MEM_BLOCK *Block;
+ VOID *BufHost;
+ VOID *Mapping;
+ EFI_PHYSICAL_ADDRESS MappedAddr;
+ EFI_STATUS Status;
+ VOID *TempPtr;
TempPtr = NULL;
Block = NULL;
- Status = PeiServicesAllocatePool (sizeof(EMMC_PEIM_MEM_BLOCK), &TempPtr);
+ Status = PeiServicesAllocatePool (sizeof (EMMC_PEIM_MEM_BLOCK), &TempPtr);
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, sizeof(EMMC_PEIM_MEM_BLOCK));
+ ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (EMMC_PEIM_MEM_BLOCK));
//
// each bit in the bit array represents EMMC_PEIM_MEM_UNIT
@@ -44,18 +44,18 @@ EmmcPeimAllocMemBlock ( //
ASSERT (EMMC_PEIM_MEM_UNIT * 8 <= EFI_PAGE_SIZE);
- Block = (EMMC_PEIM_MEM_BLOCK*)(UINTN)TempPtr;
- Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
- Block->BitsLen = Block->BufLen / (EMMC_PEIM_MEM_UNIT * 8);
+ Block = (EMMC_PEIM_MEM_BLOCK *)(UINTN)TempPtr;
+ Block->BufLen = EFI_PAGES_TO_SIZE (Pages);
+ Block->BitsLen = Block->BufLen / (EMMC_PEIM_MEM_UNIT * 8);
Status = PeiServicesAllocatePool (Block->BitsLen, &TempPtr);
if (EFI_ERROR (Status)) {
return NULL;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, Block->BitsLen);
+ ZeroMem ((VOID *)(UINTN)TempPtr, Block->BitsLen);
- Block->Bits = (UINT8*)(UINTN)TempPtr;
+ Block->Bits = (UINT8 *)(UINTN)TempPtr;
Status = IoMmuAllocateBuffer (
Pages,
@@ -67,10 +67,10 @@ EmmcPeimAllocMemBlock ( return NULL;
}
- ZeroMem ((VOID*)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
+ ZeroMem ((VOID *)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));
- Block->BufHost = (UINT8 *) (UINTN) BufHost;
- Block->Buf = (UINT8 *) (UINTN) MappedAddr;
+ Block->BufHost = (UINT8 *)(UINTN)BufHost;
+ Block->Buf = (UINT8 *)(UINTN)MappedAddr;
Block->Mapping = Mapping;
Block->Next = NULL;
@@ -86,8 +86,8 @@ EmmcPeimAllocMemBlock ( **/
VOID
EmmcPeimFreeMemBlock (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN EMMC_PEIM_MEM_BLOCK *Block
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN EMMC_PEIM_MEM_BLOCK *Block
)
{
ASSERT ((Pool != NULL) && (Block != NULL));
@@ -107,22 +107,22 @@ EmmcPeimFreeMemBlock ( **/
VOID *
EmmcPeimAllocMemFromBlock (
- IN EMMC_PEIM_MEM_BLOCK *Block,
- IN UINTN Units
+ IN EMMC_PEIM_MEM_BLOCK *Block,
+ IN UINTN Units
)
{
- UINTN Byte;
- UINT8 Bit;
- UINTN StartByte;
- UINT8 StartBit;
- UINTN Available;
- UINTN Count;
+ UINTN Byte;
+ UINT8 Bit;
+ UINTN StartByte;
+ UINT8 StartBit;
+ UINTN Available;
+ UINTN Count;
ASSERT ((Block != 0) && (Units != 0));
- StartByte = 0;
- StartBit = 0;
- Available = 0;
+ StartByte = 0;
+ StartBit = 0;
+ Available = 0;
for (Byte = 0, Bit = 0; Byte < Block->BitsLen;) {
//
@@ -138,13 +138,12 @@ EmmcPeimAllocMemFromBlock ( }
EMMC_PEIM_NEXT_BIT (Byte, Bit);
-
} else {
EMMC_PEIM_NEXT_BIT (Byte, Bit);
- Available = 0;
- StartByte = Byte;
- StartBit = Bit;
+ Available = 0;
+ StartByte = Byte;
+ StartBit = Bit;
}
}
@@ -155,13 +154,13 @@ EmmcPeimAllocMemFromBlock ( //
// Mark the memory as allocated
//
- Byte = StartByte;
- Bit = StartBit;
+ Byte = StartByte;
+ Bit = StartBit;
for (Count = 0; Count < Units; Count++) {
ASSERT (!EMMC_PEIM_MEM_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] | (UINT8) EMMC_PEIM_MEM_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] | (UINT8)EMMC_PEIM_MEM_BIT (Bit));
EMMC_PEIM_NEXT_BIT (Byte, Bit);
}
@@ -177,8 +176,8 @@ EmmcPeimAllocMemFromBlock ( **/
VOID
EmmcPeimInsertMemBlockToPool (
- IN EMMC_PEIM_MEM_BLOCK *Head,
- IN EMMC_PEIM_MEM_BLOCK *Block
+ IN EMMC_PEIM_MEM_BLOCK *Head,
+ IN EMMC_PEIM_MEM_BLOCK *Block
)
{
ASSERT ((Head != NULL) && (Block != NULL));
@@ -197,11 +196,10 @@ EmmcPeimInsertMemBlockToPool ( **/
BOOLEAN
EmmcPeimIsMemBlockEmpty (
- IN EMMC_PEIM_MEM_BLOCK *Block
+ IN EMMC_PEIM_MEM_BLOCK *Block
)
{
- UINTN Index;
-
+ UINTN Index;
for (Index = 0; Index < Block->BitsLen; Index++) {
if (Block->Bits[Index] != 0) {
@@ -212,8 +210,6 @@ EmmcPeimIsMemBlockEmpty ( return TRUE;
}
-
-
/**
Initialize the memory management pool for the host controller.
@@ -228,9 +224,9 @@ EmmcPeimInitMemPool ( IN EMMC_PEIM_HC_PRIVATE_DATA *Private
)
{
- EMMC_PEIM_MEM_POOL *Pool;
- EFI_STATUS Status;
- VOID *TempPtr;
+ EMMC_PEIM_MEM_POOL *Pool;
+ EFI_STATUS Status;
+ VOID *TempPtr;
TempPtr = NULL;
Pool = NULL;
@@ -240,7 +236,7 @@ EmmcPeimInitMemPool ( return EFI_OUT_OF_RESOURCES;
}
- ZeroMem ((VOID*)(UINTN)TempPtr, sizeof (EMMC_PEIM_MEM_POOL));
+ ZeroMem ((VOID *)(UINTN)TempPtr, sizeof (EMMC_PEIM_MEM_POOL));
Pool = (EMMC_PEIM_MEM_POOL *)((UINTN)TempPtr);
@@ -265,10 +261,10 @@ EmmcPeimInitMemPool ( **/
EFI_STATUS
EmmcPeimFreeMemPool (
- IN EMMC_PEIM_MEM_POOL *Pool
+ IN EMMC_PEIM_MEM_POOL *Pool
)
{
- EMMC_PEIM_MEM_BLOCK *Block;
+ EMMC_PEIM_MEM_BLOCK *Block;
ASSERT (Pool->Head != NULL);
@@ -296,16 +292,16 @@ EmmcPeimFreeMemPool ( **/
VOID *
EmmcPeimAllocateMem (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN UINTN Size
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN UINTN Size
)
{
- EMMC_PEIM_MEM_BLOCK *Head;
- EMMC_PEIM_MEM_BLOCK *Block;
- EMMC_PEIM_MEM_BLOCK *NewBlock;
- VOID *Mem;
- UINTN AllocSize;
- UINTN Pages;
+ EMMC_PEIM_MEM_BLOCK *Head;
+ EMMC_PEIM_MEM_BLOCK *Block;
+ EMMC_PEIM_MEM_BLOCK *NewBlock;
+ VOID *Mem;
+ UINTN AllocSize;
+ UINTN Pages;
Mem = NULL;
AllocSize = EMMC_PEIM_MEM_ROUND (Size);
@@ -368,22 +364,22 @@ EmmcPeimAllocateMem ( **/
VOID
EmmcPeimFreeMem (
- IN EMMC_PEIM_MEM_POOL *Pool,
- IN VOID *Mem,
- IN UINTN Size
+ IN EMMC_PEIM_MEM_POOL *Pool,
+ IN VOID *Mem,
+ IN UINTN Size
)
{
- EMMC_PEIM_MEM_BLOCK *Head;
- EMMC_PEIM_MEM_BLOCK *Block;
- UINT8 *ToFree;
- UINTN AllocSize;
- UINTN Byte;
- UINTN Bit;
- UINTN Count;
+ EMMC_PEIM_MEM_BLOCK *Head;
+ EMMC_PEIM_MEM_BLOCK *Block;
+ UINT8 *ToFree;
+ UINTN AllocSize;
+ UINTN Byte;
+ UINTN Bit;
+ UINTN Count;
Head = Pool->Head;
AllocSize = EMMC_PEIM_MEM_ROUND (Size);
- ToFree = (UINT8 *) Mem;
+ ToFree = (UINT8 *)Mem;
for (Block = Head; Block != NULL; Block = Block->Next) {
//
@@ -394,8 +390,8 @@ EmmcPeimFreeMem ( //
// compute the start byte and bit in the bit array
//
- Byte = ((ToFree - Block->Buf) / EMMC_PEIM_MEM_UNIT) / 8;
- Bit = ((ToFree - Block->Buf) / EMMC_PEIM_MEM_UNIT) % 8;
+ Byte = ((ToFree - Block->Buf) / EMMC_PEIM_MEM_UNIT) / 8;
+ Bit = ((ToFree - Block->Buf) / EMMC_PEIM_MEM_UNIT) % 8;
//
// reset associated bits in bit array
@@ -403,7 +399,7 @@ EmmcPeimFreeMem ( for (Count = 0; Count < (AllocSize / EMMC_PEIM_MEM_UNIT); Count++) {
ASSERT (EMMC_PEIM_MEM_BIT_IS_SET (Block->Bits[Byte], Bit));
- Block->Bits[Byte] = (UINT8) (Block->Bits[Byte] ^ EMMC_PEIM_MEM_BIT (Bit));
+ Block->Bits[Byte] = (UINT8)(Block->Bits[Byte] ^ EMMC_PEIM_MEM_BIT (Bit));
EMMC_PEIM_NEXT_BIT (Byte, Bit);
}
@@ -425,5 +421,5 @@ EmmcPeimFreeMem ( EmmcPeimFreeMemBlock (Pool, Block);
}
- return ;
+ return;
}
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h index 255ad345d1..d3b6ec545a 100644 --- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h +++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHcMem.h @@ -9,7 +9,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #ifndef _EMMC_PEIM_MEM_H_
#define _EMMC_PEIM_MEM_H_
-#define EMMC_PEIM_MEM_BIT(a) ((UINTN)(1 << (a)))
+#define EMMC_PEIM_MEM_BIT(a) ((UINTN)(1 << (a)))
#define EMMC_PEIM_MEM_BIT_IS_SET(Data, Bit) \
((BOOLEAN)(((Data) & EMMC_PEIM_MEM_BIT(Bit)) == EMMC_PEIM_MEM_BIT(Bit)))
@@ -17,28 +17,28 @@ SPDX-License-Identifier: BSD-2-Clause-Patent typedef struct _EMMC_PEIM_MEM_BLOCK EMMC_PEIM_MEM_BLOCK;
struct _EMMC_PEIM_MEM_BLOCK {
- UINT8 *Bits; // Bit array to record which unit is allocated
- UINTN BitsLen;
- UINT8 *Buf;
- UINT8 *BufHost;
- UINTN BufLen; // Memory size in bytes
- VOID *Mapping;
- EMMC_PEIM_MEM_BLOCK *Next;
+ UINT8 *Bits; // Bit array to record which unit is allocated
+ UINTN BitsLen;
+ UINT8 *Buf;
+ UINT8 *BufHost;
+ UINTN BufLen; // Memory size in bytes
+ VOID *Mapping;
+ EMMC_PEIM_MEM_BLOCK *Next;
};
typedef struct _EMMC_PEIM_MEM_POOL {
- EMMC_PEIM_MEM_BLOCK *Head;
+ EMMC_PEIM_MEM_BLOCK *Head;
} EMMC_PEIM_MEM_POOL;
//
// Memory allocation unit, note that the value must meet EMMC spec alignment requirement.
//
-#define EMMC_PEIM_MEM_UNIT 128
+#define EMMC_PEIM_MEM_UNIT 128
#define EMMC_PEIM_MEM_UNIT_MASK (EMMC_PEIM_MEM_UNIT - 1)
#define EMMC_PEIM_MEM_DEFAULT_PAGES 16
-#define EMMC_PEIM_MEM_ROUND(Len) (((Len) + EMMC_PEIM_MEM_UNIT_MASK) & (~EMMC_PEIM_MEM_UNIT_MASK))
+#define EMMC_PEIM_MEM_ROUND(Len) (((Len) + EMMC_PEIM_MEM_UNIT_MASK) & (~EMMC_PEIM_MEM_UNIT_MASK))
//
// Advance the byte and bit to the next bit, adjust byte accordingly.
@@ -53,4 +53,3 @@ typedef struct _EMMC_PEIM_MEM_POOL { } while (0)
#endif
-
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c index d7f9e107c4..bafd71e9b5 100644 --- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c +++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.c @@ -28,13 +28,13 @@ EFI_STATUS
EFIAPI
EmmcPeimHcRwMmio (
- IN UINTN Address,
- IN BOOLEAN Read,
- IN UINT8 Count,
- IN OUT VOID *Data
+ IN UINTN Address,
+ IN BOOLEAN Read,
+ IN UINT8 Count,
+ IN OUT VOID *Data
)
{
- if ((Address == 0) || (Data == NULL)) {
+ if ((Address == 0) || (Data == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -45,31 +45,35 @@ EmmcPeimHcRwMmio ( switch (Count) {
case 1:
if (Read) {
- *(UINT8*)Data = MmioRead8 (Address);
+ *(UINT8 *)Data = MmioRead8 (Address);
} else {
- MmioWrite8 (Address, *(UINT8*)Data);
+ MmioWrite8 (Address, *(UINT8 *)Data);
}
+
break;
case 2:
if (Read) {
- *(UINT16*)Data = MmioRead16 (Address);
+ *(UINT16 *)Data = MmioRead16 (Address);
} else {
- MmioWrite16 (Address, *(UINT16*)Data);
+ MmioWrite16 (Address, *(UINT16 *)Data);
}
+
break;
case 4:
if (Read) {
- *(UINT32*)Data = MmioRead32 (Address);
+ *(UINT32 *)Data = MmioRead32 (Address);
} else {
- MmioWrite32 (Address, *(UINT32*)Data);
+ MmioWrite32 (Address, *(UINT32 *)Data);
}
+
break;
case 8:
if (Read) {
- *(UINT64*)Data = MmioRead64 (Address);
+ *(UINT64 *)Data = MmioRead64 (Address);
} else {
- MmioWrite64 (Address, *(UINT64*)Data);
+ MmioWrite64 (Address, *(UINT64 *)Data);
}
+
break;
default:
ASSERT (FALSE);
@@ -98,14 +102,14 @@ EmmcPeimHcRwMmio ( EFI_STATUS
EFIAPI
EmmcPeimHcOrMmio (
- IN UINTN Address,
- IN UINT8 Count,
- IN VOID *OrData
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN VOID *OrData
)
{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 Or;
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 Or;
Status = EmmcPeimHcRwMmio (Address, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
@@ -113,13 +117,13 @@ EmmcPeimHcOrMmio ( }
if (Count == 1) {
- Or = *(UINT8*) OrData;
+ Or = *(UINT8 *)OrData;
} else if (Count == 2) {
- Or = *(UINT16*) OrData;
+ Or = *(UINT16 *)OrData;
} else if (Count == 4) {
- Or = *(UINT32*) OrData;
+ Or = *(UINT32 *)OrData;
} else if (Count == 8) {
- Or = *(UINT64*) OrData;
+ Or = *(UINT64 *)OrData;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -149,14 +153,14 @@ EmmcPeimHcOrMmio ( EFI_STATUS
EFIAPI
EmmcPeimHcAndMmio (
- IN UINTN Address,
- IN UINT8 Count,
- IN VOID *AndData
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN VOID *AndData
)
{
- EFI_STATUS Status;
- UINT64 Data;
- UINT64 And;
+ EFI_STATUS Status;
+ UINT64 Data;
+ UINT64 And;
Status = EmmcPeimHcRwMmio (Address, TRUE, Count, &Data);
if (EFI_ERROR (Status)) {
@@ -164,13 +168,13 @@ EmmcPeimHcAndMmio ( }
if (Count == 1) {
- And = *(UINT8*) AndData;
+ And = *(UINT8 *)AndData;
} else if (Count == 2) {
- And = *(UINT16*) AndData;
+ And = *(UINT16 *)AndData;
} else if (Count == 4) {
- And = *(UINT32*) AndData;
+ And = *(UINT32 *)AndData;
} else if (Count == 8) {
- And = *(UINT64*) AndData;
+ And = *(UINT64 *)AndData;
} else {
return EFI_INVALID_PARAMETER;
}
@@ -198,14 +202,14 @@ EmmcPeimHcAndMmio ( EFI_STATUS
EFIAPI
EmmcPeimHcCheckMmioSet (
- IN UINTN Address,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue
)
{
- EFI_STATUS Status;
- UINT64 Value;
+ EFI_STATUS Status;
+ UINT64 Value;
//
// Access PCI MMIO space to see if the value is the tested one.
@@ -245,15 +249,15 @@ EmmcPeimHcCheckMmioSet ( EFI_STATUS
EFIAPI
EmmcPeimHcWaitMmioSet (
- IN UINTN Address,
- IN UINT8 Count,
- IN UINT64 MaskValue,
- IN UINT64 TestValue,
- IN UINT64 Timeout
+ IN UINTN Address,
+ IN UINT8 Count,
+ IN UINT64 MaskValue,
+ IN UINT64 TestValue,
+ IN UINT64 Timeout
)
{
- EFI_STATUS Status;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ BOOLEAN InfiniteWait;
if (Timeout == 0) {
InfiniteWait = TRUE;
@@ -294,11 +298,11 @@ EmmcPeimHcWaitMmioSet ( **/
EFI_STATUS
EmmcPeimHcReset (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT8 SwReset;
+ EFI_STATUS Status;
+ UINT8 SwReset;
SwReset = 0xFF;
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset);
@@ -319,6 +323,7 @@ EmmcPeimHcReset ( DEBUG ((DEBUG_INFO, "EmmcPeimHcReset: reset done with %r\n", Status));
return Status;
}
+
//
// Enable all interrupt after reset all.
//
@@ -339,25 +344,26 @@ EmmcPeimHcReset ( **/
EFI_STATUS
EmmcPeimHcEnableInterrupt (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT16 IntStatus;
+ EFI_STATUS Status;
+ UINT16 IntStatus;
//
// Enable all bits in Error Interrupt Status Enable Register
//
IntStatus = 0xFFFF;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Enable all bits in Normal Interrupt Status Enable Register
//
IntStatus = 0xFFFF;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);
return Status;
}
@@ -374,12 +380,12 @@ EmmcPeimHcEnableInterrupt ( **/
EFI_STATUS
EmmcPeimHcGetCapability (
- IN UINTN Bar,
- OUT EMMC_HC_SLOT_CAP *Capability
+ IN UINTN Bar,
+ OUT EMMC_HC_SLOT_CAP *Capability
)
{
- EFI_STATUS Status;
- UINT64 Cap;
+ EFI_STATUS Status;
+ UINT64 Cap;
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_CAP, TRUE, sizeof (Cap), &Cap);
if (EFI_ERROR (Status)) {
@@ -406,12 +412,12 @@ EmmcPeimHcGetCapability ( **/
EFI_STATUS
EmmcPeimHcCardDetect (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT16 Data;
- UINT32 PresentState;
+ EFI_STATUS Status;
+ UINT16 Data;
+ UINT32 PresentState;
//
// Check Normal Interrupt Status Register
@@ -460,12 +466,12 @@ EmmcPeimHcCardDetect ( **/
EFI_STATUS
EmmcPeimHcStopClock (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT32 PresentState;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ UINT32 PresentState;
+ UINT16 ClockCtrl;
//
// Ensure no SD transactions are occurring on the SD Bus by
@@ -486,8 +492,8 @@ EmmcPeimHcStopClock ( //
// Set SD Clock Enable in the Clock Control register to 0
//
- ClockCtrl = (UINT16)~BIT2;
- Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ ClockCtrl = (UINT16) ~BIT2;
+ Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
return Status;
}
@@ -506,18 +512,18 @@ EmmcPeimHcStopClock ( **/
EFI_STATUS
EmmcPeimHcClockSupply (
- IN UINTN Bar,
- IN UINT64 ClockFreq
+ IN UINTN Bar,
+ IN UINT64 ClockFreq
)
{
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- UINT32 BaseClkFreq;
- UINT32 SettingFreq;
- UINT32 Divisor;
- UINT32 Remainder;
- UINT16 ControllerVer;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ UINT32 BaseClkFreq;
+ UINT32 SettingFreq;
+ UINT32 Divisor;
+ UINT32 Remainder;
+ UINT16 ControllerVer;
+ UINT16 ClockCtrl;
//
// Calculate a divisor for SD clock frequency
@@ -526,6 +532,7 @@ EmmcPeimHcClockSupply ( if (EFI_ERROR (Status)) {
return Status;
}
+
ASSERT (Capability.BaseClkFreq != 0);
BaseClkFreq = Capability.BaseClkFreq;
@@ -551,8 +558,9 @@ EmmcPeimHcClockSupply ( if ((ClockFreq == SettingFreq) && (Remainder == 0)) {
break;
}
+
if ((ClockFreq == SettingFreq) && (Remainder != 0)) {
- SettingFreq ++;
+ SettingFreq++;
}
}
@@ -562,6 +570,7 @@ EmmcPeimHcClockSupply ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.
//
@@ -575,6 +584,7 @@ EmmcPeimHcClockSupply ( if (((Divisor - 1) & Divisor) != 0) {
Divisor = 1 << (HighBitSet32 (Divisor) + 1);
}
+
ASSERT (Divisor <= 0x80);
ClockCtrl = (Divisor & 0xFF) << 8;
} else {
@@ -594,7 +604,7 @@ EmmcPeimHcClockSupply ( // Supply clock frequency with specified divisor
//
ClockCtrl |= BIT0;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Set SDCLK Frequency Select and Internal Clock Enable fields fails\n"));
return Status;
@@ -618,7 +628,7 @@ EmmcPeimHcClockSupply ( // Set SD Clock Enable in the Clock Control register to 1
//
ClockCtrl = BIT2;
- Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
return Status;
}
@@ -637,17 +647,17 @@ EmmcPeimHcClockSupply ( **/
EFI_STATUS
EmmcPeimHcPowerControl (
- IN UINTN Bar,
- IN UINT8 PowerCtrl
+ IN UINTN Bar,
+ IN UINT8 PowerCtrl
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
//
// Clr SD Bus Power
//
- PowerCtrl &= (UINT8)~BIT0;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
+ PowerCtrl &= (UINT8) ~BIT0;
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -656,7 +666,7 @@ EmmcPeimHcPowerControl ( // Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register
//
PowerCtrl |= BIT0;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);
return Status;
}
@@ -675,32 +685,34 @@ EmmcPeimHcPowerControl ( **/
EFI_STATUS
EmmcPeimHcSetBusWidth (
- IN UINTN Bar,
- IN UINT16 BusWidth
+ IN UINTN Bar,
+ IN UINT16 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
+ EFI_STATUS Status;
+ UINT8 HostCtrl1;
if (BusWidth == 1) {
- HostCtrl1 = (UINT8)~(BIT5 | BIT1);
- Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 = (UINT8) ~(BIT5 | BIT1);
+ Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
} else if (BusWidth == 4) {
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl1 |= BIT1;
- HostCtrl1 &= (UINT8)~BIT5;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
+ HostCtrl1 &= (UINT8) ~BIT5;
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
} else if (BusWidth == 8) {
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
- HostCtrl1 &= (UINT8)~BIT1;
+
+ HostCtrl1 &= (UINT8) ~BIT1;
HostCtrl1 |= BIT5;
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);
} else {
ASSERT (FALSE);
return EFI_INVALID_PARAMETER;
@@ -720,12 +732,12 @@ EmmcPeimHcSetBusWidth ( **/
EFI_STATUS
EmmcPeimHcInitClockFreq (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- UINT32 InitFreq;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ UINT32 InitFreq;
//
// Calculate a divisor for SD clock frequency
@@ -741,11 +753,12 @@ EmmcPeimHcInitClockFreq ( //
return EFI_UNSUPPORTED;
}
+
//
// Supply 400KHz clock frequency at initialization phase.
//
InitFreq = 400;
- Status = EmmcPeimHcClockSupply (Bar, InitFreq);
+ Status = EmmcPeimHcClockSupply (Bar, InitFreq);
return Status;
}
@@ -762,13 +775,13 @@ EmmcPeimHcInitClockFreq ( **/
EFI_STATUS
EmmcPeimHcInitPowerVoltage (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- UINT8 MaxVoltage;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ UINT8 MaxVoltage;
+ UINT8 HostCtrl2;
//
// Get the support voltage of the Host Controller
@@ -777,6 +790,7 @@ EmmcPeimHcInitPowerVoltage ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Calculate supported maximum voltage according to SD Bus Voltage Select
//
@@ -796,10 +810,11 @@ EmmcPeimHcInitPowerVoltage ( //
MaxVoltage = 0x0A;
HostCtrl2 = BIT3;
- Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
MicroSecondDelay (5000);
} else {
ASSERT (FALSE);
@@ -827,11 +842,11 @@ EmmcPeimHcInitPowerVoltage ( **/
EFI_STATUS
EmmcPeimHcInitTimeoutCtrl (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
- UINT8 Timeout;
+ EFI_STATUS Status;
+ UINT8 Timeout;
Timeout = 0x0E;
Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_TIMEOUT_CTRL, FALSE, sizeof (Timeout), &Timeout);
@@ -851,10 +866,10 @@ EmmcPeimHcInitTimeoutCtrl ( **/
EFI_STATUS
EmmcPeimHcInitHost (
- IN UINTN Bar
+ IN UINTN Bar
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
Status = EmmcPeimHcInitClockFreq (Bar);
if (EFI_ERROR (Status)) {
@@ -882,18 +897,18 @@ EmmcPeimHcInitHost ( **/
EFI_STATUS
EmmcPeimHcLedOnOff (
- IN UINTN Bar,
- IN BOOLEAN On
+ IN UINTN Bar,
+ IN BOOLEAN On
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl1;
+ EFI_STATUS Status;
+ UINT8 HostCtrl1;
if (On) {
HostCtrl1 = BIT0;
Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
} else {
- HostCtrl1 = (UINT8)~BIT0;
+ HostCtrl1 = (UINT8) ~BIT0;
Status = EmmcPeimHcAndMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
}
@@ -913,15 +928,15 @@ EmmcPeimHcLedOnOff ( **/
EFI_STATUS
BuildAdmaDescTable (
- IN EMMC_TRB *Trb
+ IN EMMC_TRB *Trb
)
{
- EFI_PHYSICAL_ADDRESS Data;
- UINT64 DataLen;
- UINT64 Entries;
- UINT32 Index;
- UINT64 Remaining;
- UINT32 Address;
+ EFI_PHYSICAL_ADDRESS Data;
+ UINT64 DataLen;
+ UINT64 Entries;
+ UINT32 Index;
+ UINT64 Remaining;
+ UINT32 Address;
Data = Trb->DataPhy;
DataLen = Trb->DataLen;
@@ -931,6 +946,7 @@ BuildAdmaDescTable ( if ((Data >= 0x100000000ul) || ((Data + DataLen) > 0x100000000ul)) {
return EFI_INVALID_PARAMETER;
}
+
//
// Address field shall be set on 32-bit boundary (Lower 2-bit is always set to 0)
// for 32-bit address descriptor table.
@@ -951,14 +967,14 @@ BuildAdmaDescTable ( Address = (UINT32)Data;
for (Index = 0; Index < Entries; Index++) {
if (Remaining <= ADMA_MAX_DATA_PER_LINE) {
- Trb->AdmaDesc[Index].Valid = 1;
- Trb->AdmaDesc[Index].Act = 2;
+ Trb->AdmaDesc[Index].Valid = 1;
+ Trb->AdmaDesc[Index].Act = 2;
Trb->AdmaDesc[Index].Length = (UINT16)Remaining;
Trb->AdmaDesc[Index].Address = Address;
break;
} else {
- Trb->AdmaDesc[Index].Valid = 1;
- Trb->AdmaDesc[Index].Act = 2;
+ Trb->AdmaDesc[Index].Valid = 1;
+ Trb->AdmaDesc[Index].Act = 2;
Trb->AdmaDesc[Index].Length = 0;
Trb->AdmaDesc[Index].Address = Address;
}
@@ -985,15 +1001,15 @@ BuildAdmaDescTable ( **/
EMMC_TRB *
EmmcPeimCreateTrb (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN EMMC_COMMAND_PACKET *Packet
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN EMMC_COMMAND_PACKET *Packet
)
{
- EMMC_TRB *Trb;
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- EDKII_IOMMU_OPERATION MapOp;
- UINTN MapLength;
+ EMMC_TRB *Trb;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ EDKII_IOMMU_OPERATION MapOp;
+ UINTN MapLength;
//
// Calculate a divisor for SD clock frequency
@@ -1043,7 +1059,7 @@ EmmcPeimCreateTrb ( if (Trb->DataLen != 0) {
MapLength = Trb->DataLen;
- Status = IoMmuMap (MapOp, Trb->Data, &MapLength, &Trb->DataPhy, &Trb->DataMap);
+ Status = IoMmuMap (MapOp, Trb->Data, &MapLength, &Trb->DataPhy, &Trb->DataMap);
if (EFI_ERROR (Status) || (MapLength != Trb->DataLen)) {
DEBUG ((DEBUG_ERROR, "EmmcPeimCreateTrb: Fail to map data buffer.\n"));
@@ -1055,7 +1071,7 @@ EmmcPeimCreateTrb ( Trb->Mode = EmmcNoData;
} else if (Capability.Adma2 != 0) {
Trb->Mode = EmmcAdmaMode;
- Status = BuildAdmaDescTable (Trb);
+ Status = BuildAdmaDescTable (Trb);
if (EFI_ERROR (Status)) {
goto Error;
}
@@ -1065,6 +1081,7 @@ EmmcPeimCreateTrb ( Trb->Mode = EmmcPioMode;
}
}
+
return Trb;
Error:
@@ -1080,7 +1097,7 @@ Error: **/
VOID
EmmcPeimFreeTrb (
- IN EMMC_TRB *Trb
+ IN EMMC_TRB *Trb
)
{
if ((Trb != NULL) && (Trb->DataMap != NULL)) {
@@ -1094,6 +1111,7 @@ EmmcPeimFreeTrb ( if (Trb != NULL) {
FreePool (Trb);
}
+
return;
}
@@ -1110,19 +1128,20 @@ EmmcPeimFreeTrb ( **/
EFI_STATUS
EmmcPeimCheckTrbEnv (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT32 PresentState;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT32 PresentState;
Packet = Trb->Packet;
if ((Packet->EmmcCmdBlk->CommandType == EmmcCommandTypeAdtc) ||
(Packet->EmmcCmdBlk->ResponseType == EmmcResponceTypeR1b) ||
- (Packet->EmmcCmdBlk->ResponseType == EmmcResponceTypeR5b)) {
+ (Packet->EmmcCmdBlk->ResponseType == EmmcResponceTypeR5b))
+ {
//
// Wait Command Inhibit (CMD) and Command Inhibit (DAT) in
// the Present State register to be 0
@@ -1159,14 +1178,14 @@ EmmcPeimCheckTrbEnv ( **/
EFI_STATUS
EmmcPeimWaitTrbEnv (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT64 Timeout;
+ BOOLEAN InfiniteWait;
//
// Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register
@@ -1187,6 +1206,7 @@ EmmcPeimWaitTrbEnv ( if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 1 microsecond.
//
@@ -1210,21 +1230,21 @@ EmmcPeimWaitTrbEnv ( **/
EFI_STATUS
EmmcPeimExecTrb (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT16 Cmd;
- UINT16 IntStatus;
- UINT32 Argument;
- UINT16 BlkCount;
- UINT16 BlkSize;
- UINT16 TransMode;
- UINT8 HostCtrl1;
- UINT32 SdmaAddr;
- UINT64 AdmaAddr;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT16 Cmd;
+ UINT16 IntStatus;
+ UINT32 Argument;
+ UINT16 BlkCount;
+ UINT16 BlkSize;
+ UINT16 TransMode;
+ UINT8 HostCtrl1;
+ UINT32 SdmaAddr;
+ UINT64 AdmaAddr;
Packet = Trb->Packet;
//
@@ -1235,6 +1255,7 @@ EmmcPeimExecTrb ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Clear all bits in Normal Interrupt Status Register
//
@@ -1243,12 +1264,13 @@ EmmcPeimExecTrb ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set Host Control 1 register DMA Select field
//
if (Trb->Mode == EmmcAdmaMode) {
HostCtrl1 = BIT4;
- Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = EmmcPeimHcOrMmio (Bar + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1295,7 +1317,7 @@ EmmcPeimExecTrb ( BlkCount = (UINT16)(Trb->DataLen / Trb->BlockSize);
}
- Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);
+ Status = EmmcPeimHcRwMmio (Bar + EMMC_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -1311,9 +1333,11 @@ EmmcPeimExecTrb ( if (Trb->Mode != EmmcPioMode) {
TransMode |= BIT0;
}
+
if (Trb->Read) {
TransMode |= BIT4;
}
+
if (BlkCount > 1) {
TransMode |= BIT5 | BIT1;
}
@@ -1324,10 +1348,11 @@ EmmcPeimExecTrb ( return Status;
}
- Cmd = (UINT16)LShiftU64(Packet->EmmcCmdBlk->CommandIndex, 8);
+ Cmd = (UINT16)LShiftU64 (Packet->EmmcCmdBlk->CommandIndex, 8);
if (Packet->EmmcCmdBlk->CommandType == EmmcCommandTypeAdtc) {
Cmd |= BIT5;
}
+
//
// Convert ResponseType to value
//
@@ -1341,7 +1366,7 @@ EmmcPeimExecTrb ( break;
case EmmcResponceTypeR2:
Cmd |= (BIT0 | BIT3);
- break;
+ break;
case EmmcResponceTypeR3:
case EmmcResponceTypeR4:
Cmd |= BIT1;
@@ -1355,6 +1380,7 @@ EmmcPeimExecTrb ( break;
}
}
+
//
// Execute cmd
//
@@ -1375,18 +1401,18 @@ EmmcPeimExecTrb ( **/
EFI_STATUS
EmmcPeimCheckTrbResult (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT16 IntStatus;
- UINT32 Response[4];
- UINT32 SdmaAddr;
- UINT8 Index;
- UINT8 SwReset;
- UINT32 PioLength;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT16 IntStatus;
+ UINT32 Response[4];
+ UINT32 SdmaAddr;
+ UINT8 Index;
+ UINT8 SwReset;
+ UINT32 PioLength;
SwReset = 0;
Packet = Trb->Packet;
@@ -1402,6 +1428,7 @@ EmmcPeimCheckTrbResult ( if (EFI_ERROR (Status)) {
goto Done;
}
+
//
// Check Transfer Complete bit is set or not.
//
@@ -1430,6 +1457,7 @@ EmmcPeimCheckTrbResult ( goto Done;
}
+
//
// Check if there is a error happened during cmd execution.
// If yes, then do error recovery procedure to follow SD Host Controller
@@ -1449,6 +1477,7 @@ EmmcPeimCheckTrbResult ( if ((IntStatus & 0x0F) != 0) {
SwReset |= BIT1;
}
+
if ((IntStatus & 0xF0) != 0) {
SwReset |= BIT2;
}
@@ -1462,6 +1491,7 @@ EmmcPeimCheckTrbResult ( if (EFI_ERROR (Status)) {
goto Done;
}
+
Status = EmmcPeimHcWaitMmioSet (
Bar + EMMC_HC_SW_RST,
sizeof (SwReset),
@@ -1476,6 +1506,7 @@ EmmcPeimCheckTrbResult ( Status = EFI_DEVICE_ERROR;
goto Done;
}
+
//
// Check if DMA interrupt is signalled for the SDMA transfer.
//
@@ -1493,6 +1524,7 @@ EmmcPeimCheckTrbResult ( if (EFI_ERROR (Status)) {
goto Done;
}
+
//
// Update SDMA Address register.
//
@@ -1506,12 +1538,14 @@ EmmcPeimCheckTrbResult ( if (EFI_ERROR (Status)) {
goto Done;
}
+
Trb->DataPhy = (UINT32)(UINTN)SdmaAddr;
}
if ((Packet->EmmcCmdBlk->CommandType != EmmcCommandTypeAdtc) &&
(Packet->EmmcCmdBlk->ResponseType != EmmcResponceTypeR1b) &&
- (Packet->EmmcCmdBlk->ResponseType != EmmcResponceTypeR5b)) {
+ (Packet->EmmcCmdBlk->ResponseType != EmmcResponceTypeR5b))
+ {
if ((IntStatus & BIT0) == BIT0) {
Status = EFI_SUCCESS;
goto Done;
@@ -1534,8 +1568,9 @@ EmmcPeimCheckTrbResult ( // Read data out from Buffer Port register
//
for (PioLength = 0; PioLength < Trb->DataLen; PioLength += 4) {
- EmmcPeimHcRwMmio (Bar + EMMC_HC_BUF_DAT_PORT, TRUE, 4, (UINT8*)Trb->Data + PioLength);
+ EmmcPeimHcRwMmio (Bar + EMMC_HC_BUF_DAT_PORT, TRUE, 4, (UINT8 *)Trb->Data + PioLength);
}
+
Status = EFI_SUCCESS;
goto Done;
}
@@ -1560,6 +1595,7 @@ Done: return Status;
}
}
+
CopyMem (Packet->EmmcStatusBlk, Response, sizeof (Response));
}
}
@@ -1583,14 +1619,14 @@ Done: **/
EFI_STATUS
EmmcPeimWaitTrbResult (
- IN UINTN Bar,
- IN EMMC_TRB *Trb
+ IN UINTN Bar,
+ IN EMMC_TRB *Trb
)
{
- EFI_STATUS Status;
- EMMC_COMMAND_PACKET *Packet;
- UINT64 Timeout;
- BOOLEAN InfiniteWait;
+ EFI_STATUS Status;
+ EMMC_COMMAND_PACKET *Packet;
+ UINT64 Timeout;
+ BOOLEAN InfiniteWait;
Packet = Trb->Packet;
//
@@ -1611,6 +1647,7 @@ EmmcPeimWaitTrbResult ( if (Status != EFI_NOT_READY) {
return Status;
}
+
//
// Stall for 1 microsecond.
//
@@ -1655,12 +1692,12 @@ EmmcPeimWaitTrbResult ( EFI_STATUS
EFIAPI
EmmcPeimExecCmd (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN OUT EMMC_COMMAND_PACKET *Packet
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN OUT EMMC_COMMAND_PACKET *Packet
)
{
- EFI_STATUS Status;
- EMMC_TRB *Trb;
+ EFI_STATUS Status;
+ EMMC_TRB *Trb;
if (Packet == NULL) {
return EFI_INVALID_PARAMETER;
@@ -1718,13 +1755,13 @@ Done: **/
EFI_STATUS
EmmcPeimReset (
- IN EMMC_PEIM_HC_SLOT *Slot
+ IN EMMC_PEIM_HC_SLOT *Slot
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1732,11 +1769,11 @@ EmmcPeimReset ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;
- EmmcCmdBlk.CommandType = EmmcCommandTypeBc;
- EmmcCmdBlk.ResponseType = 0;
+ EmmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeBc;
+ EmmcCmdBlk.ResponseType = 0;
EmmcCmdBlk.CommandArgument = 0;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1759,14 +1796,14 @@ EmmcPeimReset ( **/
EFI_STATUS
EmmcPeimGetOcr (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN OUT UINT32 *Argument
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN OUT UINT32 *Argument
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1774,11 +1811,11 @@ EmmcPeimGetOcr ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;
- EmmcCmdBlk.CommandType = EmmcCommandTypeBcr;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR3;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeBcr;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR3;
EmmcCmdBlk.CommandArgument = *Argument;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1806,13 +1843,13 @@ EmmcPeimGetOcr ( **/
EFI_STATUS
EmmcPeimGetAllCid (
- IN EMMC_PEIM_HC_SLOT *Slot
+ IN EMMC_PEIM_HC_SLOT *Slot
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1820,11 +1857,11 @@ EmmcPeimGetAllCid ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;
- EmmcCmdBlk.CommandType = EmmcCommandTypeBcr;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR2;
+ EmmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeBcr;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR2;
EmmcCmdBlk.CommandArgument = 0;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1847,14 +1884,14 @@ EmmcPeimGetAllCid ( **/
EFI_STATUS
EmmcPeimSetRca (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1862,11 +1899,11 @@ EmmcPeimSetRca ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = Rca << 16;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1892,15 +1929,15 @@ EmmcPeimSetRca ( **/
EFI_STATUS
EmmcPeimGetCsd (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- OUT EMMC_CSD *Csd
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ OUT EMMC_CSD *Csd
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1908,11 +1945,11 @@ EmmcPeimGetCsd ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR2;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_CSD;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR2;
EmmcCmdBlk.CommandArgument = Rca << 16;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1920,7 +1957,7 @@ EmmcPeimGetCsd ( //
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.
//
- CopyMem (((UINT8*)Csd) + 1, &EmmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
+ CopyMem (((UINT8 *)Csd) + 1, &EmmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);
}
return Status;
@@ -1940,14 +1977,14 @@ EmmcPeimGetCsd ( **/
EFI_STATUS
EmmcPeimSelect (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1955,11 +1992,11 @@ EmmcPeimSelect ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = Rca << 16;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -1981,14 +2018,14 @@ EmmcPeimSelect ( **/
EFI_STATUS
EmmcPeimGetExtCsd (
- IN EMMC_PEIM_HC_SLOT *Slot,
- OUT EMMC_EXT_CSD *ExtCsd
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ OUT EMMC_EXT_CSD *ExtCsd
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -1996,11 +2033,11 @@ EmmcPeimGetExtCsd ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAdtc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAdtc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = 0x00000000;
Packet.InDataBuffer = ExtCsd;
@@ -2028,17 +2065,17 @@ EmmcPeimGetExtCsd ( **/
EFI_STATUS
EmmcPeimSwitch (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT8 Access,
- IN UINT8 Index,
- IN UINT8 Value,
- IN UINT8 CmdSet
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT8 Access,
+ IN UINT8 Index,
+ IN UINT8 Value,
+ IN UINT8 CmdSet
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2046,11 +2083,11 @@ EmmcPeimSwitch ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SWITCH;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1b;
+ EmmcCmdBlk.CommandIndex = EMMC_SWITCH;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1b;
EmmcCmdBlk.CommandArgument = (Access << 24) | (Index << 16) | (Value << 8) | CmdSet;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -2073,15 +2110,15 @@ EmmcPeimSwitch ( **/
EFI_STATUS
EmmcPeimSendStatus (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- OUT UINT32 *DevStatus
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ OUT UINT32 *DevStatus
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2089,11 +2126,11 @@ EmmcPeimSendStatus ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = Rca << 16;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -2119,14 +2156,14 @@ EmmcPeimSendStatus ( **/
EFI_STATUS
EmmcPeimSetBlkCount (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT16 BlockCount
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT16 BlockCount
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2136,9 +2173,9 @@ EmmcPeimSetBlkCount ( Packet.EmmcStatusBlk = &EmmcStatusBlk;
Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SET_BLOCK_COUNT;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SET_BLOCK_COUNT;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = BlockCount;
Status = EmmcPeimExecCmd (Slot, &Packet);
@@ -2165,18 +2202,18 @@ EmmcPeimSetBlkCount ( **/
EFI_STATUS
EmmcPeimRwMultiBlocks (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN EFI_LBA Lba,
- IN UINT32 BlockSize,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN EFI_LBA Lba,
+ IN UINT32 BlockSize,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2191,7 +2228,7 @@ EmmcPeimRwMultiBlocks ( // transfer speed (2.4MB/s).
// Refer to eMMC 5.0 spec section 6.9.1 for details.
//
- Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;;
+ Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;
if (IsRead) {
Packet.InDataBuffer = Buffer;
@@ -2237,15 +2274,15 @@ EmmcPeimRwMultiBlocks ( **/
EFI_STATUS
EmmcPeimSendTuningBlk (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT8 BusWidth
)
{
- EMMC_COMMAND_BLOCK EmmcCmdBlk;
- EMMC_STATUS_BLOCK EmmcStatusBlk;
- EMMC_COMMAND_PACKET Packet;
- EFI_STATUS Status;
- UINT8 TuningBlock[128];
+ EMMC_COMMAND_BLOCK EmmcCmdBlk;
+ EMMC_STATUS_BLOCK EmmcStatusBlk;
+ EMMC_COMMAND_PACKET Packet;
+ EFI_STATUS Status;
+ UINT8 TuningBlock[128];
ZeroMem (&EmmcCmdBlk, sizeof (EmmcCmdBlk));
ZeroMem (&EmmcStatusBlk, sizeof (EmmcStatusBlk));
@@ -2253,11 +2290,11 @@ EmmcPeimSendTuningBlk ( Packet.EmmcCmdBlk = &EmmcCmdBlk;
Packet.EmmcStatusBlk = &EmmcStatusBlk;
- Packet.Timeout = EMMC_TIMEOUT;
+ Packet.Timeout = EMMC_TIMEOUT;
- EmmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;
- EmmcCmdBlk.CommandType = EmmcCommandTypeAdtc;
- EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
+ EmmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;
+ EmmcCmdBlk.CommandType = EmmcCommandTypeAdtc;
+ EmmcCmdBlk.ResponseType = EmmcResponceTypeR1;
EmmcCmdBlk.CommandArgument = 0;
Packet.InDataBuffer = TuningBlock;
@@ -2290,22 +2327,23 @@ EmmcPeimSendTuningBlk ( **/
EFI_STATUS
EmmcPeimTuningClkForHs200 (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HostCtrl2;
- UINT8 Retry;
+ EFI_STATUS Status;
+ UINT8 HostCtrl2;
+ UINT8 Retry;
//
// Notify the host that the sampling clock tuning procedure starts.
//
HostCtrl2 = BIT6;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Ask the device to send a sequence of tuning blocks till the tuning procedure is done.
//
@@ -2334,11 +2372,12 @@ EmmcPeimTuningClkForHs200 ( //
// Abort the tuning procedure and reset the tuning circuit.
//
- HostCtrl2 = (UINT8)~(BIT6 | BIT7);
- Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~(BIT6 | BIT7);
+ Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
return EFI_DEVICE_ERROR;
}
@@ -2360,18 +2399,18 @@ EmmcPeimTuningClkForHs200 ( **/
EFI_STATUS
EmmcPeimSwitchBusWidth (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN BOOLEAN IsDdr,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN BOOLEAN IsDdr,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 Access;
- UINT8 Index;
- UINT8 Value;
- UINT8 CmdSet;
- UINT32 DevStatus;
+ EFI_STATUS Status;
+ UINT8 Access;
+ UINT8 Index;
+ UINT8 Value;
+ UINT8 CmdSet;
+ UINT32 DevStatus;
//
// Write Byte, the Value field is written into the byte pointed by Index.
@@ -2400,6 +2439,7 @@ EmmcPeimSwitchBusWidth ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check the switch operation is really successful or not.
//
@@ -2429,18 +2469,18 @@ EmmcPeimSwitchBusWidth ( **/
EFI_STATUS
EmmcPeimSwitchClockFreq (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN UINT8 HsTiming,
- IN UINT32 ClockFreq
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN UINT8 HsTiming,
+ IN UINT32 ClockFreq
)
{
- EFI_STATUS Status;
- UINT8 Access;
- UINT8 Index;
- UINT8 Value;
- UINT8 CmdSet;
- UINT32 DevStatus;
+ EFI_STATUS Status;
+ UINT8 Access;
+ UINT8 Index;
+ UINT8 Value;
+ UINT8 CmdSet;
+ UINT32 DevStatus;
//
// Write Byte, the Value field is written into the byte pointed by Index.
@@ -2459,12 +2499,14 @@ EmmcPeimSwitchClockFreq ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Check the switch operation is really successful or not.
//
if ((DevStatus & BIT7) != 0) {
return EFI_DEVICE_ERROR;
}
+
//
// Convert the clock freq unit from MHz to KHz.
//
@@ -2492,36 +2534,38 @@ EmmcPeimSwitchClockFreq ( **/
EFI_STATUS
EmmcPeimSwitchToHighSpeed (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN UINT32 ClockFreq,
- IN BOOLEAN IsDdr,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN UINT32 ClockFreq,
+ IN BOOLEAN IsDdr,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl1;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ UINT8 HsTiming;
+ UINT8 HostCtrl1;
+ UINT8 HostCtrl2;
Status = EmmcPeimSwitchBusWidth (Slot, Rca, IsDdr, BusWidth);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set to High Speed timing
//
HostCtrl1 = BIT2;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);
if (EFI_ERROR (Status)) {
return Status;
}
- HostCtrl2 = (UINT8)~0x7;
- Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~0x7;
+ Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
if (IsDdr) {
HostCtrl2 = BIT2;
} else if (ClockFreq == 52) {
@@ -2529,13 +2573,14 @@ EmmcPeimSwitchToHighSpeed ( } else {
HostCtrl2 = 0;
}
+
Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
HsTiming = 1;
- Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
+ Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
return Status;
}
@@ -2557,16 +2602,16 @@ EmmcPeimSwitchToHighSpeed ( **/
EFI_STATUS
EmmcPeimSwitchToHS200 (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN UINT32 ClockFreq,
- IN UINT8 BusWidth
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN UINT32 ClockFreq,
+ IN UINT8 BusWidth
)
{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl2;
- UINT16 ClockCtrl;
+ EFI_STATUS Status;
+ UINT8 HsTiming;
+ UINT8 HostCtrl2;
+ UINT16 ClockCtrl;
if ((BusWidth != 4) && (BusWidth != 8)) {
return EFI_INVALID_PARAMETER;
@@ -2576,6 +2621,7 @@ EmmcPeimSwitchToHS200 ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set to HS200/SDR104 timing
//
@@ -2587,13 +2633,14 @@ EmmcPeimSwitchToHS200 ( return Status;
}
- HostCtrl2 = (UINT8)~0x7;
- Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~0x7;
+ Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl2 = BIT0 | BIT1;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2611,14 +2658,15 @@ EmmcPeimSwitchToHS200 ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set SD Clock Enable in the Clock Control register to 1
//
ClockCtrl = BIT2;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
HsTiming = 2;
- Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
+ Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
if (EFI_ERROR (Status)) {
return Status;
}
@@ -2644,27 +2692,29 @@ EmmcPeimSwitchToHS200 ( **/
EFI_STATUS
EmmcPeimSwitchToHS400 (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca,
- IN UINT32 ClockFreq
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca,
+ IN UINT32 ClockFreq
)
{
- EFI_STATUS Status;
- UINT8 HsTiming;
- UINT8 HostCtrl2;
+ EFI_STATUS Status;
+ UINT8 HsTiming;
+ UINT8 HostCtrl2;
Status = EmmcPeimSwitchToHS200 (Slot, Rca, ClockFreq, 8);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set to High Speed timing and set the clock frequency to a value less than 52MHz.
//
HsTiming = 1;
- Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, 52);
+ Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, 52);
if (EFI_ERROR (Status)) {
return Status;
}
+
//
// HS400 mode must use 8 data lines.
//
@@ -2672,22 +2722,24 @@ EmmcPeimSwitchToHS400 ( if (EFI_ERROR (Status)) {
return Status;
}
+
//
// Set to HS400 timing
//
- HostCtrl2 = (UINT8)~0x7;
- Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ HostCtrl2 = (UINT8) ~0x7;
+ Status = EmmcPeimHcAndMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
+
HostCtrl2 = BIT0 | BIT2;
- Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
+ Status = EmmcPeimHcOrMmio (Slot->EmmcHcBase + EMMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);
if (EFI_ERROR (Status)) {
return Status;
}
HsTiming = 3;
- Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
+ Status = EmmcPeimSwitchClockFreq (Slot, Rca, HsTiming, ClockFreq);
return Status;
}
@@ -2707,16 +2759,16 @@ EmmcPeimSwitchToHS400 ( **/
EFI_STATUS
EmmcPeimSetBusMode (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT32 Rca
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT32 Rca
)
{
- EFI_STATUS Status;
- EMMC_HC_SLOT_CAP Capability;
- UINT8 HsTiming;
- BOOLEAN IsDdr;
- UINT32 ClockFreq;
- UINT8 BusWidth;
+ EFI_STATUS Status;
+ EMMC_HC_SLOT_CAP Capability;
+ UINT8 HsTiming;
+ BOOLEAN IsDdr;
+ UINT32 ClockFreq;
+ UINT8 BusWidth;
Status = EmmcPeimGetCsd (Slot, Rca, &Slot->Csd);
if (EFI_ERROR (Status)) {
@@ -2751,6 +2803,7 @@ EmmcPeimSetBusMode ( } else {
BusWidth = 4;
}
+
//
// Get Device_Type from EXT_CSD register.
//
@@ -2759,6 +2812,7 @@ EmmcPeimSetBusMode ( DEBUG ((DEBUG_ERROR, "EmmcPeimSetBusMode: EmmcPeimGetExtCsd fails with %r\n", Status));
return Status;
}
+
//
// Calculate supported bus speed/bus width/clock frequency.
//
@@ -2782,6 +2836,7 @@ EmmcPeimSetBusMode ( IsDdr = FALSE;
ClockFreq = 26;
}
+
//
// Check if both of the device and the host controller support HS400 DDR mode.
//
@@ -2802,7 +2857,7 @@ EmmcPeimSetBusMode ( return EFI_SUCCESS;
}
- DEBUG ((DEBUG_INFO, "HsTiming %d ClockFreq %d BusWidth %d Ddr %a\n", HsTiming, ClockFreq, BusWidth, IsDdr ? "TRUE":"FALSE"));
+ DEBUG ((DEBUG_INFO, "HsTiming %d ClockFreq %d BusWidth %d Ddr %a\n", HsTiming, ClockFreq, BusWidth, IsDdr ? "TRUE" : "FALSE"));
if (HsTiming == 3) {
//
@@ -2837,13 +2892,13 @@ EmmcPeimSetBusMode ( **/
EFI_STATUS
EmmcPeimIdentification (
- IN EMMC_PEIM_HC_SLOT *Slot
+ IN EMMC_PEIM_HC_SLOT *Slot
)
{
- EFI_STATUS Status;
- UINT32 Ocr;
- UINT32 Rca;
- UINTN Retry;
+ EFI_STATUS Status;
+ UINT32 Ocr;
+ UINT32 Rca;
+ UINTN Retry;
Status = EmmcPeimReset (Slot);
if (EFI_ERROR (Status)) {
@@ -2864,6 +2919,7 @@ EmmcPeimIdentification ( DEBUG ((DEBUG_ERROR, "EmmcPeimIdentification: EmmcPeimGetOcr fails too many times\n"));
return EFI_DEVICE_ERROR;
}
+
MicroSecondDelay (10 * 1000);
} while ((Ocr & BIT31) == 0);
@@ -2872,6 +2928,7 @@ EmmcPeimIdentification ( DEBUG ((DEBUG_ERROR, "EmmcPeimIdentification: EmmcPeimGetAllCid fails with %r\n", Status));
return Status;
}
+
//
// Don't support multiple devices on the slot, that is
// shared bus slot feature.
@@ -2882,6 +2939,7 @@ EmmcPeimIdentification ( DEBUG ((DEBUG_ERROR, "EmmcPeimIdentification: EmmcPeimSetRca fails with %r\n", Status));
return Status;
}
+
//
// Enter Data Tranfer Mode.
//
diff --git a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h index 4e3e51d144..6c6108b028 100644 --- a/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h +++ b/MdeModulePkg/Bus/Sd/EmmcBlockIoPei/EmmcHci.h @@ -61,9 +61,9 @@ typedef enum { //
// The maximum data length of each descriptor line
//
-#define ADMA_MAX_DATA_PER_LINE 0x10000
-#define EMMC_SDMA_BOUNDARY 512 * 1024
-#define EMMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
+#define ADMA_MAX_DATA_PER_LINE 0x10000
+#define EMMC_SDMA_BOUNDARY 512 * 1024
+#define EMMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))
typedef enum {
EmmcCommandTypeBc, // Broadcast commands, no response
@@ -85,76 +85,76 @@ typedef enum { } EMMC_RESPONSE_TYPE;
typedef struct _EMMC_COMMAND_BLOCK {
- UINT16 CommandIndex;
- UINT32 CommandArgument;
- UINT32 CommandType; // One of the EMMC_COMMAND_TYPE values
- UINT32 ResponseType; // One of the EMMC_RESPONSE_TYPE values
+ UINT16 CommandIndex;
+ UINT32 CommandArgument;
+ UINT32 CommandType; // One of the EMMC_COMMAND_TYPE values
+ UINT32 ResponseType; // One of the EMMC_RESPONSE_TYPE values
} EMMC_COMMAND_BLOCK;
typedef struct _EMMC_STATUS_BLOCK {
- UINT32 Resp0;
- UINT32 Resp1;
- UINT32 Resp2;
- UINT32 Resp3;
+ UINT32 Resp0;
+ UINT32 Resp1;
+ UINT32 Resp2;
+ UINT32 Resp3;
} EMMC_STATUS_BLOCK;
typedef struct _EMMC_COMMAND_PACKET {
- UINT64 Timeout;
- EMMC_COMMAND_BLOCK *EmmcCmdBlk;
- EMMC_STATUS_BLOCK *EmmcStatusBlk;
- VOID *InDataBuffer;
- VOID *OutDataBuffer;
- UINT32 InTransferLength;
- UINT32 OutTransferLength;
+ UINT64 Timeout;
+ EMMC_COMMAND_BLOCK *EmmcCmdBlk;
+ EMMC_STATUS_BLOCK *EmmcStatusBlk;
+ VOID *InDataBuffer;
+ VOID *OutDataBuffer;
+ UINT32 InTransferLength;
+ UINT32 OutTransferLength;
} EMMC_COMMAND_PACKET;
#pragma pack(1)
typedef struct {
- UINT32 Valid:1;
- UINT32 End:1;
- UINT32 Int:1;
- UINT32 Reserved:1;
- UINT32 Act:2;
- UINT32 Reserved1:10;
- UINT32 Length:16;
- UINT32 Address;
+ UINT32 Valid : 1;
+ UINT32 End : 1;
+ UINT32 Int : 1;
+ UINT32 Reserved : 1;
+ UINT32 Act : 2;
+ UINT32 Reserved1 : 10;
+ UINT32 Length : 16;
+ UINT32 Address;
} EMMC_HC_ADMA_DESC_LINE;
typedef struct {
- UINT32 TimeoutFreq:6; // bit 0:5
- UINT32 Reserved:1; // bit 6
- UINT32 TimeoutUnit:1; // bit 7
- UINT32 BaseClkFreq:8; // bit 8:15
- UINT32 MaxBlkLen:2; // bit 16:17
- UINT32 BusWidth8:1; // bit 18
- UINT32 Adma2:1; // bit 19
- UINT32 Reserved2:1; // bit 20
- UINT32 HighSpeed:1; // bit 21
- UINT32 Sdma:1; // bit 22
- UINT32 SuspRes:1; // bit 23
- UINT32 Voltage33:1; // bit 24
- UINT32 Voltage30:1; // bit 25
- UINT32 Voltage18:1; // bit 26
- UINT32 Reserved3:1; // bit 27
- UINT32 SysBus64:1; // bit 28
- UINT32 AsyncInt:1; // bit 29
- UINT32 SlotType:2; // bit 30:31
- UINT32 Sdr50:1; // bit 32
- UINT32 Sdr104:1; // bit 33
- UINT32 Ddr50:1; // bit 34
- UINT32 Reserved4:1; // bit 35
- UINT32 DriverTypeA:1; // bit 36
- UINT32 DriverTypeC:1; // bit 37
- UINT32 DriverTypeD:1; // bit 38
- UINT32 DriverType4:1; // bit 39
- UINT32 TimerCount:4; // bit 40:43
- UINT32 Reserved5:1; // bit 44
- UINT32 TuningSDR50:1; // bit 45
- UINT32 RetuningMod:2; // bit 46:47
- UINT32 ClkMultiplier:8; // bit 48:55
- UINT32 Reserved6:7; // bit 56:62
- UINT32 Hs400:1; // bit 63
+ UINT32 TimeoutFreq : 6; // bit 0:5
+ UINT32 Reserved : 1; // bit 6
+ UINT32 TimeoutUnit : 1; // bit 7
+ UINT32 BaseClkFreq : 8; // bit 8:15
+ UINT32 MaxBlkLen : 2; // bit 16:17
+ UINT32 BusWidth8 : 1; // bit 18
+ UINT32 Adma2 : 1; // bit 19
+ UINT32 Reserved2 : 1; // bit 20
+ UINT32 HighSpeed : 1; // bit 21
+ UINT32 Sdma : 1; // bit 22
+ UINT32 SuspRes : 1; // bit 23
+ UINT32 Voltage33 : 1; // bit 24
+ UINT32 Voltage30 : 1; // bit 25
+ UINT32 Voltage18 : 1; // bit 26
+ UINT32 Reserved3 : 1; // bit 27
+ UINT32 SysBus64 : 1; // bit 28
+ UINT32 AsyncInt : 1; // bit 29
+ UINT32 SlotType : 2; // bit 30:31
+ UINT32 Sdr50 : 1; // bit 32
+ UINT32 Sdr104 : 1; // bit 33
+ UINT32 Ddr50 : 1; // bit 34
+ UINT32 Reserved4 : 1; // bit 35
+ UINT32 DriverTypeA : 1; // bit 36
+ UINT32 DriverTypeC : 1; // bit 37
+ UINT32 DriverTypeD : 1; // bit 38
+ UINT32 DriverType4 : 1; // bit 39
+ UINT32 TimerCount : 4; // bit 40:43
+ UINT32 Reserved5 : 1; // bit 44
+ UINT32 TuningSDR50 : 1; // bit 45
+ UINT32 RetuningMod : 2; // bit 46:47
+ UINT32 ClkMultiplier : 8; // bit 48:55
+ UINT32 Reserved6 : 7; // bit 56:62
+ UINT32 Hs400 : 1; // bit 63
} EMMC_HC_SLOT_CAP;
#pragma pack()
@@ -170,7 +170,7 @@ typedef struct { **/
EFI_STATUS
EmmcPeimHcReset (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -185,7 +185,7 @@ EmmcPeimHcReset ( **/
EFI_STATUS
EmmcPeimHcEnableInterrupt (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -200,8 +200,8 @@ EmmcPeimHcEnableInterrupt ( **/
EFI_STATUS
EmmcPeimHcGetCapability (
- IN UINTN Bar,
- OUT EMMC_HC_SLOT_CAP *Capability
+ IN UINTN Bar,
+ OUT EMMC_HC_SLOT_CAP *Capability
);
/**
@@ -219,7 +219,7 @@ EmmcPeimHcGetCapability ( **/
EFI_STATUS
EmmcPeimHcCardDetect (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -234,7 +234,7 @@ EmmcPeimHcCardDetect ( **/
EFI_STATUS
EmmcPeimHcInitHost (
- IN UINTN Bar
+ IN UINTN Bar
);
/**
@@ -255,11 +255,11 @@ EmmcPeimHcInitHost ( **/
EFI_STATUS
EmmcPeimSwitch (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT8 Access,
- IN UINT8 Index,
- IN UINT8 Value,
- IN UINT8 CmdSet
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT8 Access,
+ IN UINT8 Index,
+ IN UINT8 Value,
+ IN UINT8 CmdSet
);
/**
@@ -277,8 +277,8 @@ EmmcPeimSwitch ( **/
EFI_STATUS
EmmcPeimSetBlkCount (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN UINT16 BlockCount
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN UINT16 BlockCount
);
/**
@@ -300,12 +300,12 @@ EmmcPeimSetBlkCount ( **/
EFI_STATUS
EmmcPeimRwMultiBlocks (
- IN EMMC_PEIM_HC_SLOT *Slot,
- IN EFI_LBA Lba,
- IN UINT32 BlockSize,
- IN VOID *Buffer,
- IN UINTN BufferSize,
- IN BOOLEAN IsRead
+ IN EMMC_PEIM_HC_SLOT *Slot,
+ IN EFI_LBA Lba,
+ IN UINT32 BlockSize,
+ IN VOID *Buffer,
+ IN UINTN BufferSize,
+ IN BOOLEAN IsRead
);
/**
@@ -321,7 +321,7 @@ EmmcPeimRwMultiBlocks ( **/
EFI_STATUS
EmmcPeimIdentification (
- IN EMMC_PEIM_HC_SLOT *Slot
+ IN EMMC_PEIM_HC_SLOT *Slot
);
/**
@@ -332,8 +332,7 @@ EmmcPeimIdentification ( **/
VOID
EmmcPeimFreeTrb (
- IN EMMC_TRB *Trb
+ IN EMMC_TRB *Trb
);
#endif
-
|