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-rw-r--r--MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c15
1 files changed, 2 insertions, 13 deletions
diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
index f8cbe1704b..2fb877127b 100644
--- a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
+++ b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
@@ -673,20 +673,9 @@ SmmIplDxeDispatchEventNotify (
}
//
- // Attempt to reset SMRAM cacheability to UC
- // Assume CPU AP is available at this time
- //
- Status = gDS->SetMemorySpaceAttributes(
- mSmramCacheBase,
- mSmramCacheSize,
- EFI_MEMORY_UC
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "SMM IPL failed to reset SMRAM window to EFI_MEMORY_UC\n"));
- }
-
- //
// Close all SMRAM ranges to protect SMRAM
+ // NOTE: SMRR is enabled by CPU SMM driver by calling SmmCpuFeaturesInitializeProcessor() from SmmCpuFeaturesLib
+ // so no need to reset the SMRAM to UC in MTRR.
//
Status = mSmmAccess->Close (mSmmAccess);
ASSERT_EFI_ERROR (Status);