1 files changed, 10 insertions, 12 deletions
diff --git a/MdeModulePkg/Include/Ppi/AtaController.h b/MdeModulePkg/Include/Ppi/AtaController.h
index 2c17f31c3b..0096f7bae0 100644
--- a/MdeModulePkg/Include/Ppi/AtaController.h
+++ b/MdeModulePkg/Include/Ppi/AtaController.h
@@ -30,7 +30,7 @@ typedef struct _PEI_ATA_CONTROLLER_PPI PEI_ATA_CONTROLLER_PPI;
 /// This is designed for old generation chipset with PATA/SATA controllers.
 /// It may be ignored in PPI implementation for new generation chipset without PATA controller.
 ///
-#define PEI_ICH_IDE_NONE        0x00
+#define PEI_ICH_IDE_NONE  0x00
 
 ///
 /// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
@@ -38,7 +38,7 @@ typedef struct _PEI_ATA_CONTROLLER_PPI PEI_ATA_CONTROLLER_PPI;
 /// This is designed for old generation chipset with PATA/SATA controllers.
 /// It may be ignored in PPI implementation for new generation chipset without PATA controller.
 ///
-#define PEI_ICH_IDE_PRIMARY     0x01
+#define PEI_ICH_IDE_PRIMARY  0x01
 
 ///
 /// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
@@ -46,7 +46,7 @@ typedef struct _PEI_ATA_CONTROLLER_PPI PEI_ATA_CONTROLLER_PPI;
 /// This is designed for old generation chipset with PATA/SATA controllers.
 /// It may be ignored in PPI implementation for new generation chipset without PATA controller.
 ///
-#define PEI_ICH_IDE_SECONDARY   0x02
+#define PEI_ICH_IDE_SECONDARY  0x02
 
 ///
 /// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
@@ -54,7 +54,7 @@ typedef struct _PEI_ATA_CONTROLLER_PPI PEI_ATA_CONTROLLER_PPI;
 /// This is designed for old generation chipset with PATA/SATA controllers.
 /// It may be ignored in PPI implementation for new generation chipset without PATA controller.
 ///
-#define PEI_ICH_SATA_NONE       0x04
+#define PEI_ICH_SATA_NONE  0x04
 
 ///
 /// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
@@ -62,7 +62,7 @@ typedef struct _PEI_ATA_CONTROLLER_PPI PEI_ATA_CONTROLLER_PPI;
 /// This is designed for old generation chipset with PATA/SATA controllers.
 /// It may be ignored in PPI implementation for new generation chipset without PATA controller.
 ///
-#define PEI_ICH_SATA_PRIMARY    0x08
+#define PEI_ICH_SATA_PRIMARY  0x08
 
 ///
 /// This bit is used in the ChannelMask parameter of EnableAtaChannel() to
@@ -79,11 +79,11 @@ typedef struct {
   ///
   /// Base I/O port address of the IDE controller's command block
   ///
-  UINT16  CommandBlockBaseAddr;
+  UINT16    CommandBlockBaseAddr;
   ///
   /// Base I/O port address of the IDE controller's control block
   ///
-  UINT16  ControlBlockBaseAddr;
+  UINT16    ControlBlockBaseAddr;
 } IDE_REGS_BASE_ADDR;
 
 /**
@@ -144,12 +144,10 @@ UINT32
 /// retrieves the base I/O port addresses to the enabled IDE and SATA channels.
 ///
 struct _PEI_ATA_CONTROLLER_PPI {
-  PEI_ENABLE_ATA          EnableAtaChannel;
-  GET_IDE_REGS_BASE_ADDR  GetIdeRegsBaseAddr;
+  PEI_ENABLE_ATA            EnableAtaChannel;
+  GET_IDE_REGS_BASE_ADDR    GetIdeRegsBaseAddr;
 };
 
-extern EFI_GUID gPeiAtaControllerPpiGuid;
+extern EFI_GUID  gPeiAtaControllerPpiGuid;
 
 #endif
-
-