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-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h1
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c1
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c28
3 files changed, 29 insertions, 1 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 4b58c3ea9b..ca5c06204d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -262,6 +262,7 @@ struct _PCI_IO_DEVICE {
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BusNumberRanges;
BOOLEAN IsPciExp;
+ BOOLEAN IsAriEnabled;
//
// For SR-IOV
//
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index bc20da1f38..8eca859695 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -2286,6 +2286,7 @@ CreatePciIoDevice (
&Data32
);
if ((Data32 & EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING) != 0) {
+ PciIoDevice->IsAriEnabled = TRUE;
//
// ARI forward support in bridge, so enable it.
//
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index d5e3ef4d3f..84fc0161a1 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -1106,6 +1106,7 @@ PciScanBus (
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
BOOLEAN BusPadding;
UINT32 TempReservedBusNum;
+ BOOLEAN IsAriEnabled;
PciRootBridgeIo = Bridge->PciRootBridgeIo;
SecondBus = 0;
@@ -1116,9 +1117,13 @@ PciScanBus (
BusPadding = FALSE;
PciDevice = NULL;
PciAddress = 0;
+ IsAriEnabled = FALSE;
for (Device = 0; Device <= PCI_MAX_DEVICE; Device++) {
- TempReservedBusNum = 0;
+ if (!IsAriEnabled) {
+ TempReservedBusNum = 0;
+ }
+
for (Func = 0; Func <= PCI_MAX_FUNC; Func++) {
//
// Check to see whether a pci device is present
@@ -1158,6 +1163,27 @@ PciScanBus (
continue;
}
+ //
+ // Per Pcie spec ARI Extended Capability
+ // This capability must be implemented by each function in an ARI device.
+ // It is not applicable to a Root Port, a Switch Downstream Port, an RCiEP, or a Root Complex Event Collector
+ //
+ if (((Device == 0) && (Func == 0)) && (PciDevice->IsAriEnabled)) {
+ IsAriEnabled = TRUE;
+ }
+
+ if (PciDevice->IsAriEnabled != IsAriEnabled) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "ERROR: %02x:%02x:%02x device ARI Feature(%x) is not consistent with others Function\n",
+ StartBusNumber,
+ Device,
+ Func,
+ PciDevice->IsAriEnabled
+ ));
+ return EFI_DEVICE_ERROR;
+ }
+
PciAddress = EFI_PCI_ADDRESS (StartBusNumber, Device, Func, 0);
if (!IS_PCI_BRIDGE (&Pci)) {