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-rw-r--r--MdePkg/Include/IndustryStandard/LowPowerIdleTable.h35
1 files changed, 20 insertions, 15 deletions
diff --git a/MdePkg/Include/IndustryStandard/LowPowerIdleTable.h b/MdePkg/Include/IndustryStandard/LowPowerIdleTable.h
index acfe8de97e..013b89dc24 100644
--- a/MdePkg/Include/IndustryStandard/LowPowerIdleTable.h
+++ b/MdePkg/Include/IndustryStandard/LowPowerIdleTable.h
@@ -12,6 +12,7 @@
- GAS - Generic Address Structure
- LPI - Low Power Idle
**/
+
#ifndef _LOW_POWER_IDLE_TABLE_H_
#define _LOW_POWER_IDLE_TABLE_H_
@@ -22,53 +23,57 @@
///
/// LPI Structure Types
///
-#define ACPI_LPI_STRUCTURE_TYPE_NATIVE_CSTATE 0x00
+#define ACPI_LPI_STRUCTURE_TYPE_NATIVE_CSTATE 0x00
///
/// Low Power Idle (LPI) State Flags
///
typedef union {
struct {
- UINT32 Disabled : 1; ///< If set, LPI state is not used
+ UINT32 Disabled : 1; ///< If set, LPI state is not used
+
/**
If set, Residency counter is not available for this LPI state and
Residency Counter Frequency is invalid
**/
- UINT32 CounterUnavailable : 1;
- UINT32 Reserved : 30; ///< Reserved for future use. Must be zero
+ UINT32 CounterUnavailable : 1;
+ UINT32 Reserved : 30; ///< Reserved for future use. Must be zero
} Bits;
- UINT32 Data32;
+ UINT32 Data32;
} ACPI_LPI_STATE_FLAGS;
///
/// Low Power Idle (LPI) structure with Native C-state instruction entry trigger descriptor
///
typedef struct {
- UINT32 Type; ///< LPI State descriptor Type 0
- UINT32 Length; ///< Length of LPI state Descriptor Structure
+ UINT32 Type; ///< LPI State descriptor Type 0
+ UINT32 Length; ///< Length of LPI state Descriptor Structure
///
/// Unique LPI state identifier: zero based, monotonically increasing identifier
///
- UINT16 UniqueId;
- UINT8 Reserved[2]; ///< Must be Zero
- ACPI_LPI_STATE_FLAGS Flags; ///< LPI state flags
+ UINT16 UniqueId;
+ UINT8 Reserved[2]; ///< Must be Zero
+ ACPI_LPI_STATE_FLAGS Flags; ///< LPI state flags
+
/**
The LPI entry trigger, matching an existing _CST.Register object, represented as a
Generic Address Structure. All processors must request this state or deeper to trigger.
**/
- EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE EntryTrigger;
- UINT32 Residency; ///< Minimum residency or break-even in uSec
- UINT32 Latency; ///< Worst case exit latency in uSec
+ EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE EntryTrigger;
+ UINT32 Residency; ///< Minimum residency or break-even in uSec
+ UINT32 Latency; ///< Worst case exit latency in uSec
+
/**
[optional] Residency counter, represented as a Generic Address Structure.
If not present, Flags[1] bit should be set.
**/
- EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ResidencyCounter;
+ EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ResidencyCounter;
+
/**
[optional] Residency counter frequency in cycles per second. Value 0 indicates that
counter runs at TSC frequency. Valid only if Residency Counter is present.
**/
- UINT64 ResidencyCounterFrequency;
+ UINT64 ResidencyCounterFrequency;
} ACPI_LPI_NATIVE_CSTATE_DESCRIPTOR;
#pragma pack()