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-rw-r--r--MdePkg/Include/IndustryStandard/PciExpress30.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/MdePkg/Include/IndustryStandard/PciExpress30.h b/MdePkg/Include/IndustryStandard/PciExpress30.h
index 6cf39bc24f..8b06496559 100644
--- a/MdePkg/Include/IndustryStandard/PciExpress30.h
+++ b/MdePkg/Include/IndustryStandard/PciExpress30.h
@@ -20,30 +20,30 @@
typedef union {
struct {
- UINT32 PerformEqualization : 1;
- UINT32 LinkEqualizationRequestInterruptEnable : 1;
- UINT32 Reserved : 30;
+ UINT32 PerformEqualization : 1;
+ UINT32 LinkEqualizationRequestInterruptEnable : 1;
+ UINT32 Reserved : 30;
} Bits;
- UINT32 Uint32;
+ UINT32 Uint32;
} PCI_EXPRESS_REG_LINK_CONTROL3;
typedef union {
struct {
- UINT16 DownstreamPortTransmitterPreset : 4;
- UINT16 DownstreamPortReceiverPresetHint : 3;
- UINT16 Reserved : 1;
- UINT16 UpstreamPortTransmitterPreset : 4;
- UINT16 UpstreamPortReceiverPresetHint : 3;
- UINT16 Reserved2 : 1;
+ UINT16 DownstreamPortTransmitterPreset : 4;
+ UINT16 DownstreamPortReceiverPresetHint : 3;
+ UINT16 Reserved : 1;
+ UINT16 UpstreamPortTransmitterPreset : 4;
+ UINT16 UpstreamPortReceiverPresetHint : 3;
+ UINT16 Reserved2 : 1;
} Bits;
- UINT16 Uint16;
+ UINT16 Uint16;
} PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL;
typedef struct {
- PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
- PCI_EXPRESS_REG_LINK_CONTROL3 LinkControl3;
- UINT32 LaneErrorStatus;
- PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL EqualizationControl[2];
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
+ PCI_EXPRESS_REG_LINK_CONTROL3 LinkControl3;
+ UINT32 LaneErrorStatus;
+ PCI_EXPRESS_REG_LANE_EQUALIZATION_CONTROL EqualizationControl[2];
} PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE;
#pragma pack()