diff options
Diffstat (limited to 'MdePkg/Include/Library/BaseLib.h')
| -rw-r--r-- | MdePkg/Include/Library/BaseLib.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index e4455e71d5..eb2899f852 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -6881,6 +6881,20 @@ typedef struct { #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
+///
+/// Type definition for representing labels in NASM source code that allow for
+/// the patching of immediate operands of IA32 and X64 instructions.
+///
+/// While the type is technically defined as a function type (note: not a
+/// pointer-to-function type), such labels in NASM source code never stand for
+/// actual functions, and identifiers declared with this function type should
+/// never be called. This is also why the EFIAPI calling convention specifier
+/// is missing from the typedef, and why the typedef does not follow the usual
+/// edk2 coding style for function (or pointer-to-function) typedefs. The VOID
+/// return type and the VOID argument list are merely artifacts.
+///
+typedef VOID (X86_ASSEMBLY_PATCH_LABEL) (VOID);
+
/**
Retrieves CPUID information.
@@ -9068,5 +9082,47 @@ AsmWriteTr ( IN UINT16 Selector
);
+/**
+ Patch the immediate operand of an IA32 or X64 instruction such that the byte,
+ word, dword or qword operand is encoded at the end of the instruction's
+ binary representation.
+
+ This function should be used to update object code that was compiled with
+ NASM from assembly source code. Example:
+
+ NASM source code:
+
+ mov eax, strict dword 0 ; the imm32 zero operand will be patched
+ ASM_PFX(gPatchCr3):
+ mov cr3, eax
+
+ C source code:
+
+ X86_ASSEMBLY_PATCH_LABEL gPatchCr3;
+ PatchInstructionX86 (gPatchCr3, AsmReadCr3 (), 4);
+
+ @param[out] InstructionEnd Pointer right past the instruction to patch. The
+ immediate operand to patch is expected to
+ comprise the trailing bytes of the instruction.
+ If InstructionEnd is closer to address 0 than
+ ValueSize permits, then ASSERT().
+
+ @param[in] PatchValue The constant to write to the immediate operand.
+ The caller is responsible for ensuring that
+ PatchValue can be represented in the byte, word,
+ dword or qword operand (as indicated through
+ ValueSize); otherwise ASSERT().
+
+ @param[in] ValueSize The size of the operand in bytes; must be 1, 2,
+ 4, or 8. ASSERT() otherwise.
+**/
+VOID
+EFIAPI
+PatchInstructionX86 (
+ OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd,
+ IN UINT64 PatchValue,
+ IN UINTN ValueSize
+ );
+
#endif // defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
#endif // !defined (__BASE_LIB__)
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