1 files changed, 5 insertions, 5 deletions
diff --git a/MdePkg/Include/Library/S3PciLib.h b/MdePkg/Include/Library/S3PciLib.h
index bae12aba1e..fb20d82219 100644
--- a/MdePkg/Include/Library/S3PciLib.h
+++ b/MdePkg/Include/Library/S3PciLib.h
@@ -1,9 +1,9 @@
 /** @file
   The PCI configuration Library Services that carry out PCI configuration and enable
   the PCI operations to be replayed during an S3 resume. This library class
-  maps directly on top of the PciLib class. 
+  maps directly on top of the PciLib class.
 
-  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions
@@ -36,8 +36,8 @@
   (((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
 
 /**
- 
-  Reads and returns the 8-bit PCI configuration register specified by Address, 
+
+  Reads and returns the 8-bit PCI configuration register specified by Address,
   and saves the value in the S3 script to be replayed on S3 resume.
   This function must guarantee that all PCI read and write operations are
   serialized.
@@ -813,7 +813,7 @@ S3PciAndThenOr32 (
   If StartBit is greater than 31, then ASSERT().
   If EndBit is greater than 31, then ASSERT().
   If EndBit is less than StartBit, then ASSERT().
- 
+
   @param[in] Address    The PCI configuration register to read.
   @param[in] StartBit   The ordinal of the least significant bit in the bit field.
                         Range 0..31.