diff options
Diffstat (limited to 'MdePkg/Library/BaseSynchronizationLib/Ia32')
| -rw-r--r-- | MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c | 24 | ||||
| -rw-r--r-- | MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c | 6 |
2 files changed, 15 insertions, 15 deletions
diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c index bd81aad6c2..4ab293f243 100644 --- a/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c +++ b/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c @@ -1,7 +1,7 @@ /** @file
GCC inline implementation of BaseSynchronizationLib processor specific functions.
-
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -42,12 +42,12 @@ InternalSyncIncrement ( "movl %2, %%eax "
: "=a" (Result), // %0
"=m" (*Value) // %1
- : "m" (*Value) // %2
+ : "m" (*Value) // %2
: "memory",
"cc"
);
-
- return Result;
+
+ return Result;
}
@@ -72,18 +72,18 @@ InternalSyncDecrement ( )
{
UINT32 Result;
-
+
__asm__ __volatile__ (
"lock \n\t"
"decl %2 \n\t"
"movl %2, %%eax "
: "=a" (Result), // %0
"=m" (*Value) // %1
- : "m" (*Value) // %2
+ : "m" (*Value) // %2
: "memory",
"cc"
);
-
+
return Result;
}
@@ -163,7 +163,7 @@ InternalSyncCompareExchange32 ( : "=a" (CompareValue) // %0
: "q" (ExchangeValue), // %1
"m" (*Value), // %2
- "0" (CompareValue) // %4
+ "0" (CompareValue) // %4
: "memory",
"cc"
);
@@ -198,8 +198,8 @@ InternalSyncCompareExchange64 ( {
__asm__ __volatile__ (
" \n\t"
- "push %%ebx \n\t"
- "movl %2,%%ebx \n\t"
+ "push %%ebx \n\t"
+ "movl %2,%%ebx \n\t"
"lock \n\t"
"cmpxchg8b (%1) \n\t"
"pop %%ebx \n\t"
@@ -210,6 +210,6 @@ InternalSyncCompareExchange64 ( : "memory",
"cc"
);
-
+
return CompareValue;
}
diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c index 60f5c7f36b..50ffe8e3aa 100644 --- a/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c +++ b/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c @@ -1,7 +1,7 @@ /** @file
Internal function to get spin lock alignment.
- Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -19,7 +19,7 @@ requirements for optimal spin lock performance.
@return The architecture specific spin lock alignment.
-
+
**/
UINTN
InternalGetSpinLockProperties (
@@ -48,7 +48,7 @@ InternalGetSpinLockProperties ( if (FamilyId == 0x0f) {
//
// In processors based on Intel NetBurst microarchitecture, use two cache lines
- //
+ //
ModelId = ModelId | ((RegEax >> 12) & 0xf0);
if (ModelId <= 0x04 || ModelId == 0x06) {
CacheLineSize *= 2;
|