diff options
Diffstat (limited to 'UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c')
| -rw-r--r-- | UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 106 |
1 files changed, 55 insertions, 51 deletions
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c index ade8207288..87f4f805ca 100644 --- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c +++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c @@ -18,7 +18,7 @@ EFI_HANDLE mHandle = NULL; //
// CPU I/O 2 Protocol instance
//
-EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
+EFI_CPU_IO2_PROTOCOL mCpuIo2 = {
{
CpuMemoryServiceRead,
CpuMemoryServiceWrite
@@ -32,7 +32,7 @@ EFI_CPU_IO2_PROTOCOL mCpuIo2 = { //
// Lookup table for increment values based on transfer widths
//
-UINT8 mInStride[] = {
+UINT8 mInStride[] = {
1, // EfiCpuIoWidthUint8
2, // EfiCpuIoWidthUint16
4, // EfiCpuIoWidthUint32
@@ -50,7 +50,7 @@ UINT8 mInStride[] = { //
// Lookup table for increment values based on transfer widths
//
-UINT8 mOutStride[] = {
+UINT8 mOutStride[] = {
1, // EfiCpuIoWidthUint8
2, // EfiCpuIoWidthUint16
4, // EfiCpuIoWidthUint32
@@ -120,14 +120,14 @@ CpuIoCheckParameter ( // For FIFO type, the target address won't increase during the access,
// so treat Count as 1
//
- if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
+ if ((Width >= EfiCpuIoWidthFifoUint8) && (Width <= EfiCpuIoWidthFifoUint64)) {
Count = 1;
}
//
// Check to see if Width is in the valid range for I/O Port operations
//
- Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ Width = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
return EFI_INVALID_PARAMETER;
}
@@ -164,6 +164,7 @@ CpuIoCheckParameter ( if (MaxCount < (Count - 1)) {
return EFI_UNSUPPORTED;
}
+
if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
return EFI_UNSUPPORTED;
}
@@ -243,9 +244,9 @@ CpuMemoryServiceRead ( //
// Select loop based on the width of the transfer
//
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ InStride = mInStride[Width];
+ OutStride = mOutStride[Width];
+ OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
*Uint8Buffer = MmioRead8 ((UINTN)Address);
@@ -257,6 +258,7 @@ CpuMemoryServiceRead ( *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
}
}
+
return EFI_SUCCESS;
}
@@ -323,9 +325,9 @@ CpuMemoryServiceWrite ( //
// Select loop based on the width of the transfer
//
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ InStride = mInStride[Width];
+ OutStride = mOutStride[Width];
+ OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
MmioWrite8 ((UINTN)Address, *Uint8Buffer);
@@ -337,6 +339,7 @@ CpuMemoryServiceWrite ( MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
}
}
+
return EFI_SUCCESS;
}
@@ -403,31 +406,31 @@ CpuIoServiceRead ( //
// Select loop based on the width of the transfer
//
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ InStride = mInStride[Width];
+ OutStride = mOutStride[Width];
+ OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
//
// Fifo operations supported for (mInStride[Width] == 0)
//
if (InStride == 0) {
switch (OperationWidth) {
- case EfiCpuIoWidthUint8:
- IoReadFifo8 ((UINTN)Address, Count, Buffer);
- return EFI_SUCCESS;
- case EfiCpuIoWidthUint16:
- IoReadFifo16 ((UINTN)Address, Count, Buffer);
- return EFI_SUCCESS;
- case EfiCpuIoWidthUint32:
- IoReadFifo32 ((UINTN)Address, Count, Buffer);
- return EFI_SUCCESS;
- default:
- //
- // The CpuIoCheckParameter call above will ensure that this
- // path is not taken.
- //
- ASSERT (FALSE);
- break;
+ case EfiCpuIoWidthUint8:
+ IoReadFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint16:
+ IoReadFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint32:
+ IoReadFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
}
}
@@ -510,31 +513,31 @@ CpuIoServiceWrite ( //
// Select loop based on the width of the transfer
//
- InStride = mInStride[Width];
- OutStride = mOutStride[Width];
- OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+ InStride = mInStride[Width];
+ OutStride = mOutStride[Width];
+ OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH)(Width & 0x03);
//
// Fifo operations supported for (mInStride[Width] == 0)
//
if (InStride == 0) {
switch (OperationWidth) {
- case EfiCpuIoWidthUint8:
- IoWriteFifo8 ((UINTN)Address, Count, Buffer);
- return EFI_SUCCESS;
- case EfiCpuIoWidthUint16:
- IoWriteFifo16 ((UINTN)Address, Count, Buffer);
- return EFI_SUCCESS;
- case EfiCpuIoWidthUint32:
- IoWriteFifo32 ((UINTN)Address, Count, Buffer);
- return EFI_SUCCESS;
- default:
- //
- // The CpuIoCheckParameter call above will ensure that this
- // path is not taken.
- //
- ASSERT (FALSE);
- break;
+ case EfiCpuIoWidthUint8:
+ IoWriteFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint16:
+ IoWriteFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint32:
+ IoWriteFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
}
}
@@ -568,12 +571,13 @@ CpuIo2Initialize ( IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid);
Status = gBS->InstallMultipleProtocolInterfaces (
&mHandle,
- &gEfiCpuIo2ProtocolGuid, &mCpuIo2,
+ &gEfiCpuIo2ProtocolGuid,
+ &mCpuIo2,
NULL
);
ASSERT_EFI_ERROR (Status);
|