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-rw-r--r--UefiPayloadPkg/Library/SpiFlashLib/SpiCommon.h53
1 files changed, 24 insertions, 29 deletions
diff --git a/UefiPayloadPkg/Library/SpiFlashLib/SpiCommon.h b/UefiPayloadPkg/Library/SpiFlashLib/SpiCommon.h
index e4f4ad92e1..95e9b9b1e7 100644
--- a/UefiPayloadPkg/Library/SpiFlashLib/SpiCommon.h
+++ b/UefiPayloadPkg/Library/SpiFlashLib/SpiCommon.h
@@ -28,8 +28,8 @@
/// Wait Time = 6 seconds = 6000000 microseconds
/// Wait Period = 10 microseconds
///
-#define WAIT_TIME 6000000 ///< Wait Time = 6 seconds = 6000000 microseconds
-#define WAIT_PERIOD 10 ///< Wait Period = 10 microseconds
+#define WAIT_TIME 6000000 ///< Wait Time = 6 seconds = 6000000 microseconds
+#define WAIT_PERIOD 10 ///< Wait Period = 10 microseconds
///
/// Flash cycle Type
@@ -60,20 +60,19 @@ typedef enum {
#define SC_SPI_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('P', 'S', 'P', 'I')
typedef struct {
- UINTN Signature;
- EFI_HANDLE Handle;
- UINT32 AcpiTmrReg;
- UINTN PchSpiBase;
- UINT16 RegionPermission;
- UINT32 SfdpVscc0Value;
- UINT32 SfdpVscc1Value;
- UINT32 StrapBaseAddress;
- UINT8 NumberOfComponents;
- UINT16 Flags;
- UINT32 Component1StartAddr;
+ UINTN Signature;
+ EFI_HANDLE Handle;
+ UINT32 AcpiTmrReg;
+ UINTN PchSpiBase;
+ UINT16 RegionPermission;
+ UINT32 SfdpVscc0Value;
+ UINT32 SfdpVscc1Value;
+ UINT32 StrapBaseAddress;
+ UINT8 NumberOfComponents;
+ UINT16 Flags;
+ UINT32 Component1StartAddr;
} SPI_INSTANCE;
-
/**
Acquire SPI MMIO BAR
@@ -84,10 +83,9 @@ typedef struct {
**/
UINT32
AcquireSpiBar0 (
- IN UINTN PchSpiBase
+ IN UINTN PchSpiBase
);
-
/**
Release SPI MMIO BAR. Do nothing.
@@ -98,10 +96,9 @@ AcquireSpiBar0 (
**/
VOID
ReleaseSpiBar0 (
- IN UINTN PchSpiBase
+ IN UINTN PchSpiBase
);
-
/**
This function is a hook for Spi to disable BIOS Write Protect
@@ -115,8 +112,8 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
DisableBiosWriteProtect (
- IN UINTN PchSpiBase,
- IN UINT8 CpuSmmBwp
+ IN UINTN PchSpiBase,
+ IN UINT8 CpuSmmBwp
);
/**
@@ -131,11 +128,10 @@ DisableBiosWriteProtect (
VOID
EFIAPI
EnableBiosWriteProtect (
- IN UINTN PchSpiBase,
- IN UINT8 CpuSmmBwp
+ IN UINTN PchSpiBase,
+ IN UINT8 CpuSmmBwp
);
-
/**
This function disables SPI Prefetching and caching,
and returns previous BIOS Control Register value before disabling.
@@ -147,7 +143,7 @@ EnableBiosWriteProtect (
**/
UINT8
SaveAndDisableSpiPrefetchCache (
- IN UINTN PchSpiBase
+ IN UINTN PchSpiBase
);
/**
@@ -161,11 +157,10 @@ SaveAndDisableSpiPrefetchCache (
**/
VOID
SetSpiBiosControlRegister (
- IN UINTN PchSpiBase,
- IN UINT8 BiosCtlValue
+ IN UINTN PchSpiBase,
+ IN UINT8 BiosCtlValue
);
-
/**
This function sends the programmed SPI command to the slave device.
@@ -201,8 +196,8 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN UINT32 PchSpiBar0,
- IN BOOLEAN ErrorCheck
+ IN UINT32 PchSpiBar0,
+ IN BOOLEAN ErrorCheck
);
#endif