1 files changed, 131 insertions, 0 deletions
diff --git a/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c b/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c
new file mode 100644
index 0000000000..c92308f4e9
--- /dev/null
+++ b/Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLibrary.c
@@ -0,0 +1,131 @@
+/**
+
+Copyright (c) 2012  - 2014, Intel Corporation. All rights reserved
+                                                                                   
+  This program and the accompanying materials are licensed and made available under
+  the terms and conditions of the BSD License that accompanies this distribution.  
+  The full text of the license may be found at                                     
+  http://opensource.org/licenses/bsd-license.php.                                  
+                                                                                   
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,            
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.    
+                                                                                   
+
+  @file
+  PchPlatformLib.c
+
+  @brief
+  PCH Platform Lib implementation.
+
+**/
+
+#include "PchPlatformLibrary.h"
+
+//
+// Silicon Steppings
+//
+/**
+  Return Pch stepping type
+
+  @param[in] None
+
+  @retval PCH_STEPPING            Pch stepping type
+
+**/
+PCH_STEPPING
+EFIAPI
+PchStepping (
+  VOID
+  )
+{
+  UINT8 RevId;
+
+  RevId = MmioRead8 (
+          MmPciAddress (0,
+            DEFAULT_PCI_BUS_NUMBER_PCH,
+            PCI_DEVICE_NUMBER_PCH_LPC,
+            PCI_FUNCTION_NUMBER_PCH_LPC,
+            R_PCH_LPC_RID_CC)
+          );
+
+  switch (RevId) {
+    case V_PCH_LPC_RID_0:
+    case V_PCH_LPC_RID_1:
+      return PchA0;
+      break;
+
+    case V_PCH_LPC_RID_2:
+    case V_PCH_LPC_RID_3:
+      return PchA1;
+      break;
+
+    case V_PCH_LPC_RID_4:
+    case V_PCH_LPC_RID_5:
+      return PchB0;
+      break;
+
+    case V_PCH_LPC_RID_6:
+    case V_PCH_LPC_RID_7:
+      return PchB1;
+      break;
+
+    case V_PCH_LPC_RID_8:
+    case V_PCH_LPC_RID_9:
+      return PchB2;
+      break;
+
+    case V_PCH_LPC_RID_A:
+    case V_PCH_LPC_RID_B:
+      return PchB3;
+      break;
+
+    case V_PCH_LPC_RID_C:
+    case V_PCH_LPC_RID_D:
+      return PchC0;
+      break;
+
+    default:
+      return PchSteppingMax;
+      break;
+
+  }
+}
+
+/**
+  Determine if PCH is supported
+
+  @param[in] None
+
+  @retval TRUE                    PCH is supported
+  @retval FALSE                   PCH is not supported
+
+**/
+BOOLEAN
+IsPchSupported (
+  VOID
+  )
+{
+  UINT32  Identifiers;
+  UINT16  PcuVendorId;
+  UINT16  PcuDeviceId;
+
+  Identifiers = MmioRead32 (
+                  MmPciAddress (0,
+                  DEFAULT_PCI_BUS_NUMBER_PCH,
+                  PCI_DEVICE_NUMBER_PCH_LPC,
+                  PCI_FUNCTION_NUMBER_PCH_LPC,
+                  R_PCH_LPC_REG_ID)
+                );
+
+  PcuDeviceId = (UINT16) ((Identifiers & B_PCH_LPC_DEVICE_ID) >> 16);
+  PcuVendorId = (UINT16) (Identifiers & B_PCH_LPC_VENDOR_ID);
+
+  //
+  // Verify that this is a supported chipset
+  //
+  if (PcuVendorId != (UINT16) V_PCH_LPC_VENDOR_ID || !IS_PCH_VLV_LPC_DEVICE_ID (PcuDeviceId)) {
+    DEBUG ((EFI_D_ERROR, "VLV SC code doesn't support the PcuDeviceId: 0x%04x!\n", PcuDeviceId));
+    return FALSE;
+  }
+  return TRUE;
+}