diff options
Diffstat (limited to 'Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf')
-rw-r--r-- | Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf | 270 |
1 files changed, 135 insertions, 135 deletions
diff --git a/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf b/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf index 2ecb347d18..416be16399 100644 --- a/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf +++ b/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf @@ -1,135 +1,135 @@ -#
-#
-# Copyright (c) 1999 - 2018, Intel Corporation. All rights reserved
-#
-# This program and the accompanying materials are licensed and made available under
-# the terms and conditions of the BSD License that accompanies this distribution.
-# The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#
-# This PEIM includes 3 parts, pre memory initialization, MRC
-# wrapper and post memory initialization.
-# On pre memory, following action is performed,
-# 1. Initizluize GMCH.
-# 2. Detect boot mode.
-# 3. Detect video adapter to determine whether we need pre allocated
-# memory.
-#
-# After that MRC wrapper calls MRC to initialize memory and install a PPI
-# notify to do post memory
-# initialization. MRC wrapper performance following actions,
-# 1. Install EFI Memory.
-# 2. Capsule coalesce if capsule boot mode.
-# 3. Create HOB of system memory.
-# Note: MRC supports 3 kinds of chipsets including Lakeport, Glenwood and Mukilteo,
-# so please don't define MACRO MUKILTEO_SUPPORT on Lakeport here.
-#
-# On post memory, following action is performed,
-# 1. TC initialization after MRC.
-# 2. SIO initialization.
-# 3. Install ResetSystem and FinvFv PPI, relocate Stall to memory on
-# recovery boot mode.
-# 4. Set MTRR for PEI
-# 5. Create FV HOB and Flash HOB
-# 6. Install RecoveryModule and AtaController PPI if on recovery boot mode.
-#
-# This PEIM does not have any register access directly, it depends on
-# IntelTCLib, TCAccess libraries to access Chipset
-# registers.
-#
-# Platform.c - Provide main flow and entrypoint of PEIM.
-# MemoryCallback.c - Includes a memory call back function notified when
-# MRC is done.
-#
-#
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = PlatformPeim
- FILE_GUID = 9618C0DC-50A4-496c-994F-7241F282ED01
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
- ENTRY_POINT = PeiInitPlatform
- PI_SPECIFICATION_VERSION = 0x0001000A
-
-[sources.common]
- Platform.c
- Platform.h
- MemoryCallback.c
- CommonHeader.h
- Stall.c
- BootMode.c
-
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- Vlv2TbltDevicePkg/PlatformPkg.dec
- IntelFrameworkPkg/IntelFrameworkPkg.dec
- Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
- IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec
- UefiCpuPkg/UefiCpuPkg.dec
- CryptoPkg/CryptoPkg.dec
-
-[LibraryClasses]
- PeimEntryPoint
- DebugLib
- HobLib
- IoLib
- MultiPlatformLib
- MtrrLib
- PerformanceLib
- MonoStatusCodeLib
- BaseCryptLib
- PciLib
-
-[Ppis]
- gEfiPeiStallPpiGuid
- gPeiSpeakerInterfacePpiGuid
- gEfiPeiMemoryDiscoveredPpiGuid
- gVlvPolicyPpiGuid
- gEfiPeiReadOnlyVariable2PpiGuid
- gEfiPeiResetPpiGuid
- gEfiEndOfPeiSignalPpiGuid
- gEfiFindFvPpiGuid
- gPeiCapsulePpiGuid
- gEfiPeiBootInRecoveryModePpiGuid
- gEfiPeiRecoveryModulePpiGuid
- gEfiPeiDeviceRecoveryModulePpiGuid
- gPeiCachePpiGuid
- gEfiPeiMasterBootModePpiGuid
- gEfiPeiSmbusPpiGuid
- gPeiMfgMemoryTestPpiGuid
- gPeiSha256HashPpiGuid
- gVlvMmioPolicyPpiGuid
- gSeCfTPMPolicyPpiGuid
-
-[Guids]
- gEfiSetupVariableGuid
- gEfiPlatformInfoGuid
- gEfiPlatformBootModeGuid
- gEfiPlatformCpuInfoGuid
- gEfiGlobalVariableGuid
- gRecoveryOnFatFloppyDiskGuid
- gRecoveryOnFatUsbDiskGuid
- gRecoveryOnFatIdeDiskGuid
- gRecoveryOnDataCdGuid
- gMfgModeVariableGuid
- gEfiNormalSetupGuid
- gEfiVlv2VariableGuid
-
-[Pcd.common]
- gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase
- gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
- gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base
- gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
- gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress
- gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize
-[Depex]
- TRUE
-
+# +# +# Copyright (c) 1999 - 2018, Intel Corporation. All rights reserved +#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License that accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# +# This PEIM includes 3 parts, pre memory initialization, MRC +# wrapper and post memory initialization. +# On pre memory, following action is performed, +# 1. Initizluize GMCH. +# 2. Detect boot mode. +# 3. Detect video adapter to determine whether we need pre allocated +# memory. +# +# After that MRC wrapper calls MRC to initialize memory and install a PPI +# notify to do post memory +# initialization. MRC wrapper performance following actions, +# 1. Install EFI Memory. +# 2. Capsule coalesce if capsule boot mode. +# 3. Create HOB of system memory. +# Note: MRC supports 3 kinds of chipsets including Lakeport, Glenwood and Mukilteo, +# so please don't define MACRO MUKILTEO_SUPPORT on Lakeport here. +# +# On post memory, following action is performed, +# 1. TC initialization after MRC. +# 2. SIO initialization. +# 3. Install ResetSystem and FinvFv PPI, relocate Stall to memory on +# recovery boot mode. +# 4. Set MTRR for PEI +# 5. Create FV HOB and Flash HOB +# 6. Install RecoveryModule and AtaController PPI if on recovery boot mode. +# +# This PEIM does not have any register access directly, it depends on +# IntelTCLib, TCAccess libraries to access Chipset +# registers. +# +# Platform.c - Provide main flow and entrypoint of PEIM. +# MemoryCallback.c - Includes a memory call back function notified when +# MRC is done. +# +# + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = PlatformPeim + FILE_GUID = 9618C0DC-50A4-496c-994F-7241F282ED01 + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + ENTRY_POINT = PeiInitPlatform + PI_SPECIFICATION_VERSION = 0x0001000A + +[sources.common] + Platform.c + Platform.h + MemoryCallback.c + CommonHeader.h + Stall.c + BootMode.c + + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Vlv2TbltDevicePkg/PlatformPkg.dec + IntelFrameworkPkg/IntelFrameworkPkg.dec + Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec + Vlv2SocBinPkg/Vlv2SocBinPkg.dec + UefiCpuPkg/UefiCpuPkg.dec + CryptoPkg/CryptoPkg.dec + +[LibraryClasses] + PeimEntryPoint + DebugLib + HobLib + IoLib + MultiPlatformLib + MtrrLib + PerformanceLib + MonoStatusCodeLib + BaseCryptLib + PciLib + +[Ppis] + gEfiPeiStallPpiGuid + gPeiSpeakerInterfacePpiGuid + gEfiPeiMemoryDiscoveredPpiGuid + gVlvPolicyPpiGuid + gEfiPeiReadOnlyVariable2PpiGuid + gEfiPeiResetPpiGuid + gEfiEndOfPeiSignalPpiGuid + gEfiFindFvPpiGuid + gPeiCapsulePpiGuid + gEfiPeiBootInRecoveryModePpiGuid + gEfiPeiRecoveryModulePpiGuid + gEfiPeiDeviceRecoveryModulePpiGuid + gPeiCachePpiGuid + gEfiPeiMasterBootModePpiGuid + gEfiPeiSmbusPpiGuid + gPeiMfgMemoryTestPpiGuid + gPeiSha256HashPpiGuid + gVlvMmioPolicyPpiGuid + gSeCfTPMPolicyPpiGuid + +[Guids] + gEfiSetupVariableGuid + gEfiPlatformInfoGuid + gEfiPlatformBootModeGuid + gEfiPlatformCpuInfoGuid + gEfiGlobalVariableGuid + gRecoveryOnFatFloppyDiskGuid + gRecoveryOnFatUsbDiskGuid + gRecoveryOnFatIdeDiskGuid + gRecoveryOnDataCdGuid + gMfgModeVariableGuid + gEfiNormalSetupGuid + gEfiVlv2VariableGuid + +[Pcd.common] + gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase + gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize + gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base + gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress + gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress + gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize +[Depex] + TRUE + |