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* CryptoPkg: Clean up source filesLiming Gao2018-06-2851-151/+151
| | | | | | | | | 1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Move variable out of GlobalJaben Carsey2018-06-282-14/+14
| | | | | | | | | | Move single use list from GlobalData (gTempInfs) into the file that uses it as _TempInfs Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* SecurityPkg Tpm2DeviceLibDTpm: Update enum type name to match the one in libLiming Gao2018-06-272-2/+2
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* BaseTools: AutoGen - Remove unused variables.Jaben Carsey2018-06-271-10/+0
| | | | | | | | | | | There are 2 variables that we populate, but never use. remove them entirely. Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Replace StringIO.StringIO with io.BytesIOGary Lin2018-06-2723-67/+59
| | | | | | | | | | | | Replace StringIO.StringIO with io.BytesIO to be compatible with python3. This commit also removes "import StringIO" from those python scripts that don't really use it. Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Fix old python2 idiomsGary Lin2018-06-2731-111/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on "futurize -f lib2to3.fixes.fix_idioms" * Change some type comparisons to isinstance() calls: type(x) == T -> isinstance(x, T) type(x) is T -> isinstance(x, T) type(x) != T -> not isinstance(x, T) type(x) is not T -> not isinstance(x, T) * Change "while 1:" into "while True:". * Change both v = list(EXPR) v.sort() foo(v) and the more general v = EXPR v.sort() foo(v) into v = sorted(EXPR) foo(v) Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Migrate to the new octal literalGary Lin2018-06-272-2/+2
| | | | | | | | | | | Change the octal literals according to PEP3127 https://www.python.org/dev/peps/pep-3127/ Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Adjust the spaces around commas and colonsGary Lin2018-06-2757-543/+543
| | | | | | | | | | Based on "futurize -f lib2to3.fixes.fix_ws_comma" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Refactor python raise statementGary Lin2018-06-271-2/+2
| | | | | | | | | | Make "raise" to be compatible with python3. Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Remove types.TypeTypeGary Lin2018-06-271-2/+1
| | | | | | | | | | | "types.TypeType" is now an alias of the built-in "type" and is not compatible with python 3. Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Replace StandardError with ExpressionGary Lin2018-06-271-1/+1
| | | | | | | | | | | StandardError has been removed from python 3. Replace it with Exception. Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Remove the deprecated hash_key()Gary Lin2018-06-2718-40/+39
| | | | | | | | | | | Replace "has_key()" with "in" to be compatible with python3. Based on "futurize -f lib2to3.fixes.fix_has_key" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Remove tuple parameter in python scriptsGary Lin2018-06-271-1/+2
| | | | | | | | | | | According to PEP3113, tuple parameter is removed in python 3. (PEP3113: https://www.python.org/dev/peps/pep-3113/) Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Remove the old python "not-equal"Gary Lin2018-06-279-26/+26
| | | | | | | | | | Replace "<>" with "!=" to be compatible with python3. Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Refactor python print statementsGary Lin2018-06-2746-308/+354
| | | | | | | | | | | Refactor print statements to be compatible with python 3. Based on "futurize -f libfuturize.fixes.fix_print_with_import" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Refactor python except statementsGary Lin2018-06-2746-250/+254
| | | | | | | | | | | Convert "except ... ," to "except ... as" to be compatible with python3. Based on "futurize -f lib2to3.fixes.fix_except" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Fix a typo in ini.pyGary Lin2018-06-271-1/+1
| | | | | | | | | | | "if mis not None:" => "if m is not None:" Contributed-under: TianoCore Contribution Agreement 1.1 Cc: Jaben Carsey <jaben.carsey@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* MdeModulePkg UsbBusPei: Fix wrong buffer length used to read hub descStar Zeng2018-06-272-74/+38
| | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=973 Bug 973 just mentions UsbBusDxe, but UsbBusPei has similar issue. HUB descriptor has variable length. But the code uses stack (HubDescriptor in PeiDoHubConfig) with fixed length sizeof(EFI_USB_HUB_DESCRIPTOR) to hold HUB descriptor data. It uses hard code length value (12) for SuperSpeed path. And it uses HubDesc->Length for none SuperSpeed path, then there will be stack overflow when HubDesc->Length is greater than sizeof(EFI_USB_HUB_DESCRIPTOR). The patch updates the code to use a big enough buffer to hold the descriptor data. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Bret Barkelew <bret.barkelew@microsoft.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* MdeModulePkg UsbBusDxe: Fix wrong buffer length used to read hub descStar Zeng2018-06-272-78/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=973 HUB descriptor has variable length. But the code uses stack (HubDesc in UsbHubInit) with fixed length sizeof(EFI_USB_HUB_DESCRIPTOR) to hold HUB descriptor data. It uses hard code length value (32 that is greater than sizeof(EFI_USB_HUB_DESCRIPTOR)) for SuperSpeed path, then there will be stack overflow when IOMMU is enabled because the Unmap operation will copy the data from device buffer to host buffer. And it uses HubDesc->Length for none SuperSpeed path, then there will be stack overflow when HubDesc->Length is greater than sizeof(EFI_USB_HUB_DESCRIPTOR). The patch updates the code to use a big enough buffer to hold the descriptor data. The definition EFI_USB_SUPER_SPEED_HUB_DESCRIPTOR is wrong (HubDelay field should be UINT16 type) and no code is using it, the patch removes it. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Bret Barkelew <bret.barkelew@microsoft.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
* SecurityPkg: Tpm2DeviceLib: Enable CapCRBIdleBypass supportZhang, Chao B2018-06-277-14/+146
| | | | | | | | | | | Directly transition from CMD completion to CMD Ready state if device supports IdleByPass Cc: Long Qin <qin.long@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
* MdePkg: TpmPtp: Add CapCRBIdleBypass definitionZhang, Chao B2018-06-271-2/+3
| | | | | | | | | | | Add CapCRBIdleBypass definition to interface ID register. It complies with existing register Cc: Long Qin <qin.long@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
* Nt32Pkg/WinNtBusDriverDxe: Fix memory allocation sizeThomas Palmer2018-06-271-1/+2
| | | | | | | | | A single byte was allocate for a CHAR16 NUL terminator when instead two bytes should have been used. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Thomas Palmer <thomas.palmer@hpe.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* UefiCpuPkg: Use new added Perf macrosBi, Dandan2018-06-261-8/+8
| | | | | | | | | | Replace old Perf macros with the new added ones. Cc: Liming Gao <liming.gao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* SecurityPkg: Use new added Perf macrosBi, Dandan2018-06-262-16/+16
| | | | | | | | | | Replace old Perf macros with the new added ones. Cc: Liming Gao <liming.gao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg: Use new added Perf macrosBi, Dandan2018-06-2611-76/+53
| | | | | | | | | | | Replace old Perf macros with the new added ones. Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ShellPkg/dp: Update dp tool to parse new Perf recordBi, Dandan2018-06-265-12/+113
| | | | | | | | | | | | | | | Since performance library instances have been updated to create new FPDT records for new Perf macros. So enhance dp tool to parse the new FPDT records. Enhancement mainly includes: 1. parse the single records for PERF_EVENT macro 2. Parse the new added FPDT_DUAL_GUID_STRING_EVENT_RECORD Cc: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg: Update performance library instancesBi, Dandan2018-06-268-720/+1565
| | | | | | | | | | | | | | | Update the performance library instances in MdeModulePkg to implement the APIs used for new added Perf macros. V2: Share the common logics of creating FPDT record for new added Perf macros and existing Perf macros. Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg/ExtendedFirmwarePerf: Remove PerfId definitionsBi, Dandan2018-06-261-25/+0
| | | | | | | | | | | Remove the definitions of performance identifier since they have been added into PerformanceLib.h. Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/PerformanceLib.h: Add new Perf macrosBi, Dandan2018-06-264-3/+477
| | | | | | | | | | | | | | 1. Add new Perf macros for performance measurement and related APIs and definitions in Performance library class. 2. Update NULL performance library instance in MdePkg. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg: Update Performance instances to use new protocolBi, Dandan2018-06-2610-1078/+283
| | | | | | | | | | | Update Performance instances in MdeModulePkg to use new PerformanceMeasurement protocol. Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg: Add PERFORMANCE_MEASUREMENT_PROTOCOLBi, Dandan2018-06-262-0/+94
| | | | | | | | | | Add PerformanceMeasurement protocol to log performance info. Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg/CapsuleRuntimeDxe: Fix ECC issueDandan Bi2018-06-262-1/+6
| | | | | | | | | Add guard macro for new added header file. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg BootMaintenanceManagerUiLib: Move refresh boot option laterLiming Gao2018-06-251-2/+1
| | | | | | | | | | Constructor is too early that ConnectAll() may not do. Move refresh boot option in form open. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Xu WeiX <weix.xu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* MdeModulePkg BdsDxe: Correct VariableLockProtocol usage to match code logicLiming Gao2018-06-251-1/+1
| | | | | | | | | | | BdsEntry marks the read-only variables if the Variable Lock protocol exists. So, this protocol usage is updated from CONSUMES to SOMETIMES_CONSUMES. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* BaseTools tools_def.template: Ignore link warning 4281 for VS2017Liming Gao2018-06-251-3/+3
| | | | | | | | | | | | VS2017 reports warning LNK4281: undesirable base address 0x0 for x64 image; set base address above 4GB for best ASLR optimization. edk2 build always sets baes address to zero as default. So, ignore this link warning. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Pete Batard <pete@akeo.ie>
* SecurityPkg: Cache TPM interface type infoZhang, Chao B2018-06-2513-145/+148
| | | | | | | | | | Cache TPM interface type info to avoid excessive interface ID register read Cc: Long Qin <qin.long@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
* FatPkg/FatPei: Add the recognition of recovery capsule on NVME deviceHao Wu2018-06-252-2/+7
| | | | | | | | | | The driver now can recognize the BlockIo2 PPI for NVM Express devices. And support identifying the recovery capsule on those devices. Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg: Add GUID for recovery capsule on NVM Express devicesHao Wu2018-06-252-0/+12
| | | | | | | | | Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg/NvmExpressPei: Add the NVME device PEI BlockIo supportHao Wu2018-06-2513-0/+3424
| | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=256 This commit adds the PEI BlockIo support for NVM Express devices. The driver will consume the EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI for NVM Express host controllers within the system. And then produces the BlockIo(2) PPIs for each controller. The implementation of this driver is currently based on the NVM Express 1.1 Specification, which is available at: http://nvmexpress.org/resources/specifications/ Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* MdeModulePkg: Add definitions for EDKII PEI NVME host controller PPIHao Wu2018-06-252-0/+95
| | | | | | | | | | | | | | | | | | | | | | Introduces the below PPI: struct EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI { EDKII_NVM_EXPRESS_HC_GET_MMIO_BAR GetNvmeHcMmioBar; EDKII_NVM_EXPRESS_HC_GET_DEVICE_PATH GetNvmeHcDevicePath; }; The GetNvmeHcMmioBar service will provide the caller with the MMIO BAR address of each NVMe HC within the system; The GetNvmeHcDevicePath service will provide the caller with the device path information of each NVMe HC. Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* IntelFsp2Pkg: SplitFspBin.py to support x64 driversChasel, Chiu2018-06-251-12/+70
| | | | | | | | | | | FSP binary potentially can include X64 drivers to simplify implementation or support new features so update SplitFspBin.py to support x64 image headers. Cc: Jiewen Yao <Jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
* Vlv2TbltDevicePkg: Set SMM Stack size to 16 KBMichael D Kinney2018-06-243-0/+15
| | | | | | | | | | | | Stack overflows were observed at the default SMM stack size of 8 KB. Increase stack size to 16 KB to prevent SMM stack overflows. Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: David Wei <david.wei@intel.com>
* ArmPkg/ArmScmiDxe: Dynamically allocate buffer for protocol idsGirish Pathak2018-06-223-12/+21
| | | | | | | | | | | | Dynamically allocate the buffer to receive the SCMI protocol list. This makes MAX_PROTOCOLS redundant, so it is removed. It also fixes one minor code alignment issue and removes an unused macro PROTOCOL_MASK. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Tested-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmScmiDxe: Fix ASSERT error in SCMI DXEGirish Pathak2018-06-222-21/+23
| | | | | | | | | | | | | | | | | | | | | This change fixes a bug in the SCMI DXE which is observed with the upcoming release of the SCP firmware. The PROTOCOL_ID_MASK (0xF) which is used to generate an index in the ProtocolInitFxns is wrong because protocol ids can be anywhere in 0x10 - 15 or 0x80 - FF range. This mask generates the same index for two different protocols e.g. for protocol ids 0x10 and 0x90, which causes duplicate initialization of a protocol resulting in a failure. This change removes the use of PROTOCOL_ID_MASK and instead uses a list of protocol ids and their initialization functions to identify a supported protocol and initialize it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Girish Pathak <girish.pathak@arm.com> Tested-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* BaseTools: introduce !error statementYunhua Feng2018-06-224-2/+24
| | | | | | | | | | | | | | The DSC and FDF file can use `!error` statement. The argument of this statement is an error message, it causes build tool to stop at the location where the statement is encountered and error message following the `!error` statement is output as a message. Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=701 Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Enhance BaseTools supports FeaturePcd usage in VFR fileYonghong Zhu2018-06-221-2/+3
| | | | | | | | | | Bugzilla 348 only fixed FixedAtBuild Pcd type, now this patch also add support for FeaturePcd type. Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=348 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: remove the unneeded codeYonghong Zhu2018-06-221-17/+0
| | | | | | | | Do a clean up to remove the unneeded code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ArmPkg/ArmMmuLib ARM: fix Mva to use idx instead of table baseChris Co2018-06-211-1/+1
| | | | | | | | | | | | | Mva address calculation should use the left-shifted current section index instead of the left-shifted table base address. Using the table base address here has the side-effect of potentially causing an access violation depending on the base address value. Cc: Leif Lindholm <leif.lindholm@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Christopher Co <christopher.co@microsoft.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmMmuLib ARM: assume page tables are in writeback cacheable memoryArd Biesheuvel2018-06-212-13/+3
| | | | | | | | | | | | Given that these days, our ARM port only supports ARMv7 and later, we can assume that the page table walker's memory accesses are cache coherent, and so there is no need to perform cache maintenance. It does require the page tables themselves to reside in memory mapped as writeback cacheable so ASSERT() that this is the case. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmMmuLib ARM: remove cache maintenance of block mapping contentsArd Biesheuvel2018-06-211-12/+0
| | | | | | | | | | | | | | | | | | | Peculiarly enough, the current page table manipulation code takes it upon itself to write back and invalidate the memory contents covered by page and section mappings when their memory attributes change. It is not generally the case that data must be written back when such a change occurs, even when switching from cacheable to non-cacheable attributes, and in some cases, it is actually causing problems. (The cache maintenance is also performed on the PCIe MMIO regions as they get mapped by the PCI bus driver, and under virtualization, each cache maintenance operation on an emulated MMIO region triggers a round trip to the host and back) So let's just drop this code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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