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* OvmfPkg/PlatformPei: add missing auto variable initializationArd Biesheuvel2016-07-131-0/+1
| | | | | | | | | | | The E820EntriesCount variable in XenPublishRamRegions() may be referenced without being initialized on RELEASE builds, since the ASSERT that fires if the call to XenGetE820Map() fails is compiled out in that case. So initialize it to 0. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmPkg/ArmGicLib: manage GICv3 SPI state at the distributorArd Biesheuvel2016-07-131-3/+22
| | | | | | | | | | | | Unlike SGIs and PPIs, which are private to the CPU and are managed at the redistributor level (which is also a per-CPU construct), shared interrupts (SPIs) are shared between all CPUs, and therefore managed at the distributor level (just as on GICv2). Reported-by: Narinder Dhillon <ndhillonv2@gmail.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmMmuLib: avoid type promotion in TCR_EL1 assignmentArd Biesheuvel2016-07-131-78/+62
| | | | | | | | | | | | | | | | | | | | | | Commit fafb7e9c110e ("ArmPkg: correct TTBR1_EL1 settings in TCR_EL1") introduced a symbolic constant TCR_TG1_4KB which resolves to (2 << 30), and ORs it into the value to be written into TCR_EL1 (if executing at EL1). Since the constant is implicitly typed as signed int, and has the sign bit set, the promotion that occurs when casting to UINT64 results in a TCR value that has bits [63:32] all set, which includes mostly RES0 bits but also the TBIn, AS and IPS fields. So explicitly redefine all TCR related constants as 'unsigned long' types, using the UL suffix. To avoid confusion in the future, the inappropriately named VTCR_EL23_xxx constants have the leading V removed, and the actual VTCR_EL2 related constants are dropped, given that we never configure stage 2 translation in UEFI. Reported-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com>
* UefiCpuPkg/CpuMpPei: Remove unnecessary variableJeff Fan2016-07-132-4/+0
| | | | | | | | | Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* UefiCpuPkg/CpuMpPei: Dump message if microcode signature not matchedJeff Fan2016-07-134-25/+31
| | | | | | | | | | | | | Verification microcode signature is one enhancement and not one requirement from IA32 SDM. This update is just to dump debug message instead of ASSERT() if the updated microcode signature does not match the loaded microcode signature. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* UefiCpuPkg/CpuMpPei: Skip microcode check/load if it has been loadedJeff Fan2016-07-131-0/+9
| | | | | | | | | | | | | | Actually, there is only one microcode region in platform. If microcode has been loaded, its signature will not be zero and should be loaded successfully. We needn't to check microcode region and load microcode again. This update is to skip checking/loading microcode if current microcode signature is not zero. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* OvmfPkg: add PciHotPlugInitDxeLaszlo Ersek2016-07-138-0/+390
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After IncompatiblePciDeviceSupportDxe, this is another small driver / protocol implementation that tweaks the behavior of the PCI bus driver in edk2. The protocol is specified in the Platform Init Spec v1.4a, Volume 5, Chapter 12.6 "PCI Hot Plug PCI Initialization Protocol". This implementation steers the PCI bus driver to reserve the following resources ("padding") for each PCI bus, in addition to the BARs of the devices on that PCI bus: - 2MB of 64-bit non-prefetchable MMIO aperture, - 512B of IO port space. The goal is to reserve room for devices hot-plugged at runtime even if the bridge receiving the device is empty at boot time. The 2MB MMIO size is inspired by SeaBIOS. The 512B IO port size is actually only 1/8th of the PCI spec mandated reservation, but the specified size of 4096 has proved wasteful (given the limited size of our IO port space -- see commit bba734ab4c7c). Especially on Q35, where every PCIe root port and downstream port qualifies as a separate bridge (capable of accepting a single device). Test results for this patch: - regardless of our request for 64-bit MMIO reservation, it is downgraded to 32-bit, - although we request 512B alignment for the IO port space reservation, the next upstream bridge rounds it up to 4096B. Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Suggested-by: Andrew Fish <afish@apple.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
* MdeModulePkg/PciBusDxe: recognize hotplug-capable PCIe portsLaszlo Ersek2016-07-132-0/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Section 7.8.2 of the PCI Express specification (r4.0 v0.3), entitled "PCI Express Capabilities Register (Offset 02h)", and section 7.8.9 "Slot Capabilities Register (Offset 14h)" of the same, describe the conditions when a PCIe port should be considered "supporting hotplug": - it should be a root complex port or a switch downstream port, and - it should have the "Slot Implemented" bit set in the Express Capabilities Register, and - it should have the "Hot-Plug Capable" bit set in the Slot Capabilities Register. The first two sub-conditions are already implemented in at least two open source projects I could find: - in SeaBIOS by Marcel Apfelbaum: "hw/pci: reserve IO and mem for pci express downstream ports with no devices attached" <https://code.coreboot.org/p/seabios/source/commit/3aa31d7d6375>, - in edk2 itself, in the implementation of the "PCI" UEFI Shell command: see the "PcieExplainTypeSlot" case label in function PciExplainPciExpress(), file "ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c". PciBusDxe recognizes such PCIe ports as bridges, but it doesn't realize they support hotplug. In turn PciBusDxe omits getting any resource padding information from the platform's EFI_PCI_HOT_PLUG_INIT_PROTOCOL for these bridges: GatherPpbInfo() [PciEnumeratorSupport.c] GetResourcePaddingPpb() [PciResourceSupport.c] GetResourcePaddingForHpb() [PciHotPlugSupport.c] IsPciHotPlugBus() [PciHotPlugSupport.c] // // returns FALSE // // // the following is not reached: // gPciHotPlugInit->GetResourcePadding() Implement a function called SupportsPcieHotplug() for identifying such ports, and call it from IsPciHotPlugBus() (after the call to IsSHPC()). Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
* MdeModulePkg/PciBusDxe: look for the right capability in IsSHPC()Laszlo Ersek2016-07-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI Hot Plug capability register block is marked with capability ID 0x0C (EFI_PCI_CAPABILITY_ID_SHPC), not 0x06 (EFI_PCI_CAPABILITY_ID_HOTPLUG). This bug prevents PciBusDxe from recognizing whether a PCI-to-PCI bridge supports hotplug. In turn the platform's EFI_PCI_HOT_PLUG_INIT_PROTOCOL is not consulted for resource padding information: GatherPpbInfo() [PciEnumeratorSupport.c] GetResourcePaddingPpb() [PciResourceSupport.c] GetResourcePaddingForHpb() [PciHotPlugSupport.c] IsPciHotPlugBus() [PciHotPlugSupport.c] IsSHPC() [PciHotPlugSupport.c] // // returns FALSE // // // the following is not reached: // gPciHotPlugInit->GetResourcePadding() Look for the correct capability ID. Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
* MdePkg/IndustryStandard: introduce EFI_PCI_CAPABILITY_ID_SHPCLaszlo Ersek2016-07-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "Pci22.h" header file defines the macro EFI_PCI_CAPABILITY_ID_HOTPLUG with value 0x06. According to all of: - later parts of the same header file, - Appendix H ("Capability IDs") of the PCI Local Bus Specification Revision 2.3, - and Chapter 2 ("Capability IDs") of the PCI Code and ID Assignment Specification Revision 0.9, 0x06 means "CompactPCI Hot Swap". It does not mean "PCI Hot-Plug": that capability is described by ID 0x0C: 0Ch PCI Hot-Plug -- This Capability ID indicates that the associated device conforms to the Standard Hot-Plug Controller model. Therefore EFI_PCI_CAPABILITY_ID_HOTPLUG is arguably a misnomer. PciBusDxe (mis-)uses EFI_PCI_CAPABILITY_ID_HOTPLUG in the IsSHPC() helper function to identify PCI Hot-Plug capability. In order to preserve compatibility with existent code, leave EFI_PCI_CAPABILITY_ID_HOTPLUG alone, and introduce EFI_PCI_CAPABILITY_ID_SHPC with the right ID value. Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
* OvmfPkg/PlatformBootManagerLib: remove stale FvFile boot optionsLaszlo Ersek2016-07-132-0/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Removes any boot options that point to binaries built into the firmware and have become stale due to any of the following: - DXEFV's base address or size changed (historical), - DXEFV's FvNameGuid changed, - the FILE_GUID of the pointed-to binary changed, - the referenced binary is no longer built into the firmware. For example, multiple such "EFI Internal Shell" boot options can coexist. They technically differ from each other, but may not describe any built-in shell binary exactly. Such options can accumulate in a varstore over time, and while they remain generally bootable (thanks to the efforts of BmGetFileBufferByFvFilePath()), they look bad. Filter out any stale options. This functionality is not added to QemuBootOrderLib, because it is independent from QEMU and fw_cfg. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gary Lin <glin@suse.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* OvmfPkg: add a Name GUID to each Firmware VolumeLaszlo Ersek2016-07-133-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FDF spec mentions the FvNameGuid statement for [FV.xxxx] sections, but the detailed description can be found in Volume 3 of the Platform Init spec (which is at 1.4a currently). Adding an FvNameGuid statement to [FV.xxx] has the following effects (implemented by "BaseTools/Source/C/GenFv/GenFvInternalLib.c"): - The EFI_FIRMWARE_VOLUME_HEADER.ExtHeaderOffset field is set to a nonzero value, pointing after EFI_FIRMWARE_VOLUME_HEADER itself (although not directly, see below). - An EFI_FIRMWARE_VOLUME_EXT_HEADER object is created at the pointed-to address. This object is not followed by any EFI_FIRMWARE_VOLUME_EXT_ENTRY (= extension) entries, so it only specifies the Name GUID for the firmware volume. The EFI_FIRMWARE_VOLUME_EXT_HEADER for each firmware volume can be found in the Build directory as a separate file (20 bytes in size): Build/Ovmf*/*_GCC*/FV/*.ext - The new data consume 48 bytes in the following volumes: SECFV, FVMAIN_COMPACT, DXEFV. They comprise: - 16 padding bytes, - EFI_FFS_FILE_HEADER2 (8 bytes in total: no Name and ExtendedSize fields, and Type=EFI_FV_FILETYPE_FFS_PAD), - EFI_FIRMWARE_VOLUME_EXT_HEADER (20 bytes, see above), - 4 padding bytes. (The initial 16 padding bytes and the EFI_FFS_FILE_HEADER2 structure are the reason why EFI_FIRMWARE_VOLUME_HEADER.ExtHeaderOffset does not point immediately past EFI_FIRMWARE_VOLUME_HEADER.) The sizes of the firmware volumes don't change, only their internal usages grow by 48 bytes. I verified that the statements and calculations in "OvmfPkg/DecomprScratchEnd.fdf.inc" are unaffected and remain valid. - The new data consume 0 bytes in PEIFV. This is because PEIFV has enough internal padding at the moment to accomodate the above structures without a growth in usage. In the future, firmware volumes can be identified by Name GUID (Fv(...) device path nodes), rather than memory location (MemoryMapped(...) device path nodes). This is supposed to improve stability for persistent device paths that refer to FFS files; for example, UEFI boot options. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Suggested-by: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
* BaseTools/GenFds: unbreak Region.PadBufferLaszlo Ersek2016-07-121-1/+1
| | | | | | | | | | | | | | | | | | | | In its current form, Region.PadBuffer() fills every second byte with 0x20, the default separator string of Python's string.join(): https://docs.python.org/2/library/string.html#string.join This corrupts some firmware because (a) 0x20 never corresponds to any ErasePolarity, (b) the PadData produced are actually longer than Size. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Fixes: bd907fb6386560e621112beca7b7d381d0003967 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmVirtPkg: add name GUIDs to FvMain instancesArd Biesheuvel2016-07-122-0/+2
| | | | | | | | | | | | Assign name GUIDs to the FVs that may appear in DevicePath references to things like the UiApp and the UEFI Shell. This prevents these device paths from changing inadvertently when the FV ends up in a different memory location due to external occurrences such as, e.g., a change in the amount of system memory. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmVirtPkg: factor out Rules FDF sectionArd Biesheuvel2016-07-124-330/+126
| | | | | | | | | | | All three current ArmVirtPkg have identical [Rules] sections in their FDF definitions, and ideally, they should remain that way. So factor out the definitions into a separate include file, and replace the existing definitions with !include directives. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmVirtPkg/ArmVirtQemu: factor out shared FV.FvMain definitionArd Biesheuvel2016-07-123-306/+180
| | | | | | | | | | | The FDF definition of [FV.FvMain] is identical between ArmVirtQemu and ArmVirtQemuKernel, and needs to remain that way. So factor it out into a separate include file, and replace both definitions with an !include directive. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmVirtPkg: align ArmVirtQemuKernel with ArmVirtQemuArd Biesheuvel2016-07-122-0/+4
| | | | | | | | | | | The platform ArmVirtQemuKernel is intended as an alternative for ArmVirtQemu that only deviates in the way it is invoked by QEMU, either from flash address 0x0 (the default ARM reset vector) or via the Linux kernel boot protocol. So add VirtioRngDxe and HighMemDxe here as well. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmVirtPkg: ArmVirtQemuKernel: make ACPI support AARCH64 onlyArd Biesheuvel2016-07-122-9/+12
| | | | | | | | | | | | | The reasoning of patch 8e2efec6b206: No ARM support for ACPI is planned under any OS we intend to run under ArmVirtQemu-ARM, so remove the drivers from the ARM build. applies equally to ArmVirtQemuKernel, so apply the same change there. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmVirtPkg/HighMemDxe: allow patchable PCD for PcdSystemMemoryBaseArd Biesheuvel2016-07-122-2/+2
| | | | | | | | | | | | Redefine the reference to PcdSystemMemoryBase in HighMemDxe.inf as a plain [Pcd] rather than [FixedPcd] (and fix up the code as appropriate). This allows us to align ArmVirtQemuKernel with ArmVirtQemu, given that the former uses a patchable PCD not a fixed PCD. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg AtaBusDxe: Fix ATA commands cannot be sent to some devicesHao Wu2016-07-121-3/+3
| | | | | | | | | | | | If there is no port multiplier (PortMultiplierPort = 0xFFFF), current code in functions TransferAtaDevice() and TrustTransferAtaDevice() will always set the DEV bit of the ATA device register. It causes that ATA commands cannot be sent to some ATA hard drives. Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* BaseTools/GenFds: speed up Region.PadBuffer()Laszlo Ersek2016-07-121-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation calls both pack() and Buffer.write() Size times. The new implementation calls both of these methods only once; the full data to write are constructed locally [1]. The range() function is replaced by xrange() because the latter is supposed to be faster / lighter weight [2]. On my laptop, I tested the change as follows: I pre-built the series at [3] with build -a X64 -p OvmfPkg/OvmfPkgX64.dsc -t GCC48 -b DEBUG \ -D HTTP_BOOT_ENABLE -D SECURE_BOOT_ENABLE (The series at [3] is relevant because it increases the size of one of the padded regions by 8.5 MB, slowing down the build quite a bit.) With all source code already compiled, repeating the above command takes approximately 45 seconds. With the patch applied, it goes down to 29 seconds. [1] http://stackoverflow.com/questions/27384093/fastest-way-to-write-huge-data-in-file [2] https://docs.python.org/2/library/functions.html?highlight=xrange#xrange [3] http://thread.gmane.org/gmane.comp.bios.edk2.devel/14214 We can also measure the impact with a synthetic test: > import timeit > > test_old = """ > import struct, string, StringIO > Size = (8 * 1024 + 512) * 1024 > Buffer = StringIO.StringIO() > PadData = 0xFF > for i in range(0, Size): > Buffer.write(struct.pack('B', PadData)) > """ > > test_new = """ > import struct, string, StringIO > Size = (8 * 1024 + 512) * 1024 > Buffer = StringIO.StringIO() > PadByte = struct.pack('B', 0xFF) > PadData = string.join(PadByte for i in xrange(0, Size)) > Buffer.write(PadData) > """ > > print(timeit.repeat(stmt=test_old, number=1, repeat=3)) > print(timeit.repeat(stmt=test_new, number=1, repeat=3)) The output is [8.231637001037598, 8.81188416481018, 8.948754072189331] [0.5503702163696289, 0.5461571216583252, 0.578315019607544] Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/GenFds: factor out Region.PadBuffer() methodLaszlo Ersek2016-07-121-34/+24
| | | | | | | | | | The same logic is used in five places; factor it out to a common method. Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ShellBinPkg: Ia32/X64 Shell binary update.Ruiyu Ni2016-07-125-1/+1
| | | | | | | | The binaries of ShellBinPkg are generated with ShellPkg project c882bdc6712314f255c92d7c951eaf9760a9de38. The binaries are built with no debug information by building with "RELEASE" target. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg: Fix build error in the PXE driver.Fu Siyuan2016-07-121-1/+1
| | | | | | | Fix the build error introduced by 0a28d02d9fb5293757c507e592a4d0404a7ecf74. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
* CryptoPkg BaseCryptLib: Init the content of struct 'CertCtx' before useHao Wu2016-07-121-1/+3
| | | | | | | | | | | | | | Some fields in structure 'CertCtx' might be used uninitialized in function Pkcs7GetCertificatesList(). This commit makes sure that 'CertCtx' gets initialized before being used. Cc: Long Qin <qin.long@intel.com> Cc: Ye Ting <ting.ye@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Qin Long <qin.long@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com>
* CryptoPkg BaseCryptLib: Avoid passing NULL ptr to function BN_bn2bin()Hao Wu2016-07-121-2/+6
| | | | | | | | | | | | This commit modifies the code logic to avoid passing NULL pointer to function BN_bn2bin(). Cc: Long Qin <qin.long@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Qin Long <qin.long@intel.com>
* MdeModulePkg MemoryProfile: ASSERT to ensure 'DriverInfoData' is not NULLHao Wu2016-07-122-0/+2
| | | | | | | | | | | | Code logic ensures that the pointer 'DriverInfoData' will not be NULL when it is used. Add ASSERT as warning for case that will not happen. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* NetworkPkg: Update PXE driver to follow edk2 coding standards.Fu Siyuan2016-07-122-5/+5
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Samer El-Haj-Mahmoud <smahmoud@lenovo.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Zhang Lubo <lubo.zhang@intel.com>
* MdeModulePkg: Update PXE driver to follow edk2 coding standards.Fu Siyuan2016-07-122-4/+4
| | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Samer El-Haj-Mahmoud <smahmoud@lenovo.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Zhang Lubo <lubo.zhang@intel.com>
* IntelFsp2Pkg SecFspSecPlatformLibNull: Remove MASM/GAS filesLiming Gao2016-07-115-334/+1
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2Pkg BaseFspSwitchStackLib: Remove MASM/GAS filesLiming Gao2016-07-113-157/+0
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2Pkg BaseFspDebugLibSerialPort: Remove MASM/GAS filesLiming Gao2016-07-113-66/+0
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample: Remove MASM/GAS filesLiming Gao2016-07-117-1124/+0
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* IntelFsp2WrapperPkg BaseFspWrapperApiLib: Remove MASM/GAS filesLiming Gao2016-07-113-462/+0
| | | | | | | | | | Keep NASM file only for new added modules. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Giri Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
* UefiCpuPkg CpuMpPei: Update INF to refer to NASM source fileLiming Gao2016-07-111-6/+4
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* UefiCpuPkg CpuIo2Dxe: Update INF to refer to NASM source fileLiming Gao2016-07-111-7/+5
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* UefiCpuPkg SecCore: Update SecCore inf to refer to nasmb sourceLiming Gao2016-07-111-4/+2
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* NetworkPkg: Fix Assert issue in iSCSI driver.Zhang, Lubo2016-07-111-1/+1
| | | | | | | | | | | | | | | | The bug existed in replacing AsciiStrToUnicodeStr with AsciiStrToUnicodeStrS, since MacString now is a pointer, the value sizeof(MacString)/sizeof (MacString[0]) is not correct here as the third parameter. Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Zhang Lubo <lubo.zhang@intel.com> Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* SecurityPkg OpalPasswordSmm: Remove useless code.Eric Dong2016-07-111-9/+0
| | | | | | | | | | EdkII not allow to use #if in source code, also the code in it already unused. so just remove this code. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* UefiCpuPkg: Fix typos in commentsGiri P Mudusuru2016-07-111-1/+1
| | | | | | | | | - becasue to because Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* NetworkPkg: Fix typos in commentsGiri P Mudusuru2016-07-1112-27/+27
| | | | | | | | | | | | | | - abstrated to abstracted - apropriate to appropriate - availabe to available - ptototypes to prototypes - prococol protocol Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
* MdePkg: Fix typos in commentsMudusuru, Giri P2016-07-113-6/+6
| | | | | | | | | | | - availabe to available - EFI_UNSUPPORTEDT to EFI_UNSUPPORTED Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg: Fix typos in comments and variablesGiri P Mudusuru2016-07-1145-200/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - abstrated to abstracted - accessibla to accessible - addres to address - apropriate to appropriate - arry to array - availabe to available - avaliable to available - becasue to because - correponding to corresponding - etablished to established - exeuction to execution - extensiable to extensible - fileds to fields - loadding to loading - ptototypes to prototypes - prococol protocol - requried to required - resoruce to resource - runing to running - uild to build Cc: Star Zeng <star.zeng@intel.com> Cc: Feng Tian <feng.tian@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
* IntelFrameworkModulePkg: Fix typos in commentsGiri P Mudusuru2016-07-112-6/+6
| | | | | | | | | - requried to required Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* PcAtChipsetPkg: Fix typos in commentsGiri P Mudusuru2016-07-113-7/+7
| | | | | | | | | - EFI_UNSUPPORTEDT to EFI_UNSUPPORTED Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* OptionRomPkg: Fix typos in commentsGiri P Mudusuru2016-07-112-4/+4
| | | | | | | | | - EFI_OUT_OF_RESORUCES to EFI_OUT_OF_RESOURCES Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* SecurityPkg: Fix typos in commentsGiri P Mudusuru2016-07-112-4/+4
| | | | | | | | | - availabe to available Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com>
* CryptoPkg: Fix typos in commentsGiri P Mudusuru2016-07-111-2/+2
| | | | | | | | | | - availabe to available Cc: Qin Long <qin.long@intel.com> Cc: Ting Ye <ting.ye@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Qin Long <qin.long@intel.com>
* Nt32Pkg: Fix typos in commentsGiri P Mudusuru2016-07-111-2/+2
| | | | | | | | | - EFI_UNSUPPORTEDT to EFI_UNSUPPORTED Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* EdkCompatibilityPkg: Fix typos in commentsMudusuru, Giri P2016-07-115-11/+11
| | | | | | | | | | | | - availabe to available - consummer to consumer - EFI_UNSUPPORTEDT to EFI_UNSUPPORTED - extensiable to extensible Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-23 08:32:42 +0000