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* MdeModulePkg/DxeIpl: Use memory attribute PPI to remap the stack NXArd Biesheuvel2023-06-262-4/+30
| | | | | | | | | | | | If the associated PCD is set to TRUE, use the memory attribute PPI to remap the stack non-executable. This provides a generic method for doing so, which will be used by ARM and AArch64 as well once they move to the generic DxeIpl handoff implementation. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com> Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/DxeIpl: Merge EBC, RISCV64 and LOONGARCH codeArd Biesheuvel2023-06-264-147/+3
| | | | | | | | | | | | | | | The Risc-V and LoongArch specific versions of the DXE core handoff code in DxeIpl are essentially copies of the EBC version (modulo the copyright in the header and some debug prints in the code). In preparation for introducing a generic PPI based method to implement the non-executable stack, let's merge these versions, so we only need to add this logic once. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com> Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg: Define memory attribute PPIArd Biesheuvel2023-06-262-0/+86
| | | | | | | | | | | | | Define a PPI interface that may be used by the PEI core or other PEIMs to manage permissions on memory ranges. This is primarily intended for restricting permissions to what is actually needed for correct execution by the code in question, and for limiting the use of memory mappings that are both writable and executable at the same time. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Oliver Smith-Denny <osde@linux.microsoft.com> Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* IntelFsp2WrapperPkg: Get HobListPtr before calling the Multiphase FSPSAishwarya, KurugoduMelmatamX2023-06-261-7/+8
| | | | | | | | | | | | | | | | | | | | REF : https://bugzilla.tianocore.org/show_bug.cgi?id=4480 In the FspsWrapperPeim, before calling FspWrapperVariableRequestHandler and FspWrapperMultiPhaseHandler ,FspHobListPtr should be available so that BL will be able to get the correct FspHobListPtr value Signed-off-by: kurugodx <kurugodumelmatamx.aishwarya@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Duggapu Chinni B <chinni.b.duggapu@intel.com> Cc: Chen Gang C <gang.c.chen@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ted Kuo <ted.kuo@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Cc: Susovan Mohapatra <susovan.mohapatra@intel.com> Reviewed-by: Ashraf Ali S <ashraf.ali.s@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* OvmfPkg/Bhyve: include TPM driverCorvin Köhne2023-06-232-2/+22
| | | | | | | | | | Bhyve will gain support for TPM emulation in the near future. Therefore, prepare OVMF by copying all TPM driver used by qemu's OVMF DSC into the bhyve OVMF DSC. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/Bhyve: install Acpi tables provided by FwCfgCorvin Köhne2023-06-231-0/+5
| | | | | Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg: move QemuFwCfgAcpi into AcpiPlatformLibCorvin Köhne2023-06-236-11/+14
| | | | | | | This makes the InstallQemuFwcfgTables function reusable by bhyve. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg: move BootScript into AcpiPlatformLibCorvin Köhne2023-06-235-31/+30
| | | | | | | This is required to move InstallQemuFwCfgTables into AcpiPlatformLib. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg: move PciEncoding into AcpiPlatformLibCorvin Köhne2023-06-2319-274/+38
| | | | | | | | | Bhyve supports providing ACPI tables by FwCfg. Therefore, InstallQemuFwCfgTables should be moved to AcpiPlatformLib to reuse the code. As first step, move PciEncoding into AcpiPlatformLib. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg: avoid including AcpiPlatformLib twiceCorvin Köhne2023-06-231-0/+5
| | | | | Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Acked-by: Peter Grehan <grehan@freebsd.org>
* OvmfPkg/Library: fix definition of GetAcpiRsdpFromMemoryCorvin Köhne2023-06-231-2/+2
| | | | | | | | | | | | The definition and declaration of GetAcpiRsdpFromMemory doesn't match. We don't get a compile error yet because UINTN is the same as UINT64 on 64bit machines. As the function works on memory addresses, UINTN is the correct type of the input parameters. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Peter Grehan <grehan@freebsd.org>
* SecurityPkg: SubClassTpm: Updated default valueKun Qin2023-06-232-4/+4
| | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3966 This change updated the default value of TPM device subclass PCD to `0x010E0000` in order to match the definition of EFI_PERIPHERAL_TPM from PI specification v1.8. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: PiStatusCode: Add TPM subclass definition to MdePkgKun Qin2023-06-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3966 This change introduces a new peripheral subclass definition from PI specification v1.8. The new subclass definition will cover system reboot events under the status reports from Trusted Platform Modules (TPMs). These definition could provide helpful datapoints to OEMs to analyze system security state and healthiness, as well as avoid definition collision with other existing peripheral subclass definitions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg: PiStatusCode: Add new Host Software class Error Code to MdePkgKun Qin2023-06-231-20/+21
| | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3794 This change introduces a new error code definitions under Host Software class according to PI specification v1.8. The new error code definition will cover system reboot events under the conditions of inconsistent memory map from one boot to another. These error codes could provide helpful datapoints to OEMs to investigate and prevent system failures in general. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Kun Qin <kuqin12@gmail.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* OvmfPkg/RiscVVirt: Add a readme for build and testSunil V L2023-06-231-0/+49
| | | | | | | | | | | | | Add a readme file which provides information regarding how to build and test EDK2 on RISC-V qemu virt platform. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* OvmfPkg/RiscVVirt: Add support for separate code and variable storeSunil V L2023-06-233-13/+19
| | | | | | | | | | | | | | | | | | | Currently, RiscVVirtQemu supports unified code and variable store mainly because only one pflash devices was available in qemu for EDK2. However, this doesn't allow to map the code part as read-only. With recent qemu enhancements, it is now possible for EDK2 to make use of both pflash devices in RISC-V virt machine. So, add support to create code and vars images separately. This also allows easy firmware code updates without losing the variable store. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* OvmfPkg/RiscVVirt: Add VirtNorFlashDeviceTreeLib librarySunil V L2023-06-232-0/+177
| | | | | | | | | | | | | This library is required to support separate code and variable store images. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* OvmfPkg/RiscVVirt: Fix couple of issues in VarStoreSunil V L2023-06-231-6/+6
| | | | | | | | | | | | | | The size of the FV and the WriteQueueSize is incorrect which causes the flash to be re-written during boot. Fix them and update the new checksum value. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* MdePkg: Code optimization to SMM InternalAllocateAlignedPagesduntan2023-06-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is code optimization to InternalAllocateAlignedPages of SmmMemoryAllocationLib which can reduce free memory fragments. Also it can reduce one pre-allocation page. Let's take a simple example: The expected pages size is 8KB, Alignment value is 8KB. In original InternalAllocateAlignedPages(), the first step is to allocate 4 pages and then find the first 8KB-aligned address in allocated 4 pages. If the upper limit address of allocated 4 pages is already 8KB aligned, then the allocated 4 pages contains two 8KB-aligned 8KB ranges. The lower 2 pages will be selected and removed from free pages. Then the higher 2 pages will be free. Since the whole memory allocation is from high address to low address, then the higher 2 pages cann't be merged with other free pages, causing the free memory fragments. However, when only allocate 3(2+2-1) pages, we can avoid the free memory fragments in specific case. Also 3 pages must contain a 8KB-aligned 8KB range, which meets the requirement. If the upper limit address of allocated 3 pages is 8KB-aligned, then the higher 2 pages range of allocated 3 pages is 8KB-aligned and will be selected and removed from free pages. The remaining lower one page of allocated 3 pages will be free and merged with left lower free memory. This can reduce free memory fragments in smm. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
* MdeModulePkg/SmmCore: Perf-log PlatformHookBefore/AfterSmmDispatchRay Ni2023-06-211-0/+4
| | | | | | | | Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* UefiCpuPkg/SmmCpu: Add PcdSmmApPerfLogEnable control AP perf-loggingRay Ni2023-06-215-3/+21
| | | | | | | | | | | | | | | | When a platform has lots of CPU cores/threads, perf-logging on every AP produces lots of records. When this multiplies with number of SMIs during post, the records are even more. So, this patch adds a new PCD PcdSmmApPerfLogEnable (default TRUE) to allow platform to turn off perf-logging on APs. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* MdeModulePkg/SmmCorePerformanceLib: Disable perf-logging at runtimeRay Ni2023-06-212-3/+47
| | | | | | | | | | | | | | | | | Because SMM perf-logging is migrated to non-SMRAM at ReadyToBoot by DxeCorePerformanceLib, the perf-logging after ExitBS is useless and impact the SMI latency at runtime. Hence the SmmCorePerformanceLib is updated to disable perf-logging after ExitBS. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdeModulePkg/SmmPerformanceLib: Disable perf-logging after ExitBSRay Ni2023-06-212-2/+75
| | | | | | | | | | | | | | | | | Because SMM perf-logging is migrated to non-SMRAM at ReadyToBoot by DxeCorePerformanceLib, the perf-logging after ExitBS is useless and impact the SMI latency at runtime. Hence the SmmPerformanceLib is updated to disable perf-logging after ExitBS. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdeModulePkg/SmmCore: Add perf-logging for SmmDriverDispatchHandlerRay Ni2023-06-211-1/+4
| | | | | | | | | | | | | | SmmDriverDispatchHandler is the routine that dispatches SMM drivers from FV. It's a time-consuming routine. Add perf-logging for this routine. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdeModulePkg/SmmCore: Add perf-logging for time-consuming proceduresRay Ni2023-06-212-1/+20
| | | | | | | | | | | | | | | | | | Following procedures are perf-logged: * SmmReadyToBootHandler * SmmReadyToLockHandler * SmmEndOfDxeHandler * SmmEntryPoint (It's the main routine run in BSP when SMI happens.) * SmiManage Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* UefiCpuPkg/CpuSmm: Add perf-logging for MP proceduresRay Ni2023-06-216-0/+219
| | | | | | | | | | | | | | | | | | | | | MP procedures are those procedures that run in every CPU thread. The EDKII perf infra is not MP safe so it doesn't support to be called from those MP procedures. The patch adds SMM MP perf-logging support in SmmMpPerf.c. The following procedures are perf-logged: * SmmInitHandler * SmmCpuFeaturesRendezvousEntry * PlatformValidSmi * SmmCpuFeaturesRendezvousExit Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* UefiCpuPkg/CpuSmm: Add perf-logging for time-consuming BSP proceduresRay Ni2023-06-216-5/+49
| | | | | | | | | | | | | | | | | | | | | | | | The patch adds perf-logging for the following potential time-consuming BSP procedures: * PiCpuSmmEntry - SmmRelocateBases - ExecuteFirstSmiInit * BSPHandler - SmmWaitForApArrival - PerformRemainingTasks * InitPaging * SetMemMapAttributes * SetUefiMemMapAttributes * SetPageTableAttributes * ConfigSmmCodeAccessCheck * SmmCpuFeaturesCompleteSmmReadyToLock Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* Maintainers.txt: update maintainer for CryptoPkgJian J Wang2023-06-211-1/+1
| | | | | | | | | | Cc: Jiewen Yao <jiewen.yao@intel.com> [jyao1] Cc: Yi Li <yi1.li@intel.com> [liyi77] Cc: Xiaoyu Lu <xiaoyu1.lu@intel.com> [xiaoyuxlu] Cc: Guomin Jiang <guomin.jiang@intel.com> [guominjia] Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiewen.yao@intel.com Reviewed-by: Yi Li <yi1.li@intel.com>
* UefiCpuPkg: RISC-V: TimerLib: Fix delay function to use 64-bitTuan Phan2023-06-152-31/+23
| | | | | | | | | The timer compare register is 64-bit so simplifying the delay function. Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* UefiCpuPkg: CpuTimerDxeRiscV64: Fix incorrect value sent to SbiSetTimerTuan Phan2023-06-153-5/+26
| | | | | | | | SbiSetTimer expects core tick value. Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* UefiPayloadPkg: Fix incorrect code on AddSectionHeaderBruceX Wang2023-06-141-3/+3
| | | | | | | | | | | Fix incorrect code on AddSectionHeader32() and AddSectionHeader64() Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Signed-off-by: BruceX Wang <brucex.wang@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com>
* UefiPayloadPkg: Add CAPSULE_SUPPORT in UPL and set it as FALSE in defaultMarsX Lin2023-06-131-0/+5
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4479 Add CAPSULE_SUPPORT to optionally select CapsuleLib instance, default value is FALSE. Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Gua Guo <gua.guo@intel.com> Reviewed-by: James Lu <james.lu@intel.com> Cc: Guo Dong <guo.dong@intel.com> Signed-off-by: MarsX Lin <marsx.lin@intel.com>
* Maintainers.txt: Remove me from maintainers of UefiPayloadPkg,ShellPkgRay Ni2023-06-131-2/+0
| | | | | | | | | | Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com>
* Maintainers.txt: Remove UEFI Shell Binaries sectionRay Ni2023-06-131-8/+0
| | | | | | | | | | | The Shell binaries are not generated anymore in each stable tag release. So, remove the section. Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb+tianocore@kernel.org> Signed-off-by: Ray Ni <ray.ni@intel.com>
* UnitTestFrameworkPkg: Add UnitTestPeiServicesTablePointerLibZhiguang Liu2023-06-139-0/+1961
| | | | | | | | | | | | | | | | | | | | | This library supports a PeiServicesTablePointerLib implementation that allows code dependent upon PeiServicesTable to operate in an isolated execution environment such as within the context of a host-based unit test framework. The unit test should initialize the PeiServicesTable database with any required elements (e.g. PPIs, Hob etc.) prior to the services being invoked by code under test. It is strongly recommended to clean any global databases by using EFI_PEI_SERVICES.ResetSystem2 after every unit test so the tests execute in a predictable manner from a clean state. Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* ShellPkg/SmbiosView: type 45 and type 46 support.Simon Wang2023-06-084-4/+222
| | | | | | | | | | The initial version of Smbios Specification 3.6.0 type 45 and type 46 support. Signed-off-by: Simon Wang <simowang@nvidia.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* UefiPayloadPkg: Enhance build script for BuildEntryOnlyGua Guo2023-06-071-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, have two command for pre-build binary support 1. --BuildEntryOnly: build UPL Entry file 2. --PreBuildUplBinary: build UPL binary based on UPL And these two commands should be exclusived, shouldn't have chance run it in the meantime. Case1: Build UPL entry with CLANGDWARF python UefiPayloadPkg/UniversalPayloadBuild.py --BuildEntryOnly Case2: Use pre-built UPL entry and build other fv by VS2019 python UefiPayloadPkg/UniversalPayloadBuild.py -t VS2019 \ --PreBuildUplBinary UniversalPayload.elf Case3: Build UPL Entry with CLANGDWARF and build other fv by VS2019 python UefiPayloadPkg/UniversalPayloadBuild.py -t VS2019 Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Signed-off-by: Gua Guo <gua.guo@intel.com> Reviewed-by: James Lu <james.lu@intel.com>
* Maintainers.txt: Update maintainers for StandaloneMmPkgNi, Ray2023-06-071-1/+1
| | | | | | | | Add Ray, remove Jiewen. Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* Maintainers.txt: Remove reviewer for StandaloneMmPkgSami Mujawar2023-06-071-1/+0
| | | | | | | Supreeth is no longer supreeth.venkatesh@arm.com. Therefore, remove the reviewer entry from StandaloneMmPkg. Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
* RedfishPkg: update Readme.mdNickle Wang2023-06-071-11/+11
| | | | | | | | | | | RedfishClientPkg is moved from edk2-staging repository to edk2-redfish-client repository. Update the link in Readme.md to new location. Signed-off-by: Nickle Wang <nicklew@nvidia.com> Cc: Abner Chang <abner.chang@amd.com> Cc: Igor Kulchytskyy <igork@ami.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
* MdeModulePkg/Bus: Fix port multiplier port in AhciPei PEIMNeo Hsueh2023-06-071-0/+10
| | | | | | | | | | If there is no port multiplier, PortMultiplierPort should be converted to 0 to follow AHCI spec. The same logic already applied in AtaAtapiPassThruDxe driver. Signed-off-by: Neo Hsueh <Hong-Chih.Hsueh@amd.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdePkg/BaseLib: Add SpeculationBarrier implementation for RiscV64Yong Li2023-06-062-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | Implement the SpeculationBarrier with implementations consisting of fence instruction which provides finer-grain memory orderings. Perform Data Barrier in RiscV: fence rw,rw Perform Instruction Barrier in RiscV: fence.i; fence r,r More detail is in Appendix A: RVWMO Explanatory Material in https://github.com/riscv/riscv-isa-manual This API is first introduced in the below commits for IA32 and x64 https://github.com/tianocore/edk2/commit/d9f1cac51bd354507e880e614d11a1dc160d38a3 https://github.com/tianocore/edk2/commit/e83d841fdc2878959185c4c6cc38a7a1e88377a4 and below the commit for ARM and AArch64 implementation https://github.com/tianocore/edk2/commit/c0959b4426b2da45cdb8146a5116bb4fd9b86534 This commit is to add the RiscV64 implementation which will be used by variable service under Variable/RuntimeDxe Cc: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Evan Chai <evan.chai@intel.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Tuan Phan <tphan@ventanamicro.com> Signed-off-by: Yong Li <yong.li@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* MdePkg ACPI65: Update MADT Revision pre ACPI Spec 6.5Aryeh Chen2023-06-061-1/+1
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4474 ACPI_Spec_6_5_Aug29 Table 5.19 page 128 that MADT Revision field is 6. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Aryeh Chen <aryeh.chen@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Tested-by: Aryeh Chen <aryeh.chen@intel.com>
* CharEncodingCheckPlugin: Remove Noisy PrintOliver Smith-Denny2023-06-061-3/+1
| | | | | | | | | | | | | | | | Currently, CharEncodingCheckPlugin prints a message for every file that passes the test, which for some platforms can cause most of the CI build log to be filled with this print. It does not add any value, so this patch removes the noisy print and only prints if the encoding check fails. Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
* OvmfPkg/Bhyve: install ACPI tables from memoryCorvin Köhne2023-06-063-1/+38
| | | | | | | | | | | | | | | | | | | It's much easier to create configuration dependent ACPI tables for bhyve than for OVMF. For this reason, don't use the statically created ACPI tables provided by OVMF. Instead, prefer the dynamically created ACPI tables of bhyve. If bhyve provides no ACPI tables or we are unable to detect those, fall back to OVMF tables. Ideally, we use the qemu fwcfg interface to pass the ACPI tables from bhyve to OVMF. bhyve will support this in the future. However, current bhyve executables don't support passing ACPI tables by the qemu fwcfg interface. They just copy the ACPI into main memory. For that reason, pick up the ACPI tables from main memory. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Reviewed-by: Rebecca Cran <rebecca@bsdio.com> Acked-by: Peter Grehan <grehan@freebsd.org> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/Xen: export AcpiTable installation into AcpiPlatformLibCorvin Köhne2023-06-065-261/+254
| | | | | | | | This makes the function reuseable by bhyve. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/Xen: export search of RSDP into a library functionCorvin Köhne2023-06-067-90/+152
| | | | | | | | | | Xen and bhyve are placing ACPI tables into system memory. So, they can share the same code. Therefore, create a new library which searches and installs ACPI tables from system memory. Signed-off-by: Corvin Köhne <corvink@FreeBSD.org> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg: Create additional PML1 entries for large SEV-SNP VMsMikolaj Lisik via groups.io2023-06-021-9/+18
| | | | | | | | | | | | | | Edk2 was failing, rather than creating more PML4 entries, when they weren't present in the initial memory acceptance flow. Because of that VMs with more than 512G memory were crashing. This code fixes that. This change affects only SEV-SNP VMs. The code was tested by successfully booting a 512G SEV-SNP VM. Signed-off-by: Mikolaj Lisik <lisik@google.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
* OvmfPkg/RiscVVirt: Remove unimplemented NxForStack configurationArd Biesheuvel2023-06-021-6/+0
| | | | | | | | | The RISC-V version of the DXE IPL does not implement setting the stack NX, so before switching to an implementation that will ASSERT() on the missing support, drop the PCD setting that enables it. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* ArmPkg: add SMC defines for SiP service callsMarcin Juszkiewicz2023-06-021-0/+9
| | | | | | | They are useful for those platforms where SMC SiP calls exist. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-21 04:18:39 +0000