summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* StandaloneMmPkg: Replace dependency on ArmMmuLibAchin Gupta2018-12-091-1/+1
| | | | | | | | | Use StandaloneMmMmuLib instead of ArmMmuLib in StandaloneMmPkg for AArch64 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com> Reviewed-by: Achin Gupta <achin.gupta@arm.com>
* StandaloneMmPkg: Zero data structure explicitlyAchin Gupta2018-12-091-1/+2
| | | | | | | | | | | | Introduction of the -mstrict-align flag results in GCC attempting to use memset to zero out the InitMmFoundationSvcArgs structure. In the absence of this C library function, this patch explicitly zeroes this data structure prior to use. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com> Reviewed-by: Achin Gupta <achin.gupta@arm.com>
* StandaloneMmPkg: Enforce alignment check for AArch64Achin Gupta2018-12-091-1/+2
| | | | | | | | | | | | On AArch64, Standalone MM during the SEC phase runs in S-EL0 with SCTLR_EL1.A=1. This patch adds the -mstrict-align compiler flag to ensure that the generated code is compliant with the runtime alignment checks. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com> Reviewed-by: Achin Gupta <achin.gupta@arm.com>
* StandaloneMmPkg: Add missing dependency on PL011UartClockLibAchin Gupta2018-12-091-0/+1
| | | | | | | | | | This patch fixes the dependency PL011UartLib has on PL011UartClockLib by including its implementation path in the StandaloneMm DSC file. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com> Reviewed-by: Achin Gupta <achin.gupta@arm.com>
* Revert "MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bits"Ard Biesheuvel2018-12-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 82379bf6603274e81604d5a6f6bb14bdde616286. On AArch64, we can only use 48 address bits while running in UEFI, while the GCD and UEFI memory maps may describe up to 52 bits of physical address space. For this reason, MAX_ADDRESS was reduced to 48 bits, to ensure that the firmware does not inadvertently attempt to allocate memory that we cannot access. However, MAX_ADDRESS is used in runtime drivers as well, and runtime drivers may deal with kernel virtual addresses, which have bits [63:48] set. In fact, the OS may be running with 64 KB pages and pass addresses into the runtime services that use up to 52 bits of address space, either with the top bits set or cleared, even if the physical address space does not extend beyond 48 bits. In summary, changing MAX_ADDRESS is a mistake, and needs to be reverted. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* BaseTools: Correct CCFLAG for PcdValueInitBobCF2018-12-071-12/+12
| | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1361 This patch is going to correct the CCFlag for building PcdValueInit Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: BobCF <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Customize deepcopy function.BobCF2018-12-075-5/+88
| | | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1288 This patch is one of build tool performance improvement series patches. This patch is going to customize the deepcopy function for SkuClass, PcdClassObject and python dictionary. python deepcopy copy everything of a object, but for our current usage we just need to copy the data we care about recursively. By implementing __deepcopy__ for SkuClass, PcdClassObject, we can customize deepcopy function for them. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: BobCF <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Optimize string concatenationBobCF2018-12-074-31/+44
| | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1288 This patch is one of build tool performance improvement series patches. This patch is going to use join function instead of string += string2 statement. Current code use string += string2 in a loop to combine a string. while creating a string list in a loop and using "".join(stringlist) after the loop will be much faster. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: BobCF <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* BaseTools: Replace the sqlite database with listBobCF2018-12-076-322/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1288 [V2] Optimize this patch so that it can be easy to review. This patch is just apply the change to original files while not create new similar files. [V1] This patch is one of build tool performance improvement series patches. This patch is going to use python list to store the parser data instead of using sqlite database. The replacement solution is as below: SQL insert: list.append() SQL select: list comprehension. for example: Select * from table where field = “something” -> [ item for item in table if item[3] == “something”] SQL update: python map function. for example: Update table set field1=newvalue where filed2 = “something”. -> map(lambda x: x[1] = newvalue, [item for item in table if item[2] == “something”]) SQL delete: list comprehension. With this change, We can save the time of interpreting SQL statement and the time of write database to file system Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: BobCF <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* BaseTools: AutoGen and GenFds share the parser data.Zhao, ZhiqiangX2018-12-073-57/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V2: Extract the common part of new API and the original main() function into one function. V1: https://bugzilla.tianocore.org/show_bug.cgi?id=1288 Currently, AutoGen and GenFds run in different python interpreters. The parser are duplicated. This patch is going to create new API for GenFds and have the build to call that API instead of executing GenFds.py. As such, the GenFds and build can share the parser data. This patch is expected to save the time of GenFds about 2~3 seconds. More details will be logged in BZ. This is the summary measure data generated from python cProfile for building Ovmf. Currently: 8379147 function calls (8135450 primitive calls) in 12.580 seconds After applying this patch: 3428712 function calls (3418881 primitive calls) in 8.944 seconds Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: ZhiqiangX Zhao <zhiqiangx.zhao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Carsey Jaben <jaben.carsey@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTool: Filter out unused structure pcdsFeng, Bob C2018-12-073-1/+35
| | | | | | | | | | | | | | | | | V2: Fixed the issue that V1 adds new check to the Pcds in the platform unused library INF files. It breaks the existing platform. V1? The current code handle all the structure pcds even if there is no module or library use them. This patch is going to filter out the unused structure pcds. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Enable Pcd Array support.bob.c.feng@intel.com2018-12-076-338/+644
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1292 This patch is going to enable Array data type for PCD. 1. Support Pcd ARRAY as Structure PCD type including basic datatype array and structure array. For example: gStructuredPcdPkgTokenSpaceGuid.PcdTest|{0x0}|TEST[10]|0x00010080 gStructuredPcdPkgTokenSpaceGuid.PcdTest2|{0x0}|UINT8[10]|0x00010081 2. Support C CODE style value initialization in DEC/DSC. For example: gStructuredPcdPkgTokenSpaceGuid.PcdTest|{CODE({ {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, {0, {0, 0, 0, 0, 0, 0, 0}}, })} Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ArmPkg/OpteeLib: Add dummy RPC handlerSumit Garg2018-12-062-7/+30
| | | | | | | | | Add dummy RPC handler for RPCs that are not implemented as control should be returned back to OP-TEE in case any RPC is invoked. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* BaseTools: create and use a standard shared variable for '*'Jaben Carsey2018-12-0613-69/+70
| | | | | | | | | | add a variable for the string '*' and then use it instead of lots of '*' Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by : Bob Feng <bob.c.feng@intel.com>
* BaseTools: cleanup LongFilePathSupport usageJaben Carsey2018-12-062-14/+1
| | | | | | | | | | | 1) remove an identical function and import it from Common.LongFilePathSupport 2) remove an import that is not needed/used. Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by : Bob Feng <bob.c.feng@intel.com>
* BaseTools: Move Identification file to EotJaben Carsey2018-12-062-1/+2
| | | | | | | | | | | Move the Identification file. This file is only ever imported into the Eot tool. Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by : Bob Feng <bob.c.feng@intel.com>
* BaseTools/CommonLib: drop the use of MAX_ADDRESSArd Biesheuvel2018-12-066-22/+0
| | | | | | | | | | | | | | | | | | | The macro MAX_ADDRESS represents the largest virtual address that is valid for a certain architecture. For the BaseTools, this quantity is irrelevant, since the same tools can be used to build for different targets. Since we only refer to it in a single place, which is an ASSERT() that doesn't seem particularly useful (it ensures that memcpy() will not be called with arguments that will make it read beyond the end of the address space and wrap around), let's drop the ASSERT and all references to MAX_ADDRESS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* Maintainers.txt: Remove DuetPkgShenglei Zhang2018-12-061-5/+0
| | | | | | | | | | | | | | | Since DuetPkg is due to be removed, Maintainers.txt should also be updated. https://bugzilla.tianocore.org/show_bug.cgi?id=1322 Cc: Hao Wu <hao.a.wu@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* BaseTools: Remove tools only used by DuetPkgShenglei Zhang2018-12-0631-4986/+0
| | | | | | | | | | | | | | | | | | | Given that DuetPkg will be removed, tools only used by DuetPkg can also be removed after its removal operation. https://bugzilla.tianocore.org/show_bug.cgi?id=1322 v2:Remove these tools in Makefile and GNUmakefile. v4:Remove these tools in BinWrappers/PosixLike/ and UserManuals. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* DuetPkg: Remove DuetPkgShenglei Zhang2018-12-06172-57158/+0
| | | | | | | | | | | | | | | DuetPkg depends on Legacy BIOS to provide a UEFI environment. It was invented in the era when UEFI environment is hard to find. Since now UEFI is very popular in PC area, we could stop the official support of this package and remove it from the master. https://bugzilla.tianocore.org/show_bug.cgi?id=1322 Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* BaseTools/CommonLib: drop definition of MAX_UINTNArd Biesheuvel2018-12-051-1/+0
| | | | | | | | | | | | | | The maximum value that can be represented by the native word size of the *target* should be irrelevant when compiling tools that run on the build *host*. So drop the definition of MAX_UINTN, now that we no longer use it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/CommonLib: get rid of 'native' type string parsing routinesArd Biesheuvel2018-12-052-193/+5
| | | | | | | | | | | | | Parsing a string into an integer variable of the native word size is not defined for the BaseTools, since the same tools may be used to build firmware for different targets with different native word sizes. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/DevicePath: use MAX_UINT32 as default device path max sizeArd Biesheuvel2018-12-051-2/+2
| | | | | | | | | | | | | | Replace the default size limit of IsDevicePathValid() with a value that does not depend on the native word size of the build host. 4 GiB seems sufficient as the upper bound of a device path handled by UEFI. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/CommonLib: add definition of MAX_UINT32Ard Biesheuvel2018-12-051-0/+1
| | | | | | | | | | Since we will be dropping the definition of MAX_UINTN, whose meaning is ambiguous for the BaseTools, add a definition of MAX_UINT32 that we can switch to. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/DevicePath: use explicit 64-bit number parsing routinesArd Biesheuvel2018-12-051-2/+2
| | | | | | | | | | | | Replace invocations of StrHexToUintn() with StrHexToUint64(), so that we can drop the former. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/CommonLib: use explicit 64-bit type in Strtoi()Ard Biesheuvel2018-12-051-2/+2
| | | | | | | | | | | | | | | | Don't use the native word size string to number parsing routines, but instead, use the 64-bit one and cast to UINTN. Currently, the only user is in Source/C/DevicePath/DevicePathFromText.c which takes care to use Strtoi64 () unless it assumes the value fits in 32-bit, so this change is a no-op even on 32-bit build hosts. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/CommonLib: avoid using 'native' word size in IP address handlingArd Biesheuvel2018-12-051-14/+14
| | | | | | | | | | | | | | | In the context of the BaseTools, there is no such thing as a native word size, given that the same set of tools may be used to build a firmware image consisting of both 32-bit and 64-bit modules. So update StrToIpv4Address() and StrToIpv6Address() to use UINT64 types instead of UINTN types when parsing strings. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Remove GenVtfShenglei Zhang2018-12-0510-3546/+0
| | | | | | | | | | | | | | | | | GenVtf C tool is IPF specific. IPF support has been removed from edk2 trunk. This tool can be removed. https://bugzilla.tianocore.org/show_bug.cgi?id=1349 v2:Remove GenVtf in Makefile and GNUmakefile. v3:Remove BinWrappers/PosixLike/GenVtf and the user manual of GenVtf. Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* Maintainers.txt: Change package maintainer of IntelFsp*PkgChasel, Chiu2018-12-051-4/+10
| | | | | | | | | | | Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com> Cc: Zeng Star <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* Maintainers.txt: Update BaseTools maintainersYonghong Zhu2018-12-041-1/+2
| | | | | | | | | | | As Yonghong has some other focus, change him from maintainer to reviewer, Bob will be the new maintainer. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* ArmVirtPkg/QemuVirtMemInfoLib: trim the MMIO region mappingArd Biesheuvel2018-12-033-9/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QEMU/mach-virt is rather unhelpful when it comes to tracking down NULL pointer dereferences that occur while running in UEFI: since we have NOR flash mapped at address 0x0, inadvertent reads go unnoticed, and even most writes are silently dropped, unless you're unlucky and the instruction in question is one that KVM cannot emulate, in which case you end up with a QEMU crash like this: error: kvm run failed Function not implemented PC=000000013f7ff804 X00=000000013f7ab108 X01=0000000000000064 X02=000000013f801988 X03=00000000800003c4 X04=0000000000000000 X05=0000000096000044 X06=fffffffffffd8270 X07=000000013f7ab4a0 X08=0000000000000001 X09=000000013f803b88 X10=000000013f7e88d0 X11=0000000000000009 X12=000000013f7ab554 X13=0000000000000008 X14=0000000000000002 X15=0000000000000000 X16=0000000000000000 X17=0000000000000000 X18=0000000000000000 X19=0000000000000000 X20=000000013f81c000 X21=000000013f7ab170 X22=000000013f81c000 X23=0000000009000018 X24=000000013f407020 X25=000000013f81c000 X26=000000013f803530 X27=000000013f802000 X28=000000013f7ab270 X29=000000013f7ab0d0 X30=000000013f7fee10 SP=000000013f7a6f30 PSTATE=800003c5 N--- EL1h and a warning in the host kernel log that load/store instruction decoding is not supported by KVM. Given that the first page of the flash device is not actually used anyway, let's reduce the mappings of the peripheral space and the flash device (both of which cover page #0) to only cover what is actually required: ArmVirtQemu.fdf: > 0x00001000|0x001ff000 > gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize ArmVirtQemuKernel.fdf: > 0x00008000|0x001f8000 > gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize For ArmVirtQemu, the resulting virtual mapping looks roughly like: - [0, 4K) : flash, unmapped - [4K, 2M) : flash, mapped as WB+X RAM - [2M, 64M) : flash, unmapped - [64M, 128M) : varstore flash, will be mapped by the NOR flash driver - [128M, 256M) : peripherals, mapped as device - [256M, 1GB) : 32-bit MMIO aperture, translated IO aperture, ECAM, will be mapped by the PCI host bridge driver - [1GB, ...) : RAM, mapped. After this change, any inadvertent read or write from/to the first physical page will trigger a translation fault inside the guest, regardless of the nature of the instruction, without crashing QEMU. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmVirtPkg/NorFlashQemuLib: disregard our primary FVArd Biesheuvel2018-12-032-2/+16
| | | | | | | | | | | | | | | | | | The primary FV contains the firmware boot image, which is not runtime updatable in our case. So exposing it to the NOR flash driver is undesirable, since it may attempt to modify the NOR flash contents. It is also rather pointless, since we don't keep anything there that we care to expose. (the SEC and PEI phase modules are not executable from DXE context, and the contents of the embedded DXE phase FV are exposed by the DXE core directly via the FVB2 protocol) So let's disregard the NOR flash block that covers the primary FV. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmPkg/ArmMmuLib ARM: handle unmapped sections when updating permissionsArd Biesheuvel2018-12-031-2/+6
| | | | | | | | | | | | | The ARM ArmMmuLib code currently does not take into account that setting permissions on a region should take into account that a region may not be mapped yet to begin with. So when updating a section descriptor whose old value is zero, pass in the address explicitly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmMmuLib ARM: handle unmapped section in GetMemoryRegion()Ard Biesheuvel2018-12-031-0/+3
| | | | | | | | | | | | | | | | GetMemoryRegion() is used to obtain the attributes of an existing mapping, to permit permission attribute changes to be optimized away if the attributes don't actually change. The current ARM code assumes that a section mapping or a page mapping exists for any region passed into GetMemoryRegion(), but the region may be unmapped entirely, in which case the code will crash. So check if a section mapping exists before dereferencing it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* MdeModulePkg: Correct PCD name in MdeModulePkg.uniLiming Gao2018-12-031-2/+2
| | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1363 New PCD PcdVpdBaseAddress64 is added in MdeModulePkg.dec. Its string token in MdeModulePkg.uni should match to its name. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Bi Dandan <dandan.bi@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Bi Dandan <dandan.bi@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* EmbeddedPkg/EmbeddedPkg.dec: drop PcdPrePiCpuMemorySize declarationsArd Biesheuvel2018-11-301-4/+0
| | | | | | | | | | PcdPrePiCpuMemorySize is no longer used so drop the declarations from the package DEC file. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmVirtPkg: drop PcdPrePiCpuMemorySize assignments from all platformsArd Biesheuvel2018-11-293-11/+0
| | | | | | | | | PcdPrePiCpuMemorySize is no longer used so drop the PCD overrides from all platform descriptions in ArmVirtPkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* EmbeddedPkg/PrePiLib: drop unused PCD referenceArd Biesheuvel2018-11-291-1/+0
| | | | | | | | | | Drop the reference to gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize which is never used. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/PlatformPei: drop unused PCD referencesArd Biesheuvel2018-11-292-6/+0
| | | | | | | | | | Drop some PCD references that are not actually referenced from the PlatformPei code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* BeagleBoardPkg/PrePi: base GCD memory space size on CPU's PA rangeArd Biesheuvel2018-11-292-2/+1
| | | | | | | | | | | | Derive the size of the GCD memory space map directly from the CPU's information registers rather than from the PcdPrePiCpuMemorySize PCD, which will be removed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmVirtPkg/PrePi: base GCD memory space size on CPU's PA rangeArd Biesheuvel2018-11-292-2/+1
| | | | | | | | | | | Derive the size of the GCD memory space map directly from the CPU's information registers rather than from the PcdPrePiCpuMemorySize PCD, which will be removed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* ArmPlatformPkg/PrePi: base GCD memory space size on CPU's PA rangeArd Biesheuvel2018-11-293-3/+1
| | | | | | | | | | | | Derive the size of the GCD memory space map directly from the CPU's information registers rather than from the PcdPrePiCpuMemorySize PCD, which will be removed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/CpuPei: base GCD memory space size on CPU's PA rangeArd Biesheuvel2018-11-292-2/+1
| | | | | | | | | | | | Derive the size of the GCD memory space map directly from the CPU's information registers rather than from the PcdPrePiCpuMemorySize PCD, which will be removed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmMmuLib: take the CPU supported maximum PA space into accountArd Biesheuvel2018-11-293-8/+9
| | | | | | | | | | | | In preparation of dropping PcdPrePiCpuMemorySize entirely, base the maximum size of the identity map on the capabilities of the CPU. Since that may exceed what is architecturally permitted when using 4 KB pages, take MAX_ADDRESS into account as well. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmVirtPkg/XenVirtMemInfoLib: refactor reading of the PA space sizeArd Biesheuvel2018-11-294-75/+7
| | | | | | | | | | Use the new ArmLib helper to read the CPU's physical address limit so we can drop our own homecooked one. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmPkg/ArmLib: add support for reading the max physical address space sizeArd Biesheuvel2018-11-294-0/+39
| | | | | | | | | | | Add a helper function that returns the maximum physical address space size as supported by the current CPU. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* MdePkg/ProcessorBind.h AARCH64: limit MAX_ADDRESS to 48 bitsArd Biesheuvel2018-11-291-2/+2
| | | | | | | | | | | | AArch64 supports the use of more than 48 bits for physical and/or virtual addressing, but only if the page size is set to 64 KB, which is not supported by UEFI. So redefine MAX_ADDRESS to cover only 48 address bits. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ArmVirtPkg/QemuVirtMemInfoLib: remove 1:1 mapping of top of PA rangeArd Biesheuvel2018-11-295-97/+5
| | | | | | | | | | | | | | | | | Currently, we map DRAM as EFI_MEMORY_WB, and the remainder of the entire virtual address space is mapped with EFI_MEMORY_UC attributes, regardless of whether any devices actually reside there. Now that we are relaxing the address space limit to more than 40 bits, mapping all that address space actually takes up more space in page tables than we have so far made available as temporary RAM. So let's get rid of the mapping rather than increasing the available RAM, given that the mapping is not particularly useful anyway. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmVirtPkg/FdtPciHostBridgeLib: map ECAM and I/O spaces in GCD memory mapArd Biesheuvel2018-11-292-1/+46
| | | | | | | | | | | | | | | | | | | | Up until now, we have been getting away with not declaring the ECAM and translated I/O spaces at all in the GCD memory map, simply because we map the entire address space with device attributes in the early PEI code, and so the ECAM space will be mapped wherever it ends up. Now that we are about to make changes to how ArmVirtQemu reasons about the size of the address space, it would be better to get rid of this mapping of the entire address space, since it can get arbitrarily large without real benefit. So start by mapping the ECAM and translated I/O spaces explicitly, instead of relying on the early PEI mapping. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* EmbeddedPkg/PrePiHobLib: drop CreateHobList() from libraryArd Biesheuvel2018-11-293-62/+0
| | | | | | | | | | Drop the declaration and the implementation of CreateHoblist(), which is not used anywhere. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-03 14:34:40 +0000