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* UefiCpuPkg: Has APs in 64 bit long-mode before booting to OS.Xie, Yuanhao2022-12-207-200/+184
| | | | | | | | | | | | | | | | | | | | | | During the finalization of Mp initialization before booting into the OS, depending on whether Mwait is supported or not, AsmRelocateApLoop places Aps in MWAIT-loop or HLT-loop. Since paging is necessary for long mode, the original implementation of moving APs to 32-bit was to disable paging to ensure that the booting does not crash. The current modification creates a page table in reserved memory, avoiding switching modes and reclaiming memory by OS. This modification is only for 64 bit mode. More specifically, we keep the AMD logic as the original code flow, extract and update the Intel-related code, where the APs would stay in 64-bit, and run in a Mwait or Hlt loop until the OS wake them up. Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg: Duplicated AsmRelocateApLoop as AsmRelocateApLoopAmdYuanhao Xie2022-12-205-20/+235
| | | | | | | | AsmRelocateApLoop is replicated for future Intel Logic Extraction, further brings AP into 64-bit, and enables paging. Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiPayloadPkg/SerialPortLib: Enhance multi port behaviourKavya2022-12-201-6/+35
| | | | | | | | | | | | | | Add condition to return success if mUartCount is greater than zero in SerialPortInitialize() to avoid filling mUartInfo with the same hob data when SerialPortInitialize() is called multiple times. Also add proper conditions in SerialPortRead function to read the data properly from multiple UART's. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: Kavya <k.kavyax.sravanthi@intel.com>
* EmulatorPkg/RedfishHostInterface: Add NULL functionAbner Chang2022-12-201-0/+24
| | | | | | | | | | | Add NULL function RedfishPlatformHostInterfaceNotification that returns EFI_UNSUPPORTED. Signed-off-by: Abner Chang <abner.chang@amd.com> Cc: Nickle Wang <nicklew@nvidia.com> Cc: Igor Kulchytskyy <igork@ami.com> Reviewed-by: Nickle Wang <nicklew@nvidia.com>
* RedfishPkg/RedfishHostInterface: Platform Redfish HI notificationAbner Chang2022-12-203-6/+121
| | | | | | | | | | | | | | | | For some use cases, Redfish host interface table relies on the certain EFI protocols installation at the driver connection. Redfish host interface DXE driver is not able to build the SMBIOS type 42h record at driver entry point. This patch adds the mechanism in Redfish host interface DXE driver to listen to EFI protocol installed by platform library that indicates the necessary information is ready for building SMBIOS 42h record. Signed-off-by: Abner Chang <abner.chang@amd.com> Cc: Nickle Wang <nicklew@nvidia.com> Cc: Igor Kulchytskyy <igork@ami.com> Reviewed-by: Nickle Wang <nicklew@nvidia.com>
* OvmfPkg/PlatformInitLib: Fix integrity checking failed of NvVarStoreChun-Yi Lee2022-12-201-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the commit 4f173db8b4 "OvmfPkg/PlatformInitLib: Add functions for EmuVariableNvStore", it introduced a PlatformValidateNvVarStore() function for checking the integrity of NvVarStore. In some cases when the VariableHeader->StartId is VARIABLE_DATA, the VariableHeader->State is not just one of the four primary states: VAR_IN_DELETED_TRANSITION, VAR_DELETED, VAR_HEADER_VALID_ONLY, VAR_ADDED. The state may combined two or three states, e.g. 0x3C = (VAR_IN_DELETED_TRANSITION & VAR_ADDED) & VAR_DELETED or 0x3D = VAR_ADDED & VAR_DELETED When the variable store has those variables, system booting/rebooting will hangs in a ASSERT: NvVarStore Variable header State was invalid. ASSERT /mnt/working/source_code-git/edk2/OvmfPkg/Library/PlatformInitLib/Platform.c(819): ((BOOLEAN)(0==1)) Adding more log to UpdateVariable() and PlatformValidateNvVarStore(), we saw some variables which have 0x3C or 0x3D state in store. e.g. UpdateVariable(), VariableName=BootOrder L1871, State=0000003F <-- VAR_ADDED State &= VAR_DELETED=0000003D FlushHobVariableToFlash(), VariableName=BootOrder ... UpdateVariable(), VariableName=InitialAttemptOrder L1977, State=0000003F State &= VAR_IN_DELETED_TRANSITION=0000003E L2376, State=0000003E State &= VAR_DELETED=0000003C FlushHobVariableToFlash(), VariableName=InitialAttemptOrder ... UpdateVariable(), VariableName=ConIn L1977, State=0000003F State &= VAR_IN_DELETED_TRANSITION=0000003E L2376, State=0000003E State &= VAR_DELETED=0000003C FlushHobVariableToFlash(), VariableName=ConIn ... So, only allowing the four primary states is not enough. This patch changes the falid states list (Follow Jiewen Yao's suggestion): 1. VAR_HEADER_VALID_ONLY (0x7F) - Header added (*) 2. VAR_ADDED (0x3F) - Header + data added 3. VAR_ADDED & VAR_IN_DELETED_TRANSITION (0x3E) - marked as deleted, but still valid, before new data is added. (*) 4. VAR_ADDED & VAR_IN_DELETED_TRANSITION & VAR_DELETED (0x3C) - deleted, after new data is added. 5. VAR_ADDED & VAR_DELETED (0x3D) - deleted directly, without new data. (*) means to support surprise shutdown. And removed (VAR_IN_DELETED_TRANSITION) and (VAR_DELETED) because they are invalid states. v2: Follow Jiewen Yao's suggestion to add the following valid states: VAR_ADDED & VAR_DELETED (0x3D) VAR_ADDED & VAR_IN_DELETED_TRANSITION (0x3E) VAR_ADDED & VAR_IN_DELETED_TRANSITION & VAR_DELETED (0x3C) and removed the following invalid states: VAR_IN_DELETED_TRANSITION VAR_DELETED Signed-off-by: Chun-Yi Lee <jlee@suse.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UefiPayloadPkg: Define default values for the DynamicEX PCDsjdzhang2022-12-201-8/+8
| | | | | | | | | | | | | | | | | The following PCDs have no value in UefiPayloadPkg.dsc and they can not pass the Ecc tool check, so assign the default values the same as they are in *.dec file. 1. gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport 2. gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport 3. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSuppor 4. gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSystemPageSize 5. gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds 6. gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode 7. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress 8. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: jdzhang <jdzhang@kunluntech.com.cn>
* CryptoPkg: Need to enable crypto functionsJudah Vang2022-12-203-14/+17
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3992 V1: Enable CryptAes for PEI phase. Enable CryptHkdf for SMM phase. Update Readme.md Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Guomin Jiang <guomin.jiang@intel.com> Cc: Nishant C Mistry <nishant.c.mistry@intel.com> Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Nishant C Mistry <nishant.c.mistry@intel.com> Signed-off-by: Judah Vang <judah.vang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* DynamicTablesPkg: Allow for specified CPU namesJeff Brasen2022-12-193-11/+43
| | | | | | | | | | | | | | | Allow object to specify the name of processor and processor container nodes and the UID of processor containers. This allows these to be more accurately referenced from other tables. For example for the _PSL method or the UID in the APMT table. The UID and Name for processor container may be different as if the intention is to set names as the corresponding affinity level the UID may need to be different if there are multiple levels of containers. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* UefiPayloadPkg: Move bdsdxe.inf from DXEFV to BDSFVMarsX Lin2022-12-192-6/+33
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4196 Since UefiPayload had supported multiple fv, move bdsdxe.inf to new firmware volume and modify the script of UniversalPayloadPkgBuild.py to support bdsdxe fv in elf file Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Reviewed-by: James Lu <james.lu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: MarsX Lin <marsx.lin@intel.com>
* MdeModulePkg: Supporting S3 in 64bit PEIKuo, Ted2022-12-193-13/+22
| | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4195 Transfer from DXE to OS waking vector by calling SwitchStack() when both are in the same execution mode. Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Cc: Chinni B Duggapu <chinni.b.duggapu@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com>
* UefiCpuPkg: Supporting S3 in 64bit PEIKuo, Ted2022-12-194-57/+117
| | | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4195 1.Updated the GDT table in VTF0 to align with the one in S3Resume2Pei. By doing so can simplify the changes to enable S3 in 64bit PEI. 2.Use SwitchStack() between PEI and SMM in S3 resume path when both are in the same execution mode. 3.Transfer from PEI to OS waking vector by calling SwitchStack() when both are in the same execution mode. 4.Removed the debug assertion in S3Resume.c to support 64bit PEI. Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Cc: Chinni B Duggapu <chinni.b.duggapu@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com>
* Maintainers: Update OvmfPkg/IoMmuDxeMin M Xu2022-12-181-1/+1
| | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4171 AmdSevIoMmu.* is renamed as CcIoMmu*. The related section in Maintainers.txt should be updated as well. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Erdem Aktas <erdemaktas@google.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
* OvmfPkg/IoMmuDxe: Add SEV support for reserved shared memoryTom Lendacky2022-12-182-53/+83
| | | | | | | | | | | | | | Add support to use the reserved shared memory within the IoMmu library. This improves boot times for all SEV guests, with SEV-SNP benefiting the most as it avoids the page state change call to the hypervisor. Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Min Xu <min.m.xu@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Jiewen Yao <Jiewen.yao@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
* OvmfPkg/IoMmuDxe: Rename AmdSevIoMmu to CcIoMmuMin M Xu2022-12-184-5/+4
| | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4171 IoMmuDxe once was designed to support DMA operation when SEV is enabled. After TDX is enabled in IoMmuDxe, some files' name in IoMmuDxe need to be more general. So this patch rename: AmdSevIoMmu.h -> CcIoMmu.h AmdSevIoMmu.c -> CcIoMmu.c Accordingly there are some udates in IoMmuDxe.c and IoMmuDxe.inf. Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
* OvmfPkg/IoMmuDxe: Reserve shared memory region for DMA operationMin M Xu2022-12-184-71/+716
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4171 A typical QEMU fw_cfg read bytes with IOMMU for td guest is that: (QemuFwCfgReadBytes@QemuFwCfgLib.c is the example) 1) Allocate DMA Access buffer 2) Map actual data buffer 3) start the transfer and wait for the transfer to complete 4) Free DMA Access buffer 5) Un-map actual data buffer In step 1/2, Private memories are allocated, converted to shared memories. In Step 4/5 the shared memories are converted to private memories and accepted again. The final step is to free the pages. This is time-consuming and impacts td guest's boot perf (both direct boot and grub boot) badly. In a typical grub boot, there are about 5000 calls of page allocation and private/share conversion. Most of page size is less than 32KB. This patch allocates a memory region and initializes it into pieces of memory with different sizes. A piece of such memory consists of 2 parts: the first page is of private memory, and the other pages are shared memory. This is to meet the layout of common buffer. When allocating bounce buffer in IoMmuMap(), IoMmuAllocateBounceBuffer() is called to allocate the buffer. Accordingly when freeing bounce buffer in IoMmuUnmapWorker(), IoMmuFreeBounceBuffer() is called to free the bounce buffer. CommonBuffer is allocated by IoMmuAllocateCommonBuffer and accordingly freed by IoMmuFreeCommonBuffer. This feature is tested in Intel TDX pre-production platform. It saves up to hundreds of ms in a grub boot. Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
* OvmfPkg: Add reference to new build instructionsMichael Kubacki2022-12-162-1/+7
| | | | | | | | | | | | | | | | | Adds a reference to the new build instructions on the TianoCore wiki that currently describe building with containers and Stuart. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
* EmulatorPkg: Add reference to new build instructionsMichael Kubacki2022-12-161-0/+3
| | | | | | | | | | | | | | Adds a reference to the new build instructions on the TianoCore wiki that currently describe building with containers and Stuart. Cc: Andrew Fish <afish@apple.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
* BaseTools: Add reference to new build instructionsMichael Kubacki2022-12-161-3/+10
| | | | | | | | | | | | | | | Adds a reference to the new build instructions on the TianoCore wiki that currently describe building with containers and Stuart. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
* ArmVirtPkg: Add reference to new build instructionsMichael Kubacki2022-12-161-0/+3
| | | | | | | | | | | | | | | | Adds a reference to the new build instructions on the TianoCore wiki that currently describe building with containers and Stuart. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
* .pytool/Readme.md: Add reference to new build instructionsMichael Kubacki2022-12-161-35/+17
| | | | | | | | | | | | Adds a reference to the new build instructions on the TianoCore wiki that currently describe building with containers and Stuart. Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
* OvmfPkg/AcpiPlatformDxe: Differentiate TDX case for Cloud HypervisorSebastien Boeuf2022-12-166-1/+105
| | | | | | | | | | | | Rely on CcProbe() to identify when running on TDX so that ACPI tables can be retrieved differently for Cloud Hypervisor. Instead of relying on the PVH structure to find the RSDP pointer, the tables are individually passed through the HOB. Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com> Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> Reviewed-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* OvmfPkg/PlatformInitLib: Transfer GUID Extension HOBSebastien Boeuf2022-12-161-0/+5
| | | | | | | | | | This is required for passing the ACPI tables from the VMM up to the guest OS. They are transferred through this GUID extension. Signed-off-by: Jiaqi Gao <jiaqi.gao@intel.com> Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> Reviewed-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* OvmfPkg/PlatformInitLib: Differentiate TDX case for Cloud HypervisorSebastien Boeuf2022-12-161-1/+4
| | | | | | | | | | | Rely on the CcProbe() function to identify when running on TDX. This allows the firmware to follow a different codepath for Cloud Hypervisor, which means it doesn't rely on PVH to find out about memory below 4GiB. instead it falls back onto the CMOS to retrieve that information. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> Reviewed-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* OvmfPkg/AmdSev/SecretDxe: Allocate secret location as EfiACPIReclaimMemoryDov Murik2022-12-151-6/+16
| | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4186 Commit 079a58276b98 ("OvmfPkg/AmdSev/SecretPei: Mark SEV launch secret area as reserved") marked the launch secret area itself (1 page) as reserved so the guest OS can use it during the lifetime of the OS. However, the address and size of the secret area held in the CONFIDENTIAL_COMPUTING_SECRET_LOCATION struct are declared as STATIC in OVMF (in AmdSev/SecretDxe); therefore there's no guarantee that it will not be written over by OS data. Fix this by allocating the memory for the CONFIDENTIAL_COMPUTING_SECRET_LOCATION struct with the EfiACPIReclaimMemory memory type to ensure the guest OS will not reuse this memory. Fixes: 079a58276b98 ("OvmfPkg/AmdSev/SecretPei: Mark SEV launch secret ...") Signed-off-by: Dov Murik <dovmurik@linux.ibm.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: Validate SEC's GHCB pageAdam Dunlap2022-12-151-13/+27
| | | | | | | | | | | | | | | | | | | | | When running under SEV-ES, a page of shared memory is allocated for the GHCB during the SEC phase at address 0x809000. This page of memory is eventually passed to the OS as EfiConventionalMemory. When running SEV-SNP, this page is not PVALIDATE'd in the RMP table, meaning that if the guest OS tries to access the page, it will think that the host has voilated the security guarantees and will likely crash. This patch validates this page immediately after EDK2 switches to using the GHCB page allocated for the PEI phase. This was tested by writing a UEFI application that reads to and writes from one byte of each page of memory and checks to see if a #VC exception is generated indicating that the page was not validated. Fixes: 6995a1b79bab ("OvmfPkg: Create a GHCB page for use during Sec phase") Signed-off-by: Adam Dunlap <acdunlap@google.com> Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
* OvmfPkg/SecTpmMeasurementLib: Fix the mapping error of PCR and RTMR indexMin M Xu2022-12-151-4/+3
| | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4179 TDVF has the feature to do RTMR measurement in SEC phase. In the same time it builds a GUID hob which carries the hash value of the measurement so that in DXE phase a td event can be created based on this GUID Hob. There is a mapping error between TPM PCR index and RTMR index according to UEFI 2.10. That PCR6 is missing in the mapping. This patch fixes this issue. Cc: Erdem Aktas <erdemaktas@google.com> [ruleof2] Cc: James Bottomley <jejb@linux.ibm.com> [jejb] Cc: Jiewen Yao <jiewen.yao@intel.com> [jyao1] Cc: Tom Lendacky <thomas.lendacky@amd.com> [tlendacky] Cc: Arti Gupta <ARGU@microsoft.com> Signed-off-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* OvmfPkg/TdTcg2Dxe: Fix the mapping error between PCR index and MR indexMin M Xu2022-12-151-29/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4179 According to UEFI Spec 2.10 it is supposed to return the mapping from PCR index to CC MR index: // // In the current version, we use the below mapping for TDX: // // TPM PCR Index | CC Measurement Register Index | TDX-measurement register // ----------------------------------------------------------------------- // 0 | 0 | MRTD // 1, 7 | 1 | RTMR[0] // 2~6 | 2 | RTMR[1] // 8~15 | 3 | RTMR[2] In the current implementation TdMapPcrToMrIndex returns the index of RTMR, not the MR index. After fix the spec unconsistent, other related codes are updated accordingly. 1) The index of event log uses the input MrIndex. 2) MrIndex is decreated by 1 before it is sent for RTMR extending. Cc: Erdem Aktas <erdemaktas@google.com> [ruleof2] Cc: James Bottomley <jejb@linux.ibm.com> [jejb] Cc: Jiewen Yao <jiewen.yao@intel.com> [jyao1] Cc: Tom Lendacky <thomas.lendacky@amd.com> [tlendacky] Cc: Arti Gupta <ARGU@microsoft.com> Reported-by: Arti Gupta <ARGU@microsoft.com> Signed-off-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* OvmfPkg/TdTcg2Dxe: Fix incorrect protocol and structure versionMin M Xu2022-12-151-2/+2
| | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4184 According to the Uefi spec 2.10 Section 38.2.2. EFI_CC_MEASUREMENT_PROTOCOL.GetCapability, the minor version of StructureVersion and ProtocolVersion should be 0. Cc: Erdem Aktas <erdemaktas@google.com> [ruleof2] Cc: James Bottomley <jejb@linux.ibm.com> [jejb] Cc: Jiewen Yao <jiewen.yao@intel.com> [jyao1] Cc: Tom Lendacky <thomas.lendacky@amd.com> [tlendacky] Cc: Arti Gupta <ARGU@microsoft.com> Reported-by: Arti Gupta <ARGU@microsoft.com> Signed-off-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* UnitTestFrameworkPkg/UnitTestLib: Print expected Status on ASSERT faildevel@edk2.groups.io2022-12-141-1/+1
| | | | | | | | | Update the UnitTestAssertStatusEqual error message to print out the expected value in addition to the seen value. Signed-off-by: Jeshua Smith <jeshuas@nvidia.com> Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* OvmfPkg/QemuFwCfgLib: remove mQemuFwCfgSupported + mQemuFwCfgDmaSupportedGerd Hoffmann2022-12-143-7/+45
| | | | | | | | | | Remove global variables, store the state in PlatformInfoHob instead. Probing for fw_cfg happens on first use, at library initialization time the Hob might not be present yet. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/QemuFwCfgLib: rewrite fw_cfg probeGerd Hoffmann2022-12-142-61/+41
| | | | | | | | | | Move the code to a new QemuFwCfgProbe() function. Use direct Io*() calls instead of indirect QemuFwCfg*() calls to make sure we don't get recursive calls. Also simplify CC guest detection. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/DebugLibIoPort: use Rom version for PEIGerd Hoffmann2022-12-147-13/+13
| | | | | | | | This variant does not use global variables. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: remove mFeatureControlValueGerd Hoffmann2022-12-144-14/+36
| | | | | | | | | | | Use PlatformInfoHob->FeatureControlValue instead. OnMpServicesAvailable() will find PlatformInfoHob using GetFirstGuidHob() and pass a pointer to the WriteFeatureControl callback. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: remove mPlatformInfoHobGerd Hoffmann2022-12-142-36/+39
| | | | | | | | | Stop using the mPlatformInfoHob global variable. Let BuildPlatformInfoHob() allocate and return PlatformInfoHob instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: Verification: stop using mPlatformInfoHobGerd Hoffmann2022-12-141-7/+9
| | | | | | | | | | Stop using the mPlatformInfoHob global variable in S3Verification() and Q35BoardVerification() functions. Pass a pointer to the PlatformInfoHob instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: NoExec: stop using mPlatformInfoHobGerd Hoffmann2022-12-141-4/+5
| | | | | | | | | Stop using the mPlatformInfoHob global variable in NoexecDxeInitialization() function. Pass a pointer to the PlatformInfoHob instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: MemTypeInfo: stop using mPlatformInfoHobGerd Hoffmann2022-12-143-4/+4
| | | | | | | | | Stop using the mPlatformInfoHob global variable in MemTypeInfoInitialization() function. Pass a pointer to the PlatformInfoHob instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: PeiMemory: stop using mPlatformInfoHobGerd Hoffmann2022-12-143-20/+20
| | | | | | | | | | Stop using the mPlatformInfoHob global variable in PublishPeiMemory() and GetPeiMemoryCap() functions. Pass a pointer to the PlatformInfoHob instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei Q35 SMM helpers: stop using mPlatformInfoHobGerd Hoffmann2022-12-143-14/+14
| | | | | | | | | | | Stop using the mPlatformInfoHob global variable in Q35TsegMbytesInitialization() and Q35SmramAtDefaultSmbaseInitialization() ) functions. Pass a pointer to the PlatformInfoHob instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: PeiFv: stop using mPlatformInfoHobGerd Hoffmann2022-12-143-5/+5
| | | | | | | | | Stop using the mPlatformInfoHob global variable in PeiFvInitialization() function. Pass a pointer to the PlatformInfoHob instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* OvmfPkg/PlatformPei: AmdSev: stop using mPlatformInfoHobGerd Hoffmann2022-12-143-9/+9
| | | | | | | | | | Stop using the mPlatformInfoHob global variable in AmdSevInitialize() and AmdSevEsInitialize() functions. Pass a pointer to the PlatformInfoHob instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* DynamicTablesPkg: SSDT _LPI revision is incorrectJeff Brasen2022-12-141-1/+1
| | | | | | | | | _LPI Revision should be 0 per the ACPI 6.5 specification. "The revision number of the _LPI object. Current revision is 0." Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/UnitTestHostBaseLib: Remove HOST_APPLICATION limitationLiu, Zhiguang2022-12-141-3/+6
| | | | | | | | | | | Remove HOST_APPLICATION limitation for UnitTestHostBaseLib, so that this library can be used as BaseLib by Emulator. Also, add some missing files Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* UnitTestFrameworkPkg: Modify APIs in UnitTestPersistenceLibLiu, Zhiguang2022-12-144-18/+36
| | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4183 UnitTestPersistenceLib now consumes private struct definition. Modify APIs in UnitTestPersistenceLib to make it easy to become a public library. Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Michael Kubacki <mikuback@linux.microsoft.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* MdePkg/BaseCpuLib: Remove assembly for CpuFlushTlbLiu, Zhiguang2022-12-145-97/+5
| | | | | | | | | | | | For different compilers, both IA32 and X64 can use Ia32/CpuFlushTlbGcc.c, which is C code (no inline assembly code). To simplify, remove other assemly file for CpuFlushTlb, and rename Ia32/CpuFlushTlbGcc.c to X86CpuFlushTlb.c. Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* Maintainers.txt: Change Anthony's github idAnthony PERARD2022-12-131-1/+1
| | | | | Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* ShellPkg/Shell: Do not set end device path if already endMichael D Kinney2022-12-131-1/+7
| | | | | | | | | | | | | | | | | Update Shell Protocol EfiShellGetMapFromDevicePath() to not set the end if the device path if it is already an end of entire device path. This removes a write operation that can cause failures if the Device Path Protocol is mapped to read-only memory. In general Device Path Protocols should not be modified unless the API explicitly states that the device path is modified. Cc: Ard Biesheuvel <ardb@kernel.org> Cc: Ray Ni <ray.ni@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* ShellPkg/AcpiView: APMT ParserJeff Brasen2022-12-135-0/+130
| | | | | | | | | | Add a new parser for the Arm Performance Monitoring Unit Table. The APMT table describes the properties of PMU support implemented by components in an Arm-based system. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/IndustryStandard: add definitions for ACPI APMTJeff Brasen2022-12-132-0/+74
| | | | | | | | | | This adds #defines and struct typedefs for the various node types in the ACPI Arm Performance Monitoring Unit (APMT) table. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-18 02:39:46 +0000