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* pip: bump edk2-pytool-library from 0.21.8 to 0.21.10dependabot/pip/edk2-pytool-library-0.21.10dependabot[bot]2024-08-081-1/+1
| | | | | | | | | | | | | | Bumps [edk2-pytool-library](https://github.com/tianocore/edk2-pytool-library) from 0.21.8 to 0.21.10. - [Release notes](https://github.com/tianocore/edk2-pytool-library/releases) - [Commits](https://github.com/tianocore/edk2-pytool-library/compare/v0.21.8...v0.21.10) --- updated-dependencies: - dependency-name: edk2-pytool-library dependency-type: direct:production update-type: version-update:semver-patch ... Signed-off-by: dependabot[bot] <support@github.com>
* DynamicTablesPkg: Add parser for Tpm2 CM objectDat Mach2024-08-081-0/+13
| | | | | | | Update the CM Object parser to add support for parsing the CM_ARM_TPM2_INTERFACE_INFO object. Signed-off-by: Dat Mach <dmach@nvidia.com>
* DynamicTablesPkg: Add HexDump for CM Object parserDat Mach2024-08-082-81/+53
| | | | | | | | | Add helper function HexDump for printing hex dump of CM Object fields. Also merge multiple flavors of PrintCharX into one function PrintChars by using the field length. Signed-off-by: Dat Mach <dmach@nvidia.com>
* DynamicTablesPkg: ACPI TPM2 generatorDat Mach2024-08-086-0/+479
| | | | | | | Generate ACPI TPM2 table using the information obtained from Tpm2InterfaceInfo CM object. Signed-off-by: Dat Mach <dmach@nvidia.com>
* MdePkg: Tpm2Acpi.h: Max size for Parameters fieldDat Mach2024-08-081-0/+4
| | | | | | | Define macro for the max size of the Start Method Specific Paramemeters field. Signed-off-by: Dat Mach <dmach@nvidia.com>
* NetworkPkg/DxeHttpLib: Support HTTP CONNECT message in Tx path.Saloni Kasbekar2024-08-071-0/+5
| | | | | | Add HTTP CONNECT message support in HttpGenRequestMessage() Signed-off-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
* RedfishPkg: Allow deletion of the bootstrap accountIgor Kulchytskyy2024-08-079-88/+999
| | | | | | | | | | | | | Extending the Redfish Credential protocol to allow Redfish Clients to be registered/unregistered for tracking their end of work and delete a bootstrap account when all registered Redfish clients finish their communication with Redfish service. Redfish Http module also was updated to register/unregister clients on Redfish Service creation/stop event. Cc: Abner Chang <abner.chang@amd.com> Cc: Nickle Wang <nicklew@nvidia.com> Signed-off-by: Igor Kulchytskyy <igork@ami.com>
* MdePkg/BaseLib: Add CRC16 CCITT False Implementation.kuqin122024-08-062-0/+86
| | | | | | | | | | | | | | This change is added to incorporate basic implementation for CRC16-CCITT-FALSE algorithm. This function is useful for providing CRC16 value used in other data structures that requires CRC16 value that complies with JEDEC SPD requirements, i.e. BDAT table. The lookup table is inherited from `https://crccalc.com/` and the result values are also compared against this site. Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
* MdeModulePkg ConPlatform: Support IAD-style USB input devices.John Schock2024-08-061-3/+18
| | | | | | | | | | | | | | | | | | Some multi-function input devices (e.g. combo keyboard and mouse) present as IAD-style devices (https://www.usb.org/defined-class-codes, https://learn.microsoft.com/en-us/windows-hardware/drivers/usbcon/usb-interface-association-descriptor). Historically, multi-function devices would report a DeviceClass of 0, indicating that interface matching should be done on the interface descriptor rather than the global device descriptor. IAD-style devices us DeviceClass of 0xEF, so they don't match MatchUsbClass() for keyboard (DeviceClass=3, SubClass=1, Proto=1). If they are treated as if they had a DeviceClass of zero, which is more traditional for legacy multi-function devices, then the interface descriptors are used instead and these types of devices will "just work" without needing to add a custom USB device path to ConIn. Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
* .github/request-reviews.yml: Use GitHub App authenticationMichael Kubacki2024-08-061-1/+8
| | | | | | | | | | | | Since the edk2 repository is owned by an organization, the default GitHub token will not be able to access the collaborator list. Therefore, a GitHub App with `metadata:read` permission will be used to grant access to that REST API. This is used in GitHub.py when it makes the `repo_gh.get_collaborators()` call that resolves to the `/repos/{owner}/{repo}/collaborators` GitHub REST API. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Move workflow Py code to fileMichael Kubacki2024-08-052-63/+99
| | | | | | | | | To make the Python code used within the action more mantainable over time, it is moved to a standalone script in .github/scripts. No functional changes are made to the workflow itself. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Formatting (non-functional)Michael Kubacki2024-08-052-10/+26
| | | | | | Updates code for PEP8 formatting by using the Black code formatter. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Improve doc and dbg messagesMichael Kubacki2024-08-052-6/+25
| | | | | | | Adds additional documentation and cleans up debug messages printed to GitHub workflow output (available in the GitHub Actions pane). Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Only post non-collab message onceMichael Kubacki2024-08-051-24/+34
| | | | | | | | | | Enhances the flow that adds a comment on a PR if a non-collaborator is in the reviewer list by checking if a comment was previously left on the PR. If it was for the same set of non-collaborators, another comment is not created. If a new non-collaborator is discovered, the message will be left identifying that new user account. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Add non-collab admin notificationMichael Kubacki2024-08-051-5/+18
| | | | | | | | | | | | If a non-collaborator is part of the reviewer list, an admin needs to be notified so they can be removed. This change finds the list of admins for the repo and notifies them in the comment left on the PR describing the list of non-collaborator users. The message itself is cleaned up to show only the non-collaborator users for ease of identification. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Update PR reviewer exclusionMichael Kubacki2024-08-052-10/+43
| | | | | | | | | | | | | | | | | | | Updates logic to: - Not request reviews from reviewers that have already left a review on the PR. Previously, the reviewers review (e.g. approval) would remain on the PR, but they would be notified on each change to the PR. This approach follows the expected notification process for requesting reviews which is one time. Maintainers and reviewers can set up their own notifications for more granular updates on PR activity separately. - Add the collaborator reviewers if a reviewer(s) is found to not be a collaborator. This is an improvement to today's behavior which is to not add any reviewers if a single reviewer is not a collaborator of the repo. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Removed unused functionalityMichael Kubacki2024-08-052-28/+0
| | | | | | | Removed the `download_gh_file()` function which is no longer needed with sparse checkout. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Switch to PyGithubMichael Kubacki2024-08-053-75/+106
| | | | | | | | | | | Uses PyGithub for GitHub interactions instead of the GitHub REST API directly. This simplifies the code, improves error handling and robustness, and lets the PyGithub project abstract GitHub REST API changes that may occur over time. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Switch to GitPythonMichael Kubacki2024-08-053-31/+10
| | | | | | | | | Uses `GitPython` instead of invoking the git executable directly. This has the benefit of improving code readability and less support code for binary interaction. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Cache PIP modulesMichael Kubacki2024-08-052-2/+16
| | | | | | | | | | | | | | | | | | | - Optimizes and makes the PIP module installation process for the workflow more robust by caching the pip modules used so the only time the workflow needs to reach to PyPi is when new PIP modules are published. - Improves long term stability by locking the major versions for PIP modules in the workflow. This is to reduce overall maintenance over time to automatically pick up new versions while also not being broken in the process. - Removes edk2-pytool-extensions as it is not used. The new "requirements.txt" file is used to lock versions and support the caching step which depends on a requirements file. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* .github/request-reviews.yml: Use sparse checkoutMichael Kubacki2024-08-051-1/+9
| | | | | | | | Optimizes the repository checkout step from an average time of 21 to 1 second by performing a sparse checkout of only the file paths needed for the workflow run at a fetch depth of 1. Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
* UefiCpuPkg: rename and simplify IsAddressValid functionDun Tan2024-08-053-34/+31
| | | | | | | | | | | | | | | In this commit, we rename IsAddressValid function to IsSmmProfilePFAddressAbove4GValid and remove unneeded code logic in it. Currently, IsAddressValid is only used in the function RestorePageTableAbove4G. It's used to identify if a SMM profile PF address above 4G is inside mProtectionMemRange or not. So we can remove the PcdCpuSmmProfileEnable FALSE condition related code logic in it. Also the function name is change to be more detailed and specific. Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiCpuPkg: remove unneeded code in SmmProfilePFHandlerDun Tan2024-08-051-8/+0
| | | | | | | | | | | | | | | | | | | | | | Remove unneeded calling of SmmProfileMapPFAddress () in SmmProfileMapPFAddress if SMM profile is not started. Previously, before SMM profile is started at ReadyToLock, SMM page table only covers [0, 4G]. The access to the range above 4G will cause PF. SmmProfileMapPFAddress is needed here to map the PF address before SMM profile is started. Now we always create full mapping SMM page table in the SmmInitPageTable(). When SMM profile is enabled, before SMM profile is started at ReadyToLock, SMM page table covers [0, MaxSupportedPhysicalAddress]. So the case that access to the range above 4G causes PF won't happen anymore. Then we can remove the calling of SmmProfileMapPFAddress before SMM profile is started. Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiCpuPkg: rename the SmiDefaultPFHandler functionDun Tan2024-08-057-166/+221
| | | | | | | | Rename SmiDefaultPFHandler to SmiProfileMapPFAddress and move the implementation to SmmProfileArch.c since it only will be used when SMM profile is enabled. Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiCpuPkg: Remove duplicate code in SmiPfHandlerDun Tan2024-08-052-12/+6
| | | | | | | | | | | | | | In this commit, we remove duplicate CpuDeadLoop in SmiPfHandler where mCpuSmmRestrictedMemoryAccess is TRUE. With last commit, we always call CpuDeadLoop if SMM profile is disabled. Then the CpuDeadLoop calling for the condition (mCpuSmmRestrictedMemoryAccess && IsSmmCommBufferForbiddenAddress (PFAddress)) is not needed anymore. We also modify the IA32 related code to be aligned with X64. Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiCpuPkg:CpuDeadLoop in SmiPFHandler if SMM profile is disabledDun Tan2024-08-052-3/+4
| | | | | | | | | | | | | | | | | | | | Always call CpuDeadLoop() in SmiPFHandler if SMM profile is disabled. Previously, when PcdCpuSmmRestrictedMemoryAccess is FALSE, SMM page table only covers [0, 4g]. When code access to range above 4g happens, SmiPFHandler will map the accessed not-present range to present. After we always create full mapping page table, the dynamic page table creation logic is only needed when SMM profile is enabled. So we use CpuDeadLoop() in SmiPFHandler to cover the all the PF exception when SMM profile is disabled Considering that [0, 4g] is always mapped in SMM page table, we also modify the IA32 SmiPFHandler code to be aligned with X64 code. Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiCpuPkg: remove unnecessary manipulation for smm page tableDun Tan2024-08-051-17/+17
| | | | | | | | | | | | | | | | | | | In this commit, we only set some special bits in paging entry content when SMM profile is enabled. Previously, we set Pml4Entry sub-entries number and set the IA32_PG_PMNT bit for first 4 PdptEntry. It's to make sure that the paging structures cover [0, 4G] won't be reclaimed during dynamic page table creation. In last commit, we always create full mapping SMM page table regardless PcdCpuSmmRestrictedMemoryAccess. With this change, we only need to dynamic create SMM page table in smm PF handler when PcdCpuSmmProfileEnable is TRUE. So the sub-entries number and IA32_PG_PMNT bit in paging entry is only needed to set when PcdCpuSmmProfileEnable is TRUE. Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiCpuPkg: always create full mapping SMM page tableDun Tan2024-08-052-10/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In this commit, we always create full mapping SMM page table in SmmInitPageTable regardless the value of the PcdCpuSmmRestrictedMemoryAccess. Previously, when PcdCpuSmmRestrictedMemoryAccess is false, only [0, 4G] is mapped in smm page table in SmmInitPageTable. If the range above 4G is accessed in SMM, SmiPFHandler will create new paging entry for the accessed range. To simplify the code logic, we also create full mapping SMM page table in SmmInitPageTable when PcdCpuSmmRestrictedMemoryAccess is false. Then we don't need to dynamic create paging entry for range above 4G except SMM profile is enabled. The comparison of SMM page table before and after the change under different configuration are listed here: 1.PcdCpuSmmRestrictedMemoryAccess is TRUE No change 2.PcdCpuSmmRestrictedMemoryAccess is FALSE and PcdCpuSmmProfileEnable is TRUE Before: the SMM page table when ReadyToLock covers 1. SMRAM range 2.SMM profile range 3. MMIO range below 4G After: the SMM page table when ReadyToLock covers 1. SMRAM range 2.SMM profile range 3. MMIO range below 4G and above 4G 3.PcdCpuSmmRestrictedMemoryAccess is FALSE and PcdCpuSmmProfileEnable is FALSE Before: the SMM page table when ReadyToLock covers [0, 4G] After: the SMM page table when ReadyToLock covers [0, MaxSupportPhysicalAddress] Signed-off-by: Dun Tan <dun.tan@intel.com>
* UefiCpuPkg: Revert "UefiCpuPkg/PiSmmCpuDxeSmm: Fix system..."Dun Tan2024-08-051-30/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit bef0d333dc "UefiCpuPkg/PiSmmCpuDxeSmm: Fix system hang when SmmProfile enable". The commit bef0d333dc was added to modify the code logic in InitPaging() to fix a code assert issue. Previously, the root cause of this issue is that we try to only set NX attribute for not-present MMIO range above 4G when SMM profile feature is enabled, which is not allowed by CpuPageTableLib. But after we always create full mapping initial SMM page table in the next commit, this code assert issue won't happen anymore since MMIO range above 4g will also be present in SMM page table before InitPaging(). Meanwhile another issue was introduced by commit bef0d333dc: In the entrypoint of PiSmmCpuDxe driver, we will set some pages in stack range as not-present in SMM page table if PcdCpuSmmStackGuard or PcdControlFlowEnforcementPropertyMask is TRUE. But in commit bef0d333dc, all SMRAM range are set to present in InitPaging() if SMM profile is enabled. Then the stack guard and shadow stack features do not work anymore. So let's revert the commit "UefiCpuPkg/PiSmmCpuDxeSmm: Fix system hang when SmmProfile enable" Signed-off-by: Dun Tan <dun.tan@intel.com>
* BaseTools/Capsule: Support Different Hash Algorithm for Payload DigestJason1 Lin2024-08-051-14/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4821 - The capsule payload digest got hardcoded inside the GenerateCapsule script as "sha256". - It would be hard for the caller to change the supported hash algorithm which supported on OpenSSL or Windows signtool program and platform. - Capsule payload digest signed data is followed by the PKCS#7 standard, in EDK-II CryptoPkg "Pkcs7Verify ()" is supported to validate with several hash algorithms naturally. (md5, sha1, sha256, sha384, and sha512) - Deliver below changes within this patch, (1) Introduce an optional argument "--hash-algorithm" to assign the caller expected one and leave the default value "sha256" to support the backward compatibility. (2) Add the double quotes to put the string of certificate's subject name inside it. (3) Set "Open" argument of "SignToolSubjectName" into "False". (4) Set "Convert" argument of "SignToolSubjectName: into "str". (5) Correct the actual name of the "--subject-name" flag. (6) Add back correct number of arguments for PayloadDescriptor class object initializing. Note: - Platform needs to support the correspond hash algorithm to validate the digital signature or the failure would be observed. - Set the md5 and sha1 algorithm as EOL based on the CryptoPkg supported table and reject the capsule creation. Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
* MdePkg /IoRemappingTable: Define additional IORT SMMUv3 node flags.joe2024-08-041-1/+2
| | | | | | | | | | | | | | | | | | | | | The flag for HTTU override in an SMMUv3 node in the IORT table is defined in MdePkg/Include/IndustryStandard/IoRemappingTable.h as a single bit. BIT0 or BIT1. The implementation of this field is actually two bits, with the following mapings: 0b0000: Hardware update of the Access flag and dirty state are not supported. 0b0001: Support for hardware update of the Access flag for Block and Page descriptors. 0b0010: As 0b0001, and adds support for hardware update of the Access flag for Block and Page descriptors. Hardware update of dirty state is supported. Referenced in Arm® System Memory Management Unit Architecture Specification SMMU architecture version 3: https://documentation-service.arm.com/static/63d7a2d5e4378a55c5e045b9 Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
* BaseTools/WinRcPath: Improve Performance.Joey Vagedes2024-08-041-10/+26
| | | | | | | | | | | | | | | | WinRcPath generally takes about 2 seconds to run, due to calling multiple .bat files behind the scenes. This change reduces this time to ~0 seconds due to the following changes: 1. It will attempt to load the path from the cache, which is located a $(WORKSPACE)/Conf/.rc_path. If the loading is a success and the rc_path still exists, it will use it. 2. If the cache did not exist, or the path provided by the cache does not exist, it will find the rc path via the .bat files. If that succeeds, it will write the path to the cache. Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
* OvmfPkg: Pass correct virtio-scsi request sizeSami Mujawar2024-08-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch at "1fc55a3933b0 OvmfPkg: Use heap memory for virtio-scsi request" modified the virtio-scsi request header memory to be allocated from the heap. In doing so the request structure header which was a local variable on the stack was converted to be a pointer. This required adjusting the size computation for the request header to reflect that the structure was changed to a pointer. Unfortunately, this was missed out in the call to VirtioAppendDesc() for enqueuing the request due to which only 8 bytes were being shared with the host instead of the size of the VIRTIO_SCSI_REQ structure which is 51 bytes. This resulted in the following error message to be printed by qemu: "qemu-system-<arch>: wrong size for virtio-scsi headers" and the virtio-scsi functionality degraded. Therefore, pass the correct size of the virtio-scsi request header when enqueuing the request. Reported-by: Aithal Srikanth <sraithal@amd.com> Tested-by: Aithal Srikanth <sraithal@amd.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Avoid use global variable in InitSmmS3Cr3Jiaxin Wu2024-08-026-20/+29
| | | | | | | This patch is to avoid use global variable in InitSmmS3Cr3. No function impact. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Clean redundant SmmS3Cr3 InitJiaxin Wu2024-08-023-8/+3
| | | | | | | | The SmmS3Cr3 is only used by S3Resume PEIM to switch CPU from 32bit to 64bit, it should be the CR3 for Non-SMM environment and init by InitSmmS3Cr3 function. No need set to SMM CR3. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: clean unused PCD for S3Jiaxin Wu2024-08-021-1/+0
| | | | | | | This patch is to clean the PcdCpuFeaturesInitOnS3Resume since it's unused after commit 077760fe Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
* DynamicTablesPkg/DynamicTableManagerDxe: Adds X64 GetAcpiTablePresenceInfoAbdul Lateef Attar2024-08-022-9/+7
| | | | | | | | | Adds X64 specific GetAcpiTablePresenceInfo() function, which checks for mandatory ACPI tables. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
* DynamicTablesPkg/AcpiFadtLib: Adds FADT X64 generatorAbdul Lateef Attar2024-08-027-50/+662
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4781 Updates FADT X64 generator to collect below configuration information and update the table accordingly. - SCI interrupt - SCI command - PM Block - GPE Block - PM Block 64-bit - GPE Block 64-bit - Sleep block - Reset block - Miscellaneous legacy information Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
* DynamicTablesPkg: Adds X64 namespace objectAbdul Lateef Attar2024-08-024-0/+72
| | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4781 Adds empty X64 namespace object for future use. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Iterate page table to find proper entryJiaxin Wu2024-08-021-16/+29
| | | | | | | | | | | Iterate through the page table to find the appropriate page table entry for page creation if one of the following cases is met: 1) StartBit > EndBit: The PageSize of current entry is bigger than the platform-specified PageSize granularity. 2) IA32_PG_P bit is 0 & IA32_PG_PS bit is not 0: The current entry is present and it's a non-leaf entry. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Remove assert check for PDE entry not existJiaxin Wu2024-08-021-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If 2MB-page is selected, PDE entry might exist, it's incorrect to assert it's not exist. Detailed see blow case analysis (it's similar case if address exceeds 4G): Assume the Default Page table has covered below 6M size range: [0000000000001000, 0000000000601000) Then, with PageTableMap API, below Page table entry will be created if 1G-page or 2M-page mode is selected: [0000000000001000, 0000000000002000) --> 4K [0000000000002000, 0000000000003000) --> 4K ... [00000000001FF000, 0000000000200000) --> 4k [0000000000200000, 0000000000400000) --> 2M [0000000000400000, 0000000000600000) --> 2M [0000000000600000, 0000000000601000) --> 4K Above will cover 2M aligned address (0000000000600000) in page table. If Page Fault happen by accessing 0000000000602000, need create the page entry: [0000000000602000, 0000000000603000) --> 4K But PDE entry has been created/existed in page table with 0 PS bit. So, this patch removes the assert check. The page table entry created will be the platform-specified PageSize granularity. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Check PDE entry exist or not before useJiaxin Wu2024-08-023-5/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Before the commit 701b5797 & 4ceefd6d, 2MB-page will be created to cover [0: 4G] by default if SmmProfile enabled, and it will be go through to change 2MB-page into 4KB-page during page table update (InitPaging). If so, there was no problem to assert PDE entry exist in the RestorePageTableBelow4G. But after above commits, PageTableMap API is used to create/update the page table, 1G-page will be the default page table mode, and only covers the limited address range. Those not covered ranges will be marked as non-present in 1g-page level address. If so, 2M-page address might not exist, it's incorrect to assert PDE entry exist in the RestorePageTableBelow4G. The correct behavior should check PDE entry exist or not, if not, PDE should be allocated and assigned to PDPTE. Note: RestorePageTableBelow4G () does not use 1G page size entries for the creation of new pages, maintaining consistency with the behavior of the original code. The purpose of this patch is to ensure that a Page Directory Entry (PDE) exists prior to its usage. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
* UefiCpuPkg/PiSmmCpuDxeSmm: Enable single step after SmmProfile startJiaxin Wu2024-08-022-5/+11
| | | | | | | | | | | | | There is a bug in the existing code: the single step is always enabled once the Page Fault (#PF) occurs, but it is only disabled when the SMM Profile feature actually starts (see DebugExceptionHandler). If the SMM Profile feature has not been started, this will result in the single-step mode remaining enabled if a Page Fault occurs. This patch is to enable the single-step debugging mode by setting the Trap Flag only after SmmProfile feature starts. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
* DynamicTablesPkg: Fix some spelling mistakes found by cspellRebecca Cran2024-08-012-2/+2
| | | | | | | | | | | When cspell is installed (via `npm install cspell`), CI checks for spelling mistakes. There are currently a very large number of them: some are genuine mistakes while others are words or acryonyms that cspell doesn't know. Fix a few of the misspellings in DynamicTablesPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* EmbeddedPkg: Fix some spelling mistakes found by cspellRebecca Cran2024-08-014-4/+4
| | | | | | | | | | | When cspell is installed (via `npm install cspell`), CI checks for spelling mistakes. There are currently a very large number of them: some are genuine mistakes while others are words or acryonyms that cspell doesn't know. Fix a few of the misspellings in EmbeddedPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* UefiPayloadPkg: Fix some spelling mistakes found by cspellRebecca Cran2024-08-015-7/+7
| | | | | | | | | | | When cspell is installed (via `npm install cspell`), CI checks for spelling mistakes. There are currently a very large number of them: some are genuine mistakes while others are words or acryonyms that cspell doesn't know. Fix a few of the misspellings in UefiPayloadPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* RedfishPkg: Fix some spelling mistakes found by cspellRebecca Cran2024-08-013-6/+6
| | | | | | | | | | | When cspell is installed (via `npm install cspell`), CI checks for spelling mistakes. There are currently a very large number of them: some are genuine mistakes while others are words or acryonyms that cspell doesn't know. Fix a few of the misspellings in RedfishPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* MdePkg: Fix some spelling mistakes found by cspellRebecca Cran2024-08-015-32/+32
| | | | | | | | | | | When cspell is installed (via `npm install cspell`), CI checks for spelling mistakes. There are currently a very large number of them: some are genuine mistakes while others are words or acryonyms that cspell doesn't know. Fix a few of the misspellings in MdePkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* ArmVirtPkg: Fix some spelling mistakes found by cspellRebecca Cran2024-08-012-15/+15
| | | | | | | | | | | When cspell is installed (via `npm install cspell`), CI checks for spelling mistakes. There are currently a very large number of them: some are genuine mistakes while others are words or acryonyms that cspell doesn't know. Fix a few of the misspellings in ArmVirtPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
* ArmPlatformPkg: Fix some spelling mistakes found by cspellRebecca Cran2024-08-013-5/+5
| | | | | | | | | | | When cspell is installed (via `npm install cspell`), CI checks for spelling mistakes. There are currently a very large number of them: some are genuine mistakes while others are words or acryonyms that cspell doesn't know. Fix a few of the misspellings in ArmPlatformPkg. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-21 21:00:15 +0000