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* pip: bump edk2-pytool-library from 0.14.1 to 0.19.0dependabot/pip/edk2-pytool-library-0.19.0dependabot[bot]2023-10-111-1/+1
| | | | | | | | | | | | | | Bumps [edk2-pytool-library](https://github.com/tianocore/edk2-pytool-library) from 0.14.1 to 0.19.0. - [Release notes](https://github.com/tianocore/edk2-pytool-library/releases) - [Commits](https://github.com/tianocore/edk2-pytool-library/compare/v0.14.1...v0.19.0) --- updated-dependencies: - dependency-name: edk2-pytool-library dependency-type: direct:production update-type: version-update:semver-minor ... Signed-off-by: dependabot[bot] <support@github.com>
* RedfishPkg: Use base version SortLib for the specific modulesAbner Chang2023-10-112-3/+8
| | | | | | | | | | | | | | | | | | BZ #: 4566 Update Redfish modules to use the small footprint version of base SortLib by the means of module scoped subelement <LibraryClass>. With this the platform level SortLib (full version) is not impacted if Redfish.dsc.inc is included in platform DSC. Signed-off-by: Abner Chang <abner.chang@amd.com> Cc: Nickle Wang <nicklew@nvidia.com> Cc: Igor Kulchytskyy <igork@ami.com> Cc: Nhi Pham <nhi@os.amperecomputing.com> Reviewed-by: Nickle Wang <nicklew@nvidia.com> Reviewed-by: Nhi Pham <nhi@os.amperecomputing.com> Tested-by: Nhi Pham <nhi@os.amperecomputing.com>
* UefiCpuPkg/CpuDxe: Update RefreshMemoryAttributesFromMtrrRay Ni2023-10-091-273/+36
| | | | | | | | | | | | | | | | | | | | | | | Old implementation of RefreshMemoryAttributesFromMtrr directly retrieves the MTRR register content and applies the MTRR cache type to GCD database following the precedence order defined by SDM. The code can updated to simply get all the memory cache types for all memory through newly introduced API With the new introduced API MtrrGetMemoryAttributesInMtrrSettings. Benefits: 1. Remove the duplicated logic in CpuDxe driver that handles MTRR details. 2. Let the MtrrLib to handle the case when fixed MTRR is absent. (Old logic cannot handle the case.) Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrUnitTest: Add Unit test of setting/getting memoryYuanhaoXie2023-10-091-6/+36
| | | | | | | | | | | | | | | | attributes Add Unit test of trrGetMemoryAttributesInMtrrSettings and MtrrSetMemoryAttributesInMtrrSettings. Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrLib: Improve MtrrDebugPrintAllMtrrsWorker.YuanhaoXie2023-10-091-35/+10
| | | | | | | | | | | | | Improve MtrrDebugPrintAllMtrrsWorker by making use of MtrrGetMemoryAttributesInMtrrSettings. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrLib: Add API MtrrGetMemoryAttributesInMtrrSettings.YuanhaoXie2023-10-092-10/+130
| | | | | | | | | | | | | | | | | | MtrrGetMemoryAttributesInMtrrSettings parses the MTRR settings either from hardware or from the parameter and returns an array containing the memory cache types of all memory addresses. This API could elinimate the needs of following APIs: 1. MtrrGetMemoryAttributeInVariableMtr 2. MtrrGetFixedMtrr Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrLib: Update APIs related to set memory attributes.Ray Ni2023-10-091-39/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | Update APIs related to set memory attributes to handle the fixed MTRR is not always supported. There are 3 APIs in MtrrLib that can set memory attributes: 1. MtrrSetMemoryAttributesInMtrrSettings 2. MtrrSetMemoryAttributeInMtrrSettings 3. MtrrSetMemoryAttribute The general idea applied in MtrrSetMemoryAttributesInMtrrSettings is: 1. MtrrLibPreMtrrChange saves the old MTRR default type which contains bit to enable fixed MTRR. 2. Main logic in MtrrSetMemoryAttributesInMtrrSettings applies memory attribute settings for below 1MB to variable MTRRs if fixed MTRR is not supported. 3. MtrrLibPostMtrrChange unconditionally sets E bit in MTRR default type MSR but only set FE bit when fixed MTRRs are modified. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrSetAllMtrrs().YuanhaoXie2023-10-091-15/+20
| | | | | | | | | | | | | | Update UnitTestMtrrSetAllMtrrs() for the case that fixed MtrrLib is not always supported. Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrLib: Fix MtrrSetAllMtrrs to handle absent fixed MTRRs.Ray Ni2023-10-092-9/+26
| | | | | | | | | | | | | | | Update MtrrSetAllMtrrs to not access fixed MTRRs if CPU doesn't support them. Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrGetFixedMtrr().YuanhaoXie2023-10-091-0/+13
| | | | | | | | | | | | | | UnitTestMtrrGetFixedMtrr updated for the case that fixed MtrrLib is not always supported. Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrLib: Update MtrrGetFixedMtrr().YuanhaoXie2023-10-091-1/+5
| | | | | | | | | | | | | | | | IsMtrrSupported() return true when either fixed mtrr supported or variable mtrr suppored. In this case, rather than checking whether MTRR is supported or not, we should specifically check for fixed MTRR support. Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrGetAllMtrrs().YuanhaoXie2023-10-091-15/+84
| | | | | | | | | | | | | | Update UnitTestMtrrGetAllMtrrs() for the case that fixed MtrrLib is not always supported Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrLib: Fix MtrrGetAllMtrrs to return correct MTRR setting.Ray Ni2023-10-091-8/+22
| | | | | | | | | | | | | | | | | | | | The patch fixes the following issues in the original implementation: 1. MtrrSetting contains random value if MTRR is not supported. 2. Unconditionally access fixed MTRR on CPU that may not support fixed MTRR. 3. The maximum number of Variable MTRR entries are initialized, while the portion exceeding the maximum number remains uninitialized. Signed-off-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrUnitTest: Update test to cover no-fixed-mtrr cases.Ray Ni2023-10-092-28/+39
| | | | | | | | | | Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrGetDefaultMemoryType.YuanhaoXie2023-10-091-2/+8
| | | | | | | | | | | | | | | | | Update UnitTestMtrrGetDefaultMemoryType for the case the when Fixed MTRRs are not supported. The original implementation returns FALSE when either fixed MTRR isn't supported or the number of variable MTRRs is 0. The correct behavior should return FALSE only when both fixed MTRR isn't supported and the number of variable MTRRs is 0. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrUnitTest: Update UnitTestGetFirmwareVariableMtrrCount.YuanhaoXie2023-10-091-1/+1
| | | | | | | | | | | | | | | | | | Update UnitTestGetFirmwareVariableMtrrCount for the case the when Fixed MTRRs are not supported. The original implementation returns FALSE when either fixed MTRR isn't supported or the number of variable MTRRs is 0. The correct behavior should return FALSE only when both fixed MTRR isn't supported and the number of variable MTRRs is 0. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrUnitTest: Update the Unit Test for IsMtrrSupported().YuanhaoXie2023-10-091-2/+2
| | | | | | | | | | | | | | | The previous implementation returns FALSE if either fixed MTRR is unsupported or the number of variable MTRRs is 0. The correct behavior is to return FALSE only when both fixed MTRR is unsupported and the number of variable MTRRs is 0. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* UefiCpuPkg/MtrrLib: Add internal function MtrrLibIsMtrrSupported.Ray Ni2023-10-091-23/+60
| | | | | | | | | | | | | Add internal function MtrrLibIsMtrrSupported and update IsMtrrSupported to call the new internal function. Signed-off-by: Ray Ni <ray.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* CryptoPkg/TlsLib: fix tls cipher configurationGerd Hoffmann2023-10-081-128/+36
| | | | | | | | | | | | | | | | | | Trying to configure the TLS ciphers can lead to TLS handshake failures because TlsCipherMappingTable is not in line with the ciphers actually supported by OpensslLib. Fix that by removing TlsCipherMappingTable altogether. Use SSL_get_ciphers() instead to get the stack of ciphers supported by openssl. Name and ID of the ciphers can be queried using the SSL_CIPHER_get_name() and SSL_CIPHER_get_protocol_id() functions, which allows us to map IDs to names without a hard-code table. Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=2541 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20231004092003.3809321-1-kraxel@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Yi Li <yi1.li@intel.com>
* ArmVirtPkg/FdtPL011SerialPortLib: initialize implicitlyLaszlo Ersek2023-10-072-34/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FdtPL011SerialPortLib claims that it's usable from the DXE_CORE. That's not correct: the DXE_CORE calls DEBUG() and ASSERT() before it calls ProcessLibraryConstructorList(). Via the BaseDebugLibSerialPort instance, those DEBUG() and ASSERT() calls result in SerialPortWrite() calls, before ProcessLibraryConstructorList() called either our constructor FdtPL011SerialPortLibInitialize(), or BaseDebugLibSerialPortConstructor(). (And even if the DXE_CORE called the latter function early enough, it would just invoke our SerialPortInitialize() function -- which does nothing.) This means that the earliest DXE_CORE debug messages are lost. Rename FdtPL011SerialPortLibInitialize() to SerialPortInitialize(), so that the same initialization occur through the constructor and the public SerialPortInitialize() library API. Turn SerialPortInitialize() calls after the first one into no-ops. Our SerialPortLib APIs already use (mSerialBaseAddress != 0) to track initialization. Rework those checks to actually initialize the library if that hasn't happened yet. The following new lines appear in the log: > CoreInitializeMemoryServices: > BaseAddress - 0x48000000 Length - 0xF8000000 MinimalMemorySizeNeeded - 0x38C8000 > InstallProtocolInterface: [EfiLoadedImageProtocol] 46EFC3E0 > ProtectUefiImageCommon - 0x46EFC3E0 > - 0x0000000046EB2000 - 0x0000000000068000 (0x46EB2000 is the load address of the DXE Core.) Reported-by: Oliver Smith-Denny <osde@linux.microsoft.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* .github: Fix Python version (to 3.11)Michael Kubacki2023-10-071-1/+1
| | | | | | | | | | Build was previously using 3.11. Using 3.12 now that is is released. To allow scripts to take time to update, fix to 3.11. Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
* .azurepipelines: Fix Python version (to 3.11)Michael Kubacki2023-10-072-2/+2
| | | | | | | | | | | Build was previously using 3.11. Using 3.12 now that is is released. To allow scripts to take time to update, fix to 3.11. Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Sean Brogan <sean.brogan@microsoft.com>
* MdePkg/DxeRngLib: Add missing GUID declaration in infPierre Gondois2023-10-041-0/+1
| | | | | | | | | | | | Add missing GUID declaration in DxeRngLib.inf. Fixes: bd1f0eecc1df ("MdePkg/DxeRngLib: Request raw algorithm instead of default") Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Tested-by: Leif Lindholm <quic_llindhol@quicinc.com> Acked-by: Ard Biesheuvel <ardb@kernel.org>
* MdePkg/BaseLib: fix typo in Arm SetJumpLeif Lindholm2023-10-031-1/+1
| | | | | | | | | | RO -> R0 Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Reported-by: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/BaseLib: ensure ARM LongJump never returns 0Leif Lindholm2023-10-022-0/+4
| | | | | | | | | | | The ARM implementation of InternalLongJump always returned the value Value - but it is not supposed to ever return 0. Add the test to prevent that, and return 1 if Value is 0 - as is already present in AArch64. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/BaseLib: correct register sizes in AArch64 SetJump/LongJumpLeif Lindholm2023-10-022-8/+8
| | | | | | | | | | | | | | | | Both in SetJump and in InternalLongJump, 32-bit w register views were used for the UINTN return value. In SetJump, this did not cause errors; it was only counterintuitive. But in InternalLongJump, it meant the top 32 bits of Value were stripped off. Change all of these to use the 64-bit x register views. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Reanimated-by: Andrei Warkentin <andrei.warkentin@intel.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
* MdePkg/BaseLib: use normal register init in ARM SetJump implementationsLeif Lindholm2023-10-022-2/+2
| | | | | | | | | | | | | There may be architectures on which there are benefits to eor r0, r0(, r0) but ARM was never one of them. Change to more readable mov r0, #0 instead. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/BaseLib: add ASSERT in ARM* SetJump implementationsLeif Lindholm2023-10-022-0/+16
| | | | | | | | | | | | | The SetJump comment header states that: If JumpBuffer is NULL, then ASSERT(). However, this was not currently done. Add a call to InternalAssertJumpBuffer. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdePkg/BaseLib: fix comments in ARM* SetJump/LongJump implementationsLeif Lindholm2023-10-024-8/+4
| | | | | | | | | | | | | | Drop redundant comment about IPF (clearly copied across from now deleted code). Also change "Instead is resumes execution" -> "Instead it resumes execution" Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* Maintainers.txt: add Sami as maintainer of arm-architectural subdirsLeif Lindholm2023-10-021-0/+1
| | | | | | | | | | | | | | | | We added Sami as a reviewer to ArmPkg early last year, and I think it was always our intention to have him as a reviewer of Arm architectural stuff in general, but we seem to have missed out the Arm/AArch64 subdir wildcards. So let's fix that. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Andrew Fish <afish@apple.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
* MdeModulePkg/Xhci: Skip size round up for TRB during address translationGao Cheng2023-09-286-63/+103
| | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4560 TRB Template is 16 bytes. When boundary checking is 64 bytes for xHCI device/host memory address, it may exceed xHCI host memory pool and cause unwanted DXE_ASSERT. Introduce a new input parameter to indicate whether to enforce 64byte size alignment and round up. For TRB case, should set it to FALSE to skip the size round up. Signed-off-by: Gao Cheng <gao.cheng@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* EmulatorPkg: Fix Terminal IssuesNate DeSimone2023-09-272-2/+57
| | | | | | | | | | | | After running EmulatorPkg, one will notice that their terminal acts strangely. This is caused by the EmulatorPkg Host changing the terminal mode and not restoring the original mode, which is now fixed. Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
* MdeModulePkg/SmbiosDxe: Fix BcdRevision is not match with SMBIOS versionHoraceX Lien2023-09-261-8/+12
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4544 These value of Major/Minor version are updated from SMBIOS memory data, but BCD Revision is updated from PCD PcdSmbiosVersion. We should also update BCD Revision from SMBIOS memory data, to ensure that get consistent version value. Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Signed-off-by: HoraceX Lien <horacex.lien@intel.com>
* MdeModulePkg: Fix misspellingNate DeSimone2023-09-261-2/+2
| | | | | | | | | | confroms should be conforms. Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Dandan Bi <dandan.bi@intel.com>
* UefiPayloadPkg: Add FIT supportBrucex.Wang2023-09-2614-103/+1899
| | | | | | | | | | | | | | Provide Fit format for UniversalPayload, developer can use argument "--Fit" to build UniversalPayload.fit Cc: Guo Dong <guo.dong@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: BruceX Wang <brucex.wang@intel.com>
* MdePkg/BaseFdtLib: Add Fdt function.Brucex.Wang2023-09-262-0/+74
| | | | | | | | | | | | | | Add FdtGetName() and FdtNodeDepth() function. Cc: Benny Lin <benny.lin@intel.com> Cc: Gua Guo <gua.guo@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: James Lu <james.lu@intel.com> Reviewed-by: Benny Lin <benny.lin@intel.com> Reviewed-by: Gua Guo <gua.guo@intel.com> Signed-off-by: BruceX Wang <brucex.wang@intel.com>
* BaseTools/GenFw: Add support for LOONGARCH64 relax relocationDongyan Qian2023-09-252-1/+32
| | | | | | | | | | | | | | | | Correct relax id from 99 to 100 and added relocation support up to 109 fix gcc14 adds new relocation, and the generated relocation causes the build and compilation to fail. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4559 Cc: Rebecca Cran <rebecca@bsdio.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Yuwei Chen <yuwei.chen@intel.com> Cc: Chao Li <lichao@loongson.cn> Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn> Reviewed-by: Chao Li <lichao@loongson.cn>
* MdeModulePkg/XhciDxe: Abort the Address Device cmd when time outCai, Xianglei2023-09-251-0/+36
| | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=4552 Following XHCI spec 4.6.1.2, software may abort the execution of Address Device Command when command failed due to timeout. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: More Shih <more.shih@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Signed-off-by: Xianglei Cai <xianglei.cai@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/XhciDxe: Use Performance Timer for XHCI TimeoutsHenz, Patrick2023-09-255-87/+204
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2948 XhciDxe uses the timer functionality provided by the boot services table to detect timeout conditions. This breaks the driver's ExitBootServices call back, as CoreExitBootServices halts the timer before signaling the ExitBootServices event. If the host controller fails to halt in the call back, the timeout condition will never occur and the boot gets stuck in an indefinite spin loop. Use the free running timer provided by TimerLib to calculate timeouts, avoiding the potential hang. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Patrick Henz <patrick.henz@hpe.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* DynamicTablesPkg: AcpiSsdtPcieLibArm: Use QWord to describe I/O rangeVidya Sagar2023-09-221-1/+1
| | | | | | | | | | Use AmlCodeGenRdQWordIo() to generate the I/O range in _CRS instead of AmlCodeGenRdDWordIo() to cater to the scenarios where 64-bit addresses can be used to generate I/O packets over the PCIe bus. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: AML Code generation for I/O rangesVidya Sagar2023-09-222-0/+157
| | | | | | | | | Add helper functions to generate AML Resource Data describing I/O ranges of four words long. API AmlCodeGenRdQWordIo () is exposed. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add Aml NameUnicodeString APIJeff Brasen2023-09-222-0/+117
| | | | | | | | Add API to generate a Name that contains a Unicode string buffer. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add support to add Strings to packageJeff Brasen2023-09-222-0/+101
| | | | | | | Add API to add a String to a package created with NamedPackage API. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add support for simple method invocation.Jeff Brasen2023-09-222-0/+292
| | | | | | | | Add support to add Return objects via AML that pass a single integer argument to the named method. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* DynamicTablesPkg: Add ThermalZone CodeGen functionJeff Brasen2023-09-222-0/+144
| | | | | | | | Add API to generate a ThermalZone object to AmlLib. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
* MdeModulePkg/Bus/Pci/UhciDxe: Fix FORWARD_NULL Coverity issuesRanbir Singh2023-09-221-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | The function UsbHcGetPciAddressForHostMem has ASSERT ((Block != NULL)); and and the function UsbHcFreeMem has ASSERT (Block != NULL); statement after for loop, but these are applicable only in DEBUG mode. In RELEASE mode, if for whatever reasons there is no match inside for loop and the loop exits because of Block != NULL; condition, then there is no "Block" NULL pointer check afterwards and the code proceeds to do dereferencing "Block" which will lead to CRASH. Hence, for safety add NULL pointer checks always. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4211 Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Co-authored-by: Veeresh Sangolli <veeresh.sangolli@dellteam.com> Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/Bus/Pci/UhciDxe: Fix BAD_SHIFT Coverity issueRanbir Singh2023-09-221-1/+9
| | | | | | | | | | | | | | | | | | | | The function UhciConvertPollRate has a check ASSERT (Interval != 0); but this comes into play only in DEBUG mode. In Release mode, there is no handling if the Interval parameter value is ZERO. To avoid shifting by a negative amount later in the code flow in this undesirable case, it is better to handle it as well by treating it same as if 1 is sent. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4211 Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Co-authored-by: Veeresh Sangolli <veeresh.sangolli@dellteam.com> Signed-off-by: Ranbir Singh <Ranbir.Singh3@Dell.com> Signed-off-by: Ranbir Singh <rsingh@ventanamicro.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* RedfishPkg/JsonLib: fix JsonObjectGetValue issueNickle Wang2023-09-222-0/+36
| | | | | | | | | | | | | | | JsonObjectGetValue() cannot find corresponding JSON value when the EDKII_JSON_VALUE object is created by another UEFI driver. This is because "hashtable_seed" is initialized by current time while JsonLib is loaded. So, "hashtable_seed" will be different in each individual UEFI driver. Signed-off-by: Nickle Wang <nicklew@nvidia.com> Cc: Abner Chang <abner.chang@amd.com> Cc: Igor Kulchytskyy <igork@ami.com> Cc: Nick Ramirez <nramirez@nvidia.com> Reviewed-by: Igor Kulchytskyy <igork@ami.com> Reviewed-by: Abner Chang <abner.chang@amd.com>
* RISCV: Fix InternalLongJump to return correct valueAndrei Warkentin2023-09-211-5/+2
| | | | | | | | | | | | | | | InternalLongJump was not returning the 2nd parameter passed to LongJmp (Value) as the return value from SetJmp. Seen with code compiled with -Os, where an LongJmp (Buffer, -1) somehow translated to SetJmp returning 0... Cc: Yong Li <yong.li@intel.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Tuan Phan <tphan@ventanamicro.com> Cc: Daniel Schaefer <git@danielschaefer.me> Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
* ArmPkg/ArmLib: Add ArmHasVhe () helper functionLeif Lindholm2023-09-203-0/+36
| | | | | | | | | | | | | Create a helper function to query whether ID_AA64MFR1_EL1 indicates presence of the Virtualization Host Extensions. This feature is only visible in AARCH64 state. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-14 17:36:07 +0000