summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* CryptoPkg/OpensslLib: fix build break caused by missing libraryedk2-stable201905Wang, Jian J2019-06-062-0/+2
| | | | | | | | | | | | | CryptoPkg\Library\Include\CrtLibSupport.h maps strxxxx interfaces to edk2 PrintLib interfaces but related module inf file don't claim the use of it. This will cause unresolved symbol issue with VS2017 build which has enabled strict symbol check. This patch resolves the problem by adding PrintLib to inf files. Cc: Liming Gao <liming.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* Revert "UefiPayloadPkg: Remove legacy PIC 8259 driver"Liming Gao2019-06-063-0/+3
| | | | | | | | | | | This reverts commit a1539c46958fb896dee8f7987f4a98e9f9d10796. This change will be pushed after edk2-stable201905 Cc: Maurice Ma <maurice.ma@intel.com> Cc: Guo Dong <guo.dong@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Guo Dong <guo.dong@intel.com>
* CryptoPkg/IntrinsicLib: Fix CLANG38 IA32 build problemXiaoyu Lu2019-06-061-0/+13
| | | | | | | | | | | | | | | | | | When use clang-3.8 to build the NetworkPkg, compiler optimization may use memcpy for memory copy. For example: CryptoPkg/Library/OpensslLib/openssl/ssl/ssl_rsa.c:918: undefined reference to `memcpy'` Compiler optimization is sophisticated, but we can work around it use __attribute__((__used__)) to informs the compiler that symbol should be retained in the object file, even if it may be unreferenced. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* edk2: Update additional licenses in Readme.mdMichael D Kinney2019-06-051-2/+2
| | | | | | | | | | | | | | | | | | | | Update the list of additional licenses in Readme.md. For additional licenses from a git submodule, provide a link to the license file in the remote git repository. This makes the links in Readme.md when viewed from the edk2 repository GitHub landing page https://github.com/tianocore/edk2/ functional from a web browser. * Remove references EdkCompatibilityPkg * Update link to OpenSSL to license file in the git submodule link to https://github.com/openssl/openssl * Add link to license file in the git submodule like to https://github.com/ucb-bar/berkeley-softfloat-3 for ArmSoftFloatLib Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
* CryptoPkg/OpensslLib: fix VS2017 build failureWang, Jian J2019-06-052-2/+0
| | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1878 This issue is specific to VS2017 which tries to resolve symbol referenced by a symbol not really referenced eventually. ossl_init_load_crypto_strings -> err_load_crypto_strings_int (not really referenced) -> ERR_load_OSSL_STORE_strings Because OPENSSL_NO_ERR and OPENSSL_NO_AUTOERRINIT are not defined by default, err_load_crypto_strings_int() will not be actually referenced by ossl_init_load_crypto_strings(). Since err_load_crypto_strings_int() is not actually referenced at all, the fix can be done simply by removing crypto/err/err_all.c from build. Cc: Dandan Bi <dandan.bi@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* Maintainers.txt: Remove Network maintainers for MdeModulePkg/Universal/NetworkLiming Gao2019-06-051-2/+0
| | | | | | | | | | | | | MdeModulePkg/Universal/Network has been moved to NetworkPkg. So, MdeModulePkg/Universal/Network can be removed in Maintainers.txt. Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* Revert "EmulatorPkg: don't display the cpu current speed"Laszlo Ersek2019-06-051-0/+5
| | | | | | | | | | | | | | | | | | | This reverts commit 7cea4d71a8a87a93924a07ab32348332f5881ef9. Said commit was not suitable for pushing during the edk2-stable201905 hard feature freeze; it was pushed only by mistake. The subject line referenced EmulatorPkg, but the patch changed MdeModulePkg/UiApp, regressing the display of the CPU speed from SMBIOS in multiple platforms. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1877 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* UefiPayloadPkg: Remove legacy PIC 8259 driverDong, Guo2019-06-043-3/+0
| | | | | | | | | | | Since legacy PIC 8259 driver would be removed from edk2, update UEFI payload to remove 8259 driver. If required, bootloader could disable 8259. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* EmulatorPkg: don't display the cpu current speedZhiguang Liu2019-06-041-5/+0
| | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1686 The bug reporter wish to display nothing as the CPU is virtual Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
* FmpDevicePkg: Add TimerLib to DSC fileXiaoyu Lu2019-06-041-0/+1
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 FmpDevicePkg use OpensslLib and when OpenSSL upgrade to 1.1.1b, TimerLib is required by OpensslLib in CryptoPkg(commit 456dd8b99f, CryptoPkg: Upgrade OpenSSL to 1.1.1b) So add TimerLib to DSC file. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* CryptoPkg: Fix build problem with XCODEXiaoyu Lu2019-06-046-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 When building CryptoPkg with XCODE, blow error may result * usr/lib/clang/9.0.0/include/stdatomic.h:105:17: error: unknown type name 'wchar_t' Since the C native atomics are C11 feature we can explicitly use C99 to work around it. add -std=c99 to avoid it * openssl/crypto/conf/conf_sap.c:71:12: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized] Suppress warnings in OpenSSL so we don't break the build with -Werror. add -Wno-error=uninitialized to disalbe this warning Cc: Jian Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* OvmfPkg/PlatformPei: set 32-bit UC area at PciBase / PciExBarBase (pc/q35)Laszlo Ersek2019-06-033-5/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (This is a replacement for commit 39b9a5ffe661 ("OvmfPkg/PlatformPei: fix MTRR for low-RAM sizes that have many bits clear", 2019-05-16).) Reintroduce the same logic as seen in commit 39b9a5ffe661 for the pc (i440fx) board type. For q35, the same approach doesn't work any longer, given that (a) we'd like to keep the PCIEXBAR in the platform DSC a fixed-at-build PCD, and (b) QEMU expects the PCIEXBAR to reside at a lower address than the 32-bit PCI MMIO aperture. Therefore, introduce a helper function for determining the 32-bit "uncacheable" (MMIO) area base address: - On q35, this function behaves statically. Furthermore, the MTRR setup exploits that the range [0xB000_0000, 0xFFFF_FFFF] can be marked UC with just two variable MTRRs (one at 0xB000_0000 (size 256MB), another at 0xC000_0000 (size 1GB)). - On pc (i440fx), the function behaves dynamically, implementing the same logic as commit 39b9a5ffe661 did. The PciBase value is adjusted to the value calculated, similarly to commit 39b9a5ffe661. A further simplification is that we show that the UC32 area size truncation to a whole power of two automatically guarantees a >=2GB base address. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* OvmfPkg: raise the PCIEXBAR base to 2816 MB on Q35Laszlo Ersek2019-06-033-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (This is a replacement for commit 75136b29541b, "OvmfPkg/PlatformPei: reorder the 32-bit PCI window vs. the PCIEXBAR on q35", 2019-05-16). Commit 7b8fe63561b4 ("OvmfPkg: PlatformPei: enable PCIEXBAR (aka MMCONFIG / ECAM) on Q35", 2016-03-10) claimed that, On Q35 machine types that QEMU intends to support in the long term, QEMU never lets the RAM below 4 GB exceed 2 GB. Alas, this statement came from a misunderstanding that occurred while we worked out the interface contract. In fact QEMU does allow the 32-bit RAM extend up to 0xB000_0000 (exclusive), in case the RAM size falls in the range (0x8000_0000, 0xB000_0000) (i.e., the RAM size is greater than 2048MB and smaller than 2816MB). In turn, such a RAM size (justifiedly) triggers ASSERT (TopOfLowRam <= PciExBarBase); in MemMapInitialization(), because we placed the 256MB PCIEXBAR at 0x8000_0000 (2GB) exactly, relying on the interface contract. (And, the 32-bit PCI window would follow the PCIEXBAR, covering the [0x9000_0000, 0xFC00_0000) range.) In order to fix this, place the PCIEXBAR at 2816MB (0xB000_0000), and start the 32-bit PCI window at 3 GB (0xC000_0000). This shrinks the 32-bit PCI window to 0xFC00_0000 - 0xC000_0000 = 0x3C00_0000 = 960 MB. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* Revert "OvmfPkg/PlatformPei: assign PciSize on both i440fx/q35 branches ↵Laszlo Ersek2019-06-031-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | explicitly" This reverts commit 60e95bf5094fbb9b728729ccfaf32184b3662317. The original fix for <https://bugzilla.tianocore.org/show_bug.cgi?id=1814> triggered a bug / incorrect assumption in QEMU. QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above it. When the firmware doesn't satisfy this assumption, QEMU generates an \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign 32-bit MMIO BARs. Working around the problem in the firmware looks less problematic than fixing QEMU. Revert the original changes first, before implementing an alternative fix. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
* Revert "OvmfPkg/PlatformPei: hoist PciBase assignment above the i440fx/q35 ↵Laszlo Ersek2019-06-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | branching" This reverts commit 9a2e8d7c65ef7f39c6754d27e52954b616bc6628. The original fix for <https://bugzilla.tianocore.org/show_bug.cgi?id=1814> triggered a bug / incorrect assumption in QEMU. QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above it. When the firmware doesn't satisfy this assumption, QEMU generates an \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign 32-bit MMIO BARs. Working around the problem in the firmware looks less problematic than fixing QEMU. Revert the original changes first, before implementing an alternative fix. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* Revert "OvmfPkg/PlatformPei: reorder the 32-bit PCI window vs. the PCIEXBAR ↵Laszlo Ersek2019-06-034-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | on q35" This reverts commit 75136b29541b0e093a51d2e2c2af8d19855c2b60. The original fix for <https://bugzilla.tianocore.org/show_bug.cgi?id=1814> triggered a bug / incorrect assumption in QEMU. QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above it. When the firmware doesn't satisfy this assumption, QEMU generates an \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign 32-bit MMIO BARs. Working around the problem in the firmware looks less problematic than fixing QEMU. Revert the original changes first, before implementing an alternative fix. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* Revert "OvmfPkg/PlatformPei: fix MTRR for low-RAM sizes that have many bits ↵Laszlo Ersek2019-06-033-24/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | clear" This reverts commit 39b9a5ffe6618b7870be2a54fe7725000249c33a. The original fix for <https://bugzilla.tianocore.org/show_bug.cgi?id=1814> triggered a bug / incorrect assumption in QEMU. QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above it. When the firmware doesn't satisfy this assumption, QEMU generates an \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign 32-bit MMIO BARs. Working around the problem in the firmware looks less problematic than fixing QEMU. Revert the original changes first, before implementing an alternative fix. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
* CryptoPkg CLANG35: add -std=c99 to dodge OpenSSL C atomics issueArd Biesheuvel2019-06-036-0/+6
| | | | | | | | | | | | | | | | | Commit c51f8bae7cabe ("CryptoPkg: Fix possible build problem with Clang") added -std=c99 to the CLANG38 compiler command line of packages that incorporate parts of OpenSSL, to ensure that the new C atomics code used by OpenSSL for refcounting (which we don't care about) does not pull in system C library headers, which we cannot rely on when (cross)building EDK2 code. Unsurprisingly, CLANG35 (which is only defined for ARM and AARCH64) suffers from the exact same issue, so let's add the same flags there as well. Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* CryptoPkg/BaseCryptLib: Make HMAC_CTX size backward compatibleXiaoyu Lu2019-06-033-6/+19
| | | | | | | | | | | | | | | | | | | | | | Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 OpenSSL internally redefines the size of HMAC_CTX at crypto/hmac/hmac_lcl.h(OpenSSL commit e0810e35). Ref: https://github.com/openssl/openssl/pull/4338 We should not use it directly and should remove relevant functions(Hmac*GetContextSize). Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=1792 But for compatiblility, temporarily change these definition of HMAC_*_CTX_SIZE. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Gary Lin <glin@suse.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* CryptoPkg: Upgrade OpenSSL to 1.1.1bXiaoyuX Lu2019-06-036-31/+149
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 * Update OpenSSL submodule to OpenSSL_1_1_1b OpenSSL_1_1_1b(50eaac9f3337667259de725451f201e784599687) * Run process_files.pl script to regenerate OpensslLib[Crypto].inf and opensslconf.h * Remove -DNO_SYSLOG from OPENSSL_FLAGS in OpensslLib[Crypto].inf, due to upstream OpenSSL commit cff55b90e95e("Cleaning UEFI Build with additional OPENSSL_SYS_UEFI flags", 2017-03-29), which was first released as part of OpenSSL_1_1_1. * Starting with OpenSSL commit 8a8d9e1905(first release in OpenSSL_1_1_1), the OpenSSL_version() function can no longer return a pointer to the string literal "compiler: information not available", in the case CFLAGS macro is not defined. Instead, the function now has a hard dependency on the global variable 'compiler_flags'. This variable is normally placed by "util/mkbuildinf.pl" into "buildinf.h". In edk2 we don't run that script whenever we build OpenSSL, therefore we must provide our own dummy 'compiler_flags'. * BUFSIZ is used by crypto/evp/evp_key.c(OpenSSL_1_1_1b) And it is declared in stdio.h. So add it to CrtLibSupport.h. Here's a discussion about this. Ref: https://github.com/openssl/openssl/issues/8904 Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Gary Lin <glin@suse.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* CryptoPkg/OpensslLib: Add functions for upgrading OpenSSL1_1_1bXiaoyuX Lu2019-06-035-0/+434
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 * From OpenSSL_1_1_0i(97c0959f27b294fe1eb10b547145ebef2524b896) to OpenSSL_1_1_1b(50eaac9f3337667259de725451f201e784599687), OpenSSL updated DRBG / RAND to request nonce and additional low entropy randomness from system(line 229 openssl/CHANGES). Since OpenSSL_1_1_1b doesn't fully implement rand pool functions for UEFI. We must provide a method to implenet these method. TSC is used as first entropy source if it's availabe otherwise fallback to TimerLib. But we are not sure the amount of randomness they provide. If you really care about the security, one choice is overrided it with hardware generator. Add rand_pool.c to implement these functions required by OpenSSL rand_pool_acquire_entropy rand_pool_add_nonce_data rand_pool_add_additional_data rand_pool_init rand_pool_cleanup rand_pool_keep_random_devices_open And add rand_pool_noise.* for getting entropy noise from different architecture. * We don't need ossl_store functions. We exclude relative files through process_files.pl. And ossl_store_cleanup_int was first added in crypto/init.c OpenSSL_1_1_1(71a5516d). So add a new file(ossl_store.c) to implement ossl_store_cleanup_int function. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Tested-by: Gary Lin <glin@suse.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* CryptoPkg: Fix possible build problem with ClangXiaoyuX Lu2019-06-036-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 When building CryptoPkg with Clang, blow error may result * /usr/lib/llvm-3.8/lib/clang/3.8.0/include/stdatomic.h:105:17: error: unknown type name 'wchar_t' Since the C native atomics are C11 feature we can explicitly use C99 to work around it. add -std=c99 to avoid it * openssl/crypto/conf/conf_sap.c:71:12: error: variable 'ret' is uninitialized when used here [-Werror,-Wuninitialized] Suppress warnings in OpenSSL so we don't break the build with -Werror. add -Wno-error=uninitialized to disalbe this warning Cc: Ting Ye <ting.ye@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* CryptoPkg/OpensslLib: Fix cross-build problem for AARCH64Laszlo Ersek2019-06-031-0/+11
| | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 Thanks Laszlo Ersek <lersek@redhat.com>. Ref: https://edk2.groups.io/g/devel/message/40375 Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* CryptoPkg/OpensslLib: Prepare for upgrading OpenSSLXiaoyuX Lu2019-06-032-12/+20
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 Disable warning for building OpenSSL_1_1_1b add /wd4132 /wd4700 /wd4310 for Visual Studio in OpensslLib[Crypto].inf add -Wno-error=unused-but-set-variable for GCC in OpensslLib[Crypto].inf Although this option is set in some build environments by default. But this is only for OpenSSL compilation, no matter how the default options change. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Gary Lin <glin@suse.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* CryptoPkg/IntrinsicLib: Fix possible unresolved external symbol issueXiaoyu Lu2019-06-032-1/+25
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 This is for the upcoming upgrade to OpenSSL_1_1_1b Compiler optimization(Visual Studio) may automatically use _ftol2 instead of some type conversion. For example: OpensslLib.lib(drbg_lib.obj) : error LNK2001: unresolved external symbol __ftol2 This patch add _ftol2 function for the compiler intrinsic. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Tested-by: Gary Lin <glin@suse.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* CryptoPkg/OpensslLib: Exclude unnecessary files in process_files.plXiaoyu Lu2019-06-031-0/+6
| | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 When running process_files.py to configure OpenSSL, we can exclude some unnecessary files. This can reduce porting time, compiling time and library size. Upstream OpenSSL commit 71a5516dcc8a which was as part of OpenSSL_1_1_1b, Add the STORE module(crypto/store/*). But UEFI don't use them. So exclude these files. Functions in crypto/rand/randfile.c OpenSSL and edk2 don't call them. And it requires more crt runtime support. So exclude it. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Gary Lin <glin@suse.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* CryptoPkg/OpensslLib: Modify process_files.pl for upgrading OpenSSLXiaoyu Lu2019-06-031-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1089 OpenSSL configure mechanism use --with-rand-seed=xxx option to configure random number generation. OpenSSL_1_1_0j(74f2d9c1ec5f5510e1d3da5a9f03c28df0977762) we use default --with-rand-seed=os option to for building it. But OpenSSL_1_1_1b(50eaac9f3337667259de725451f201e784599687) only support seeding NONE for UEFI(rand_unix.c line 93). This OpenSSL change was introduced in commit 8389ec4b4950 ("Add --with-rand-seed", 2017-07-22). So add --with-rand-seed=none to process_files.pl. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Ting Ye <ting.ye@intel.com> Signed-off-by: Xiaoyu Lu <xiaoyux.lu@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Gary Lin <glin@suse.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* ArmPkg/ArmSoftFloatLib GCC4x: fix build failureArd Biesheuvel2019-06-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | The upstream SoftFloat code that was recently incorporated into ArmSoftFloatLib uses some parameterization to tweak the inlining and optimization behavior for different compilers. The custom platform.h file that sets these parameters is based on the upstream version for Linux/ARM, but was updated to include the 'always_inline' GCC attribute into the INLINE macro, to ensure that all definitions that are marked as inline are not only inlined into their callers, but also to ensure that no version of the function is ever emitted into the object file. This works fine on recent GCC and Clang, but the latter part turns out to break on GCC 4.x, resulting duplicate definition linker errors. Fortunately, the synticatically more appriopriate 'static inline' works fine on both the recent and the older compilers, so let's switch to that instead. Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmLib ARM: set .fpu to let Clang 7 assemble ArmV7Support.SArd Biesheuvel2019-05-311-0/+2
| | | | | | | | | | | Clang 7 complains about the vmsr instruction in ArmV7Support.S, which is only available on cores that implement some flavour of VFP. So set the .fpu to NEON like we do in some other places. Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmSoftFloatLib: remove source files that are no longer usedArd Biesheuvel2019-05-3121-4706/+0
| | | | | | | | | | | | Now that we have switched to a new version of the SoftFloat code, remove the source files that make up the old implementation, and are no longer referenced. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1845 Acked-by: Jian J Wang <jian.j.wang@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg/ArmSoftFloatLib: switch to new version of softfloat libraryArd Biesheuvel2019-05-313-19/+358
| | | | | | | | | | | | | | | | | | | | | | | Update the INF description and the top level .c files in order to switch to the new version of the SoftFloat library imported as a Git submodule in the previous patch. Note that we no longer use the code that travelled a long way from the 2002 version of the softfloat library via NetBsd and the StdLib package. Instead, we are using the upstream version unmodified, with the glue .c file adopted from the OP-TEE project. This approach is much cleaner and much more maintainable. Note that support for the RVCT toolchains is being dropped at the same time. RVCT is mostly untested, and planned to be removed, and so it makes little sense to go to the trouble of upgrading this library for RVCT as well. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1845 Acked-by: Jian J Wang <jian.j.wang@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg: import Berkeley Softfloat library as git submoduleArd Biesheuvel2019-05-312-0/+3
| | | | | | | | | | | | In preparation of bringing ArmSoftFloatLib up to date in order to provide some missing routines, import the Berkely SoftFloat library into the tree as a git submodule. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1845 Acked-by: Jian J Wang <jian.j.wang@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* BaseTools:Update binary cache restore time to current timeSteven Shi2019-05-311-2/+2
| | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1742 Current Binary Cache doesn't update the restored file creation and modification times to the current time. Preserve the new restored file creation time as old cached time might has potential issue to block the make to build updated files based on the time stamp. Enhance to update the restored file creation time to current time. Cc: Liming Gao <liming.gao@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Zhiju Fan <zhijux.fan@intel.com> Signed-off-by: Steven Shi <steven.shi@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools:Extend the binary cache to support library cacheSteven Shi2019-05-311-0/+6
| | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1797 Current binary cache doesn't support to save and restore the library module. If a driver module cache miss happen, all its dependency library modules need rebuild which is very time-consuming. This patch is to extend the binary cache to support library. Cc: Liming Gao <liming.gao@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Christian Rodriguez <christian.rodriguez@intel.com> Signed-off-by: Steven Shi <steven.shi@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* MdeModulePkg/AhciPei: Fix device cannot be found in non-S3 pathHao A Wu2019-05-311-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1862 Current implementation of function AhciModeInitialization() has an incorrect assumption that the value in the CAP (offset 00h) register will always be greater than the highest bit set for the value in the PI (offset 0Ch) register. This will lead to an issue that hard disk devices may not be found in the non-S3 boot path for some AHCI controller capabilities. More specifically, variable 'PortInitializeBitMap' will have the value from 'Private->PortBitMap', which will be 0xFFFFFFFF in non-S3 boot path. When the CAP register is of value 0x1 and PI register with value 0x4 (meaning port 2 is available), the current logic will only enumerate port 0. And the device attached behind port 2 will not be enumerated. To address this issue, variable 'PortInitializeBitMap' will now take the bitwise and result between 'Private->PortBitMap' and the value read from the PI register. Please note that there will be no function impact for S3 path, since in this case, the bits being set in 'Private->PortBitMap' will be a subset of the bits being set in the PI register. Their bitwise and operation will still be the value of 'Private->PortBitMap'. Cc: Maggie Chu <maggie.chu@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
* IntelFsp2Pkg/SplitFspBin.py: Revert FSP 1.x support.Chasel Chiu2019-05-312-38/+30
| | | | | | | | | | This reverts commit: 591b8cb7f3d026d2fa4483c59f3d5fb14be181bf. Will submit again after freeze done. Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2Pkg/SplitFspBin.py: Support rebasing 1.x binary.Chasel Chiu2019-05-312-30/+38
| | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1308 Support rebasing FSP 1.x binary. FSP 1.x has single component in binary so not supported by split command and rebase can be done with the same command for rebasing FSP-T component in FSP 2.x image. Test: both FSP 2.x (Kabylake) and FSP 1.x (BroadwellDE) binary can be rebased successfully. Cc: Maurice Ma <maurice.ma@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
* Maintainers.txt: update UEFI payload informationGuo Dong2019-05-311-7/+7
| | | | | | | | | | Remove CorebootModulePkg and CorebootPayloadPkg, and add UefiPayloadPkg to reflect recently change in UEFI payload. wiki link for UefiPayloadPkg would be available soon. Signed-off-by: Guo Dong <guo.dong@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
* Maintainers.txt: update mailing list informationLeif Lindholm2019-05-291-1/+1
| | | | | | | | The devel mailing list has moved from 01.org to groups.io - update the mailing list information to reflect this. Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* SignedCapsulePkg: Update Package DSC to remove unused network libsLiming Gao2019-05-281-5/+0
| | | | | | | Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* ArmPkg: Update Package DSC to remove unused NetLibLiming Gao2019-05-281-1/+0
| | | | | | | Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* UefiPayloadPkg: Update Package DSC files to refer to NetworkLibs.dsc.incLiming Gao2019-05-282-2/+2
| | | | | | Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Guo Dong <guo.dong@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* MdeModulePkg: Remove network library header file from package DEC fileLiming Gao2019-05-271-23/+0
| | | | | | | Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* NetworkPkg: Move Network library header file from MdeModulePkg to NetworkPkgLiming Gao2019-05-2729-0/+46
| | | | | | | | Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
* NetworkPkg: Move Network library and drivers from MdeModulePkg to NetworkPkgLiming Gao2019-05-27147-24/+24
| | | | | | | | Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
* BaseTools:Change the path of the file that Binary CacheFan, ZhijuX2019-05-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=1806 Current Binary Cache use the PlatformInfo.Name to distinguish the different platform cache paths in the database folder. But the different platforms might use the same PLATFORM_NAME in the DSC files. Different platform caches might overlay each other inside Binary Cache database if they use same platform name Use the PlatformInfo.Platform.OutputDirectory instead of the PlatformInfo.Name can solve the problem. This patch is going to fix that issue. Cc: Liming Gao <liming.gao@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Steven Shi <steven.shi@intel.com> Signed-off-by: Zhiju.Fan <zhijux.fan@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools: Remove './SecMain' from 'run' targetBob Feng2019-05-241-4/+0
| | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1561 This patch is related to commit 9ca1f1 It's to remove the second .SecMain call from 'run' target. Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdeModulePkg: Update MdeModulePkg.dsc to remove Network related modulesLiming Gao2019-05-231-19/+0
| | | | | | | | | Network related modules have been included in NetworkPkg.dsc. They can be removed from MdeModulePkg.dsc. Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* BaseTools: Update Conf/target.template with the default EmulatorPkg.dscLiming Gao2019-05-231-2/+2
| | | | | | | | Nt32Pkg has been removed. The default platform is changed to EmulatorPkg.dsc. Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* IntelFrameworkModulePkg/DebugLib: Fix string copy issueGao, Zhichao2019-05-221-2/+2
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1826 There is a bug to use AsciiStrCpyS to copy a truncated string. If would cause an assert because the truncated length is always less than the source string length. It should use the AsciiStrnCpyS instead. Cc: Liming Gao <liming.gao@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-09 11:52:59 +0000