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* BaseTools/tools_def.template: remove GCC47 leaf definitionsLaszlo Ersek2019-01-081-76/+0
| | | | | | | | | | | | | | | | | Remove the "leaf" definitions for GCC47. These definitions are never referenced in "tools_def.template" (they are the last GCC47 mentions in the file), so their removal can't break other definitions. Instead, their erasure turns other definitions into leaves (subject to further removal). Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: remove GCC48_IA32_X64_DLINK_COMMON dead-endLaszlo Ersek2019-01-081-4/+0
| | | | | | | | | | | | | | | | | | | | | | DLINK_COMMON definitions are not consumed by "build_rule.template"; instead, DLINK_COMMON definitions (internal to "tools_def.template") were invented for sharing options between ASLDLINK_FLAGS and DLINK_FLAGS. However, this intent doesn't actually apply to GCC48_IA32_X64_DLINK_COMMON: it is never consumed. Furthermore, the GCC45..GCC47 instances of IA32_X64_DLINK_COMMON too lead up to GCC48_IA32_X64_DLINK_COMMON only -- they form a dead-end. Remove them altogether, in order to simplify the subsequent patches. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: strip trailing whitespaceLaszlo Ersek2019-01-081-54/+54
| | | | | | | | | | | | | | | | Whitespace just before line terminators is useless, remove it. ("git show -b" produces a null diff for this patch.) Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/tools_def.template: fix up LF-only line terminatorLaszlo Ersek2019-01-081-1/+1
| | | | | | | | | | | | | | | "tools_def.template" should only use CRLF line terminators, at this time. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Fixes: 88e8498f8a72cff1f7af6852ec8166772913399e Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/Conf/tools_def.template: drop ARM/AARCH support from GCC46/GCC47Ard Biesheuvel2019-01-081-129/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | This drops ARM and AARCH64 support from the GCC46 and GCC47 toolchain definitions, which are on the list to be removed, along with VS2003, VS2005, VS2008, VS2010, DDK3790, UNIXGCC, GCC44, GCC45, ELFGCC, CYGGCC, ICC, ICC11 and MYTOOLS. Since GCC46 and GCC47 are the only ones on that list that support ARM and/or AARCH64, let's give Liming a hand and cover the ARM side of things first, so that everything that remains to be removed is x86 only. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Liming Gao <liming.gao@intel.com> [lersek@redhat.com: add bugzilla reference and CCs] Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* Vlv2TbltDevicePkg: assume GCC48 or laterLaszlo Ersek2019-01-081-13/+1
| | | | | | | | | | | | | | | | | | | We're about to remove BaseTools support for GCC44..GCC47. Bump the assumption about the minimum gcc version to GCC48 in "Vlv2TbltDevicePkg/bld_vlv.sh". No GCC44..GCC47 references remain under Vlv2TbltDevicePkg after this patch. Cc: Zailiang Sun <zailiang.sun@intel.com> Cc: Yi Qian <yi.qian@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Zailiang Sun <zailiang.sun@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* OvmfPkg: require GCC48 or laterLaszlo Ersek2019-01-082-17/+5
| | | | | | | | | | | | | | | | | | | | We're about to remove BaseTools support for GCC44..GCC47. Reject those gcc versions cleanly in "OvmfPkg/build.sh". In "OvmfPkg/README", upgrade any mentions of the same gcc versions to GCC48. No GCC44..GCC47 references remain under OvmfPkg after this patch. Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Julien Grall <julien.grall@linaro.org> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* EmulatorPkg: require GCC48 or laterLaszlo Ersek2019-01-082-19/+3
| | | | | | | | | | | | | | | | | | We're about to remove BaseTools support for GCC44..GCC47. Reject those gcc versions cleanly in "EmulatorPkg/build.sh", and drop build flags too that are specific to them. No GCC44..GCC47 references remain under EmulatorPkg after this patch. Cc: Andrew Fish <afish@apple.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Fix VS2015 IA32 NOOPT build failureHao Wu2019-01-051-4/+4
| | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1425 This commit will resolve the VS2015 IA32 NOOPT build failure within SdMmcPciHcDxe. More specifically, this commit will use BaseLib API RShiftU64() to perform right-shift operations for UINT64 type operators. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Bi Dandan <dandan.bi@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* SecurityPkg/AuthVariableLib: allow MM_STANDALONE drivers to use this libraryJagadeesh Ujja2019-01-041-2/+3
| | | | | | | | | | AuthVariableLib library can be used by MM_STANDALONE drivers as well. So add MM_STANDALONE to the list of module types this library supports. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jagadeesh Ujja <jagadeesh.ujja@arm.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* BaseTools/GenFds: permit stripped MM_CORE_STANDALONE binariesArd Biesheuvel2019-01-043-3/+3
| | | | | | | | | | | | | | | | | | | The standalone MM core is executed in place, and resides in a separate execution context which may be space constrained. Since code and data may be mapped with different attributes for security reasons, the PE/COFF binary could have a section alignment of 4 KB. This means that any relocation data is not only useless, but it will also take up 4 KB of valuable space. So add support for the RELOCS_STRIPPED attribute on FFS files of this type, so that we can get rid of the .reloc section altogether. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools: Correct PcdArray value assigment statementFeng, Bob C2019-01-042-45/+73
| | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1410 BaseTools should not generate C structure array initial value if the value is not specified with CODE style. This patch is going to remove the incorrect initial value statement and correct the Pcd Array value assignment statement. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: Fixed build report issue.Feng, Bob C2019-01-041-3/+4
| | | | | | | | | | | | This patch is going to fix the regression issue by 72a1d77694d51914c0dd6aa97dbfa58634b0a4a5 After enable PCD array, the Pcd.OverrideStruct has a new key, array index, but the build report is not changed correspondingly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* SecurityPkg/Tcg: Fix Warnings and Remarks reported by IASLZhang, Chao B2019-01-032-84/+82
| | | | | | | | | | | Addressed warnings and remarks reported by IASL.EXE. Some methods had unused arguments. A method was returning a value when it should not. Cc: Zhang Chao B <chao.b.zhang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Thomas Rydman <thomas.j.rydman@intel.com> Reviewed-by: Zhang Chao B <chao.b.zhang@intel.com>
* MdeModulePkg/SdMmcPciHcDxe: Add SDMMC HC v4 and above Support.Ashish Singhal2019-01-036-83/+366
| | | | | | | | | | | | | | | | | | | | | | Add SDMA, ADMA2 and 26b data length support. If V4 64 bit address mode is supported in capabilities register, program controller to enable V4 host mode and use appropriate SDMA registers supporting 64 bit addresses. If V4 64 bit address mode is supported in capabilities register, program controller to enable V4 host mode and use appropriate ADMA descriptors supporting 64 bit addresses. If host controller version is above V4.0, enable ADMA2 with 26b data length support for better performance. HC 2 register is configured to use 26 bit data lengths and ADMA2 descriptors are configured appropriately. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1359 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ashish Singhal <ashishsingha@nvidia.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
* StdLib/Environs: Avoid infinite recursion in _ExitAlex James2019-01-021-1/+1
| | | | | | | | | | | Use __builtin_unreachable instead of infinite recursion to fix an infinite recursion error when building StdLib with XCODE5/CLANG38. Cc: Daryl McDaniel <edk2-lists@mc2research.org> Cc: Jaben Carsey <jaben.carsey@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Alex James <theracermaster@gmail.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* StdLib/sys/termios: Define cc_t as unsignedAlex James2019-01-021-1/+1
| | | | | | | | | | | | According to the POSIX standard, cc_t, speed_t, and tcflag_t should be unsigned integer types. Define cc_t as unsigned to match POSIX and fix an implicit conversion error when building StdLib with XCODE5/CLANG38. Cc: Daryl McDaniel <edk2-lists@mc2research.org> Cc: Jaben Carsey <jaben.carsey@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Alex James <theracermaster@gmail.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* UefiCpuPkg: Merge StuffRsb.inc files into one in UefiCpuPkg/IncludeHao Wu2019-01-0212-174/+10
| | | | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1091 Previously, when compiling NASM source files, BaseTools did not support including files outside of the NASM source file directory. As a result, we duplicated multiple copies of "StuffRsb.inc" files in UefiCpuPkg. Those INC files contain the common logic to stuff the Return Stack Buffer and are identical. After the fix of BZ 1085: https://bugzilla.tianocore.org/show_bug.cgi?id=1085 The above support was introduced. Thus, this commit will merge all the StuffRsb.inc files in UefiCpuPkg into one file. The merged file will be named 'StuffRsbNasm.inc' and be placed under folder UefiCpuPkg/Include/. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg: Remove PcdPeiCoreMaxXXX PCDsStar Zeng2019-01-022-25/+0
| | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1405 The codes have been updated to not use PcdPeiCoreMaxFvSupported, PcdPeiCoreMaxPeimPerFv and PcdPeiCoreMaxPpiSupported. The patch removes them in MdeModulePkg.dec. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* BaseTools/GenFv: Support SecCore and PeiCore in different FVChasel, Chiu2018-12-281-41/+41
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1423 There is usage model that SecCore and PeiCore are in different FVs. Update BaseTools to support this usage model. Test: Verified on internal platform with the case SecCore and PeiCore in different FVs and built/booted successfully. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools: Reset FdsGlobalVariableFeng, Bob C2018-12-251-0/+51
| | | | | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1418 This patch is going to fix a regression issue that is introduced by commit b3497bad1221704a5dbc5da0b10f42625f1ad2ed. Before commit b3497b, build launched a external GenFds.py to generate Fd, so the global variable in GenFds.py was reset in each execution. After commit b3497b, each GenFds run in the same python interpeter, so we need to explicitly reset global variable in each GenFdsApi call. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* UefiCpuPkg/PiSmmCpuDxeSmm: Update to consume SpeculationBarrierHao Wu2018-12-251-3/+3
| | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1417 Since BaseLib API AsmLfence() is a x86 arch specific API and should be avoided using in generic codes, this commit replaces the usage of AsmLfence() with arch-generic API SpeculationBarrier(). Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* MdeModulePkg/Variable: Update to consume SpeculationBarrierHao Wu2018-12-257-32/+38
| | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1417 Since BaseLib API AsmLfence() is a x86 arch specific API and should be avoided using in generic codes, this commit replaces the usage of AsmLfence() with arch-generic API SpeculationBarrier(). Please note that speculation execution barriers are intended to be asserted for SMM codes, hence, this commit still preserve an empty implementation of the speculation execution barrier for the DXE codes. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdeModulePkg/SmmLockBox: Update to consume SpeculationBarrierHao Wu2018-12-251-6/+6
| | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1417 Since BaseLib API AsmLfence() is a x86 arch specific API and should be avoided using in generic codes, this commit replaces the usage of AsmLfence() with arch-generic API SpeculationBarrier(). Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdeModulePkg/FaultTolerantWrite: Update to consume SpeculationBarrierHao Wu2018-12-251-4/+4
| | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1417 Since BaseLib API AsmLfence() is a x86 arch specific API and should be avoided using in generic codes, this commit replaces the usage of AsmLfence() with arch-generic API SpeculationBarrier(). Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdePkg/BaseLib: Introduce new SpeculationBarrier APIHao Wu2018-12-255-0/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1417 X86 specific BaseLib API AsmLfence() was introduced to address the Spectre Variant 1 (CVE-2017-5753) issue. The purpose of this API is to insert barriers to stop speculative execution. However, the API is highly architecture (X86) specific, and thus should be avoided using across generic code. To address this issue, this patch will add a new BaseLib API called SpeculationBarrier(). Different architectures will have different implementations for this API. For IA32 and x64, the implementation of SpeculationBarrier() will directly call AsmLfence(). For ARM and AARCH64, this patch will add a temporary empty implementation as a placeholder. We hope experts in ARM can help to contribute the actual implementation. For EBC, similar to the ARM and AARCH64 cases, a temporary empty implementation is added. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* NetworkPkg: Remove some clarification from UefiPxeBcDxe.infSiyuan Fu2018-12-241-6/+0
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to remove the clarification about usage/difference between those drivers in MdeModulePkg and NetworkPkg, since the MdeModulePkg one have been deleted. Cc: Jiaxin Wu <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
* MdeModulePkg: Delete UefiPxeBcDxe in MdeModulePkg.Siyuan Fu2018-12-2415-7905/+0
| | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to delete the UefiPxeBcDxe driver in MdeModulePkg. The driver will not be maintained and can't co-work with the dual-stack UefiPxeBcDxe in NetworkPkg. People should use below NetworkPkg drivers instead: NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf Which is actively maintained with more bug fixes and new feature support. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* NetworkPkg: Remove some clarification from IScsiDxe.infSiyuan Fu2018-12-241-10/+0
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to remove the clarification about usage/difference between those drivers in MdeModulePkg and NetworkPkg, since the MdeModulePkg one have been deleted. Cc: Jiaxin Wu <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
* MdeModulePkg: Delete IScsiDxe in MdeModulePkg.Siyuan Fu2018-12-2433-11846/+0
| | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to delete the IScsiDxe driver in MdeModulePkg. The driver will not be maintained and can't co-work with the dual-stack IScsiDxe in NetworkPkg. People should use below NetworkPkg drivers instead: NetworkPkg/IScsiDxe/IScsiDxe.inf Which is actively maintained with more bug fixes and new feature support. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* NetworkPkg: Remove some clarification from TcpDxe.infSiyuan Fu2018-12-241-6/+0
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to remove the clarification about usage/difference between those drivers in MdeModulePkg and NetworkPkg, since the MdeModulePkg one have been deleted. Cc: Jiaxin Wu <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
* MdeModulePkg: Delete Tcp4Dxe in MdeModulePkg.Siyuan Fu2018-12-2423-12847/+0
| | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1278 This patch is to delete the Tcp4Dxe driver in MdeModulePkg. The driver will not be maintained and can't co-work with the dual-stack TcpDxe in NetworkPkg. People should use below NetworkPkg drivers instead: NetworkPkg/TcpDxe/TcpDxe.inf Which is actively maintained with more bug fixes and new feature support. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* BaseTools/tools_def ARM: use softfloat target for CLANG3xArd Biesheuvel2018-12-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'arm-linux-gnueabihf' target triplet we use for CLANG35 and CLANG38 specifies a hardfloat target, and so the binaries that are emitted are annotated as using VFP registers for passing floating point arguments, even though no VFP is used anywhere in the code. This works fine as long as we don't try to link against code that uses software floating point, but combining object files with different floating point calling conventions is not permitted. So switch to the softfloat arm-linux-gnueabi triplet instead. This affects both the name Clang uses when invoking the linker, and the arguments it passes to it, and we are mostly interested in the latter (since any version of GNU ld.bfd will do the right thing as long as it targets EABI ARM) For native builds, this change has no effect, since the unprefixed system linker will take priority, and so Clang will pass the right arguments to whichever linker happens to be the system linker. For cross builds, the fact that Clang composes the name of the linker by prefixing '-ld' with the target triplet implies that users will have to switch to a version of binutils that targets arm-linux-gnueabi rather than arm-linux-gnueabihf. Note that the GCCx toolchain targets can use either when building for ARM so this does not create a need to install two versions of the ARM cross toolchain. Also, note that all ARM toolchains in the GCC family are already documented as requiring a toolchain that targets arm-linux-gnueabi and not arm-linux-gnueabihf. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmScmiDxe: Add clock enable functionJeff Brasen2018-12-215-0/+268
| | | | | | | | | | | | | | | | Add function to allow enabling and disabling of the clock using the SCMI interface. Add gArmScmiClock2ProtocolGuid to distinguish platforms that support new API from those that just have the older protocol. SCMI_CLOCK2_PROTOCOL also adds a version parameter to allow for future changes. It is placed after the functions that are present in the existing protocol to allow SCMI_CLOCK2_PROTOCOL to be cast to SCMI_CLOCK_PROTOCOL so that only a single implementation of those function are needed. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* Maintainers.txt: Change DynamicTablesPkg maintainerSami Mujawar2018-12-211-1/+1
| | | | | | | | | | | Removing Evan and adding Alexei as the co-maintainer. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Alexei Fedorov <alexei.fedorov@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* Upgrade OpenSSL to 1.1.0jJian J Wang2018-12-216-7/+20
| | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1393 BZ#1089 (https://bugzilla.tianocore.org/show_bug.cgi?id=1089) requests to upgrade the OpenSSL to the latest 1.1.1 release. Since OpenSSL-1.1.1 has many changes, more porting efforts and feature evaluation are needed. This might lead to a situation that it cannot catch the Q1'19 stable tag. One of the solution is upgrade current version (1.1.0h) to 1.1.0j. According to following web page in openssl.org, all security issues solved in 1.1.1 have been also back-ported to 1.1.0.j. This can make sure that no security vulnerabilities left in edk2 master before 1.1.1. https://www.openssl.org/news/vulnerabilities-1.1.1.html Cc: Ting Ye <ting.ye@intel.com> Cc: Gang Wei <gang.wei@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Gang Wei <gang.wei@intel.com> Reviewed-by: Ting Ye <ting.ye@intel.com>
* UefiCpuPkg/CpuExceptionHandlerLib: Fix spelling issueMike Maslenkin2018-12-215-5/+5
| | | | | | | | | | *Excpetion* should be *Exception* Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Mike Maslenkin <mike.maslenkin@gmail.com> CC: Eric Dong <eric.dong@intel.com> CC: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* ArmPlatformPkg/PL011SerialPortLib: use untyped PCD for register baseArd Biesheuvel2018-12-202-8/+10
| | | | | | | | | | | | | Use an untyped PCD reference for PcdSerialRegisterBase, so that the library gets built without hardcoded values, permitting modules to override the default serial port. This allows SerialDxe to use a different serial port from the one used for DEBUG output (which often gets occluded due to the console driver clearing the screen). Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* Readme.md: Add edk2 release tag and edk2 release planLiming Gao2018-12-201-0/+4
| | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=1364 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
* ArmPkg/GenericWatchdogDxe: implement RegisterHandler() methodArd Biesheuvel2018-12-201-9/+25
| | | | | | | | | | | Even though UEFI does not appear to use it, let's implement the complete PI watchdog protocol, including handler registration, which will be invoked before the ResetSystem() runtime service when the watchdog timer expires. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/GenericWatchdogDxe: clean up the codeArd Biesheuvel2018-12-202-55/+61
| | | | | | | | | | Clean up the code, by adding missing STATIC modifiers, drop redundant casts, and get rid of the 'success handling' anti pattern in the entry point code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/SP805WatchdogDxe: switch to interrupt modeArd Biesheuvel2018-12-203-27/+80
| | | | | | | | | | | | | | | | | The SP805 watchdog driver doesn't implement the PI watchdog protocol fully, but always simply resets the system if the watchdog time runs out. However, the hardware does support the intended usage model, as long as the SP805 is wired up correctly. So let's implement interrupt based mode involving a handler that is registered by the DXE core and invoked when the watchdog runs out. In the interrupt handler, we invoke the notify function if one was registered, before calling the ResetSystem() runtime service (as per the UEFI spec) Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/SP805WatchdogDxe: cosmetic cleanupArd Biesheuvel2018-12-202-56/+52
| | | | | | | | | Before fixing the SP805 driver, let's clean it up a bit. No functional changes. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* MdePkg/Arm/ProcessorBind.h: fix copy/paste errorArd Biesheuvel2018-12-201-1/+1
| | | | | | | | | Instead of #defining MAX_ALLOC_ADDRESS to MAX_ADDRESS as intended, it is #defined to itself, causing all ARM builds to break. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmVirtPkg/MemoryInitPeiLib: split memory HOB based on MAX_ALLOC_ADDRESSArd Biesheuvel2018-12-201-4/+4
| | | | | | | | | | | | | | | | | | The current ArmVirtMemoryInitPeiLib code splits the memory region passed via PcdSystemMemoryBase/PcdSystemMemorySize in two if the region extends beyond the MAX_ADDRESS limit. This was introduced for 32-bit ARM, which may support more than 4 GB of physical address space, but cannot address all of it via a 1:1 mapping, and a single region that is not mappable in its entirety is unusable by the PEI core. AArch64 is in a similar situation now: platforms may support more than 256 TB of physical address space, but only 256 TB is addressable by the CPU, and so a memory region that extends from below this limit to above it should be split. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* ArmPlatformPkg/MemoryInitPeim: take MAX_ALLOC_ADDRESS into accountArd Biesheuvel2018-12-201-3/+3
| | | | | | | | | Limit the PEI memory region so it will not extend beyond what we can address architecturally when running with 4 KB pages. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmMmuLib: take MAX_ALLOC_ADDRESS into accountArd Biesheuvel2018-12-201-1/+1
| | | | | | | | | | | | | When creating the page tables for the 1:1 mapping, ensure that we don't attempt to map more than what is architecturally permitted when running with 4 KB pages, which is 48 bits of VA. This will be reflected in the value of MAX_ALLOC_ADDRESS once we override it for AArch64, so use that macro instead of MAX_ADDRESS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* MdeModulePkg/Dxe/Page: take MAX_ALLOC_ADDRESS into accountArd Biesheuvel2018-12-201-26/+26
| | | | | | | | | | | Take MAX_ALLOC_ADDRESS into account in the implementation of the page allocation routines, so that they will only return memory that is addressable by the CPU at boot time, even if more memory is available in the GCD memory map. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdeModulePkg/Dxe/Gcd: disregard memory above MAX_ALLOC_ADDRESSArd Biesheuvel2018-12-201-4/+4
| | | | | | | | | | | | | Update the GCD memory map initialization code so it disregards memory that is not addressable by the CPU at boot time. This only affects the first memory descriptor that is added, other memory descriptors are permitted that describe memory ranges that may be accessible to the CPU itself only when executing under the OS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* MdePkg/Base: introduce MAX_ALLOC_ADDRESSArd Biesheuvel2018-12-205-0/+25
| | | | | | | | | | | | | | | | On some architectures, the maximum representable address deviates from the virtual address range that is accessible by the firmware at boot time. For instance, on AArch64, UEFI mandates a 4 KB page size, which limits the address space to 48 bits, while more than that may be populated on a particular platform, for use by the OS. So introduce a new macro MAX_ALLOC_ADDRESS, which represent the maximum address the firmware should take into account when allocating memory ranges that need to be accessible by the CPU at boot time. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
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