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* RedfishPkg: Add PCD definition to RedfishPkgAbner Chang2020-11-111-0/+22
| | | | | | | | | | | | | | | This PCD is the UEFI device path which is used as the Redfish host interface. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Signed-off-by: Ting Ye <ting.ye@intel.com> Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Fan Wang <fan.wang@intel.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Nickle Wang <nickle.wang@hpe.com> Cc: Peter O'Hanley <peter.ohanley@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* MdeModulePkg/AtaAtapiPassThru: Trace ATA packetsAlbecki, Mateusz2020-11-111-0/+94
| | | | | | | | | | | | | This simplify ATA driver debugging all ATA packets will be printed to debug port on DEBUG_VERBOSE level along with the packet execution status. Additionally failed packets and the failed packet execution status will be printed on DEBUG_ERROR level. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/AtaAtapiPassThru: Restart failed packetsAlbecki, Mateusz2020-11-112-125/+182
| | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3026 This commit adds code to restart the ATA packets that failed due to the CRC error or other link condition. For sync transfers the code will try to get the command working for up to 5 times. For async transfers, the command will be retried until the timeout value timeout specified by the requester is reached. For sync case the count of 5 retries has been chosen arbitrarily and if needed can be increased or decreased. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/AtaAtapiPassThru: Add SATA error recovery flowAlbecki, Mateusz2020-11-112-24/+159
| | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3025 This commit adds error recovery flow on SATA port when the error condition is reported. Commit only implements SATA port reset flow which is executed when PxTFD indicates BSY or DRQ. Commit does not implement HBA level reset. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/AtaAtapiPassThru: Check IS to check for command completionAlbecki, Mateusz2020-11-112-171/+132
| | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3024 AHCI driver used to poll D2H register type to determine whether the FIS has been received. This caused a problem of long timeouts when the link got a CRC error and the FIS never arrives. To fix this this change switches AHCI driver to poll the IS register which will signal both the reception of FIS and the occurrence of error. Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/DriverSampleDxe: Add HII sample optionsAbner Chang2020-11-113-1/+48
| | | | | | | | | | | | | | | Add x-uefi-ns keyword REST_STYLE HII option and non x-uefi keyword REST_STYLE HII option. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/Library: Revise HiiLib to check REST_STYLEAbner Chang2020-11-111-7/+7
| | | | | | | | | | | | | | This change checks REST_STYLE flag. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Signed-off-by: Ting Ye <ting.ye@intel.com> Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Fan Wang <fan.wang@intel.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* BaseTools/VfrCompile: VFR compiler supports REST_STYLE in HII optionAbner Chang2020-11-111-3/+22
| | | | | | | | | | | | | | | | | | Add REST_STYLE support on VFR language BZ: 2916 https://bugzilla.tianocore.org/show_bug.cgi?id=2916 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Signed-off-by: Ye Ting <ting.ye@intel.com> Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Signed-off-by: Wang Fan <fan.wang@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Add GUID for REST Style FormsetAbner Chang2020-11-111-1/+1
| | | | | | | | | | | | | | | | | BZ: 2916 https://bugzilla.tianocore.org/show_bug.cgi?id=2916 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Signed-off-by: Ye Ting <ting.ye@intel.com> Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Signed-off-by: Wang Fan <fan.wang@intel.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* UefiCpuPkg/MpInitLib: For SEV-ES guest, set stack based on processor numberTom Lendacky2020-11-101-1/+6
| | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 Set the SEV-ES reset stack address for an AP based on the processor number instead of the APIC ID in case the APIC IDs are not zero-based and densely packed/enumerated. This will ensure an AP reset stack address does not get set outside of the AP reset stack memory allocation. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Acked-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <24866de07d2a954dec71df70972f1851273020d8.1604685192.git.thomas.lendacky@amd.com>
* UefiCpuPkg, OvmfPkg: Disable interrupts when using the GHCBTom Lendacky2020-11-107-25/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 The QemuFlashPtrWrite() flash services runtime uses the GHCB and VmgExit() directly to perform the flash write when running as an SEV-ES guest. If an interrupt arrives between VmgInit() and VmgExit(), the Dr7 read in the interrupt handler will generate a #VC, which can overwrite information in the GHCB that QemuFlashPtrWrite() has set. This has been seen with the timer interrupt firing and the CpuExceptionHandlerLib library code, UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ Xcode5ExceptionHandlerAsm.nasm and ExceptionHandlerAsm.nasm reading the Dr7 register while QemuFlashPtrWrite() is using the GHCB. In general, it is necessary to protect the GHCB whenever it is used, not just in QemuFlashPtrWrite(). Disable interrupts around the usage of the GHCB by modifying the VmgInit() and VmgDone() interfaces: - VmgInit() will take an extra parameter that is a pointer to a BOOLEAN that will hold the interrupt state at the time of invocation. VmgInit() will get and save this interrupt state before updating the GHCB. - VmgDone() will take an extra parameter that is used to indicate whether interrupts are to be (re)enabled. Before exiting, VmgDone() will enable interrupts if that is requested. Fixes: 437eb3f7a8db7681afe0e6064d3a8edb12abb766 Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <c326a4fd78253f784b42eb317589176cf7d8592a.1604685192.git.thomas.lendacky@amd.com>
* OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Fix erase blocks for SEV-ESTom Lendacky2020-11-101-2/+2
| | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 The original SEV-ES support missed updating the QemuFlashEraseBlock() function to successfully erase blocks. Update QemuFlashEraseBlock() to call the QemuFlashPtrWrite() to be able to successfully perform the commands under SEV-ES. Fixes: 437eb3f7a8db7681afe0e6064d3a8edb12abb766 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <309c5317a3107bd0e650be20731842a2e1d4b59a.1604685192.git.thomas.lendacky@amd.com>
* OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Set the SwScratch valid bitTom Lendacky2020-11-101-0/+1
| | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 All fields that are set in the GHCB should have their associated bit in the GHCB ValidBitmap field set. Add support to set the bit for the scratch area field (SwScratch). Fixes: 437eb3f7a8db7681afe0e6064d3a8edb12abb766 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <cc8c8449740d2be0b287e6c69d48bf6cb067c7d8.1604685192.git.thomas.lendacky@amd.com>
* UefiCpuPkg/MpInitLib: Set the SW exit fields when performing VMGEXITTom Lendacky2020-11-101-0/+6
| | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 All fields that are set in the GHCB should have their associated bit in the GHCB ValidBitmap field set. Add support to set the bits for the software exit information fields when performing a VMGEXIT (SwExitCode, SwExitInfo1, SwExitInfo2). Fixes: 20da7ca42a33d3ef767ce4129f11496af7f67c9f Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Acked-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <6e11dd7e161bddeacc3fb4817467cef24510c31c.1604685192.git.thomas.lendacky@amd.com>
* OvmfPkg/VmgExitLib: Set the SwScratch valid bit for MMIO eventsTom Lendacky2020-11-101-0/+5
| | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 All fields that are set in the GHCB should have their associated bit in the GHCB ValidBitmap field set. Add support to set the bit for the scratch area field (SwScratch). Fixes: c45f678a1ea2080344e125dc55b14e4b9f98483d Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <45ccb63c2dadd834e2c47bf10c9e59c6766d7eb6.1604685192.git.thomas.lendacky@amd.com>
* OvmfPkg/VmgExitLib: Set the SwScratch valid bit for IOIO eventsTom Lendacky2020-11-101-0/+1
| | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 All fields that are set in the GHCB should have their associated bit in the GHCB ValidBitmap field set. Add support to set the bit for the scratch area field (SwScratch). Fixes: 0020157a9825e5f5784ff014044f11c0558c92fe Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <f817d034cea37fa78e00e86f61c3445f1208226d.1604685192.git.thomas.lendacky@amd.com>
* OvmfPkg/VmgExitLib: Set the SW exit fields when performing VMGEXITTom Lendacky2020-11-101-0/+4
| | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 All fields that are set in the GHCB should have their associated bit in the GHCB ValidBitmap field set. Add support to set the bits for the software exit information fields when performing a VMGEXIT (SwExitCode, SwExitInfo1, SwExitInfo2). Fixes: 61bacc0fa16fd6f595a2c4222425cb6286e19977 Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <986e157c13bf33e529b1d16ab1b52e99a74a734f.1604685192.git.thomas.lendacky@amd.com>
* OvmfPkg/VmgExitLib: Implement new VmgExitLib interfacesTom Lendacky2020-11-102-87/+85
| | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 The VmgExitLib library added two new interfaces, VmgSetOffsetValid() and VmgIsOffsetValid(), that must now be implemented in the OvmfPkg version of the library. Implement VmgSetOffsetValid() and VmgIsOffsetValid() and update existing code, that is directly accessing ValidBitmap, to use the new interfaces. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <939e9dc375e6085bc67942fe9a00ecd4c6b77ecf.1604685192.git.thomas.lendacky@amd.com>
* UefiCpuPkg/VmgExitLib: Add interfaces to set/read GHCB ValidBitmap bitsTom Lendacky2020-11-102-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 In upcoming patches, the setting of the bits in the GHCB ValidBitmap will be performed in multiple places. In order to reduce code duplication, add an interface, VmgSetOffsetValid(), to VmgExitLib library to perform this function. Also, to keep management of the ValidBitmap within the library, add an inteface, VmgIsOffsetValid(), to return whether the bit in the ValidBitmap is set for a specified offset. The new VmgSetOffsetValid() function is a VOID function and will be an empty function in the VmgExitLibNull implementation of the VmgExitLib library. The new VmgIsOffsetValid() function returns a BOOLEAN to indicate if the offset is valid. This will always return FALSE in the VmgExitLibNull implementation of the VmgExitLib library. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Acked-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <0bcb2373f8c6e0171ae277d3d7c2eb284621355e.1604685192.git.thomas.lendacky@amd.com>
* MdePkg: Clean up GHCB field offsets and save areaTom Lendacky2020-11-101-26/+17
| | | | | | | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3008 Use OFFSET_OF () and sizeof () to calculate the GHCB register field offsets instead of hardcoding the values in the GHCB_REGISTER enum. Define only fields that are used per the GHCB specification, which will result in removing some fields and adding others. Also, remove the DR7 field from the GHCB_SAVE_AREA structure since it is not used/defined in the GHCB specification and then rename the reserved fields as appropriate. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <5e9245c7600b9b2d55dd7586b8df28b91b75b72b.1604685192.git.thomas.lendacky@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* BaseTools: Limit command line length.Mingyue Liang2020-11-102-9/+44
| | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2528 Currently, CL command contains multiple C files will be compiled, and that caused command line too long, which may trigger build error. In order to solve this issue, the following rules is used in this scene: If the number of C files is greater than one, a txt file will be used to record these C files, and replaces the corresponding content in command line with the file name. Else (only one C file listed in the command line), the length of the whole CL command line will determine whether use a file to record. If the length exceeds the limited max length, use the recording file; else C file name directly listed in the command line Signed-off-by: Mingyue Liang <mingyuex.liang@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools: Update report map file formatYunhua Feng2020-11-101-1/+1
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2977 For a source-level BIOS debugger the .map files are quite useful with one major shortcoming: the debugger cannot know, solely from the .map file, the format (PE/COFF vs. TE) of the image included in the final BIOS ROM Update report map file format Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools: Add image type into generate map fileYunhua Feng2020-11-101-1/+6
| | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2977 For a source-level BIOS debugger the .map files are quite useful with one major shortcoming: the debugger cannot know, solely from the .map file, the format (PE/COFF vs. TE) of the image included in the final BIOS ROM Add Type=PE or TE in the map file Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* FmpDevicePkg/FmpDxe: Call FmpDeviceLib WithStatus() functionsMichael Kubacki2020-11-101-4/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6ad819c introduced two new functions in FmpDeviceLib: 1. FmpDeviceCheckImageWithStatus () 2. FmpDeviceSetImageWithStatus () These functions allow an FmpDeviceLib implementation to return a Last Attempt Status code value within the Device Library range from LAST_ATTEMPT_STATUS_DEVICE_LIBRARY_MIN_ERROR_CODE_VALUE to LAST_ATTEMPT_STATUS_DEVICE_LIBRARY_MAX_ERROR_CODE_VALUE. To maintain backward compatibility, commit 6ad819c did not update the FmpDxe driver to invoke these functions. FmpDeviceLib instances should update their FmpDeviceCheckImage () function to simply call FmpDeviceCheckImageWithStatus (). Similarly, FmpDeviceSetImage () should simply call FmpDeviceSetImageWithStatus (). This is demonstrated in the implementation of these functions in FmpDevicePkg/Library/FmpDeviceLibNull/FmpDeviceLib.c. By doing so, the library can remain compatible with FmpDxe implementations before and after this transition. This commit updates FmpDxe to call the WithStatus () version of these functions enabling the Last Attempt Status code returned to be accessible to FmpDxe. Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Guomin Jiang <guomin.jiang@intel.com> Cc: Wei6 Xu <wei6.xu@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Wei6 Xu <wei6.xu@intel.com> Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
* BaseTools: Incremental build issue for included ASI file's deletion.Mingyue Liang2020-11-101-2/+1
| | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2972 When using incremental build to delete an included xxx.asi file from the ASL file, the xxx.asl.trim.deps file generated by previous build process will not be deleted from the OUTPUT directory, which caused the dependency file still include the xxx.asl.trim.deps file. If the include file is deleted and DEPs is empty. Signed-off-by: Mingyue Liang <mingyuex.liang@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* MdeModulePkg/Core/Dxe: log memory base and length, after lib ctors againLaszlo Ersek2020-11-061-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CoreInitializeMemoryServices() logs "BaseAddress" and "Length" with DEBUG() before DxeMain() calls ProcessLibraryConstructorList() explicitly. (Library construction is not an automatic part of the DXE Core entry point.) So those DEBUG()s in CoreInitializeMemoryServices() are issued against an un-constructed DebugLib, and also against a -- possibly underlying -- un-constructed SerialPortLib. Some DebugLib instances can deal with this (see for example commit 91a5b1365075, "OvmfPkg/PlatformDebugLibIoPort: fix port detection for use in the DXE Core", 2018-08-06), while some others can't (see for example the DebugLib instance "MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf" coupled with the SerialPortLib instance "ArmVirtPkg/Library/FdtPL011SerialPortLib/FdtPL011SerialPortLib.inf"). Addressing this issue in a SerialPortLib instance that underlies BaseDebugLibSerialPort seems wrong; either the DebugLib instance should cope directly with being called un-constructed (see again commit 91a5b1365075), or the DXE Core should log relevant information *at least* after library instances have been constructed. This patch implements the latter (only for the "BaseAddress" and "Length" values calculated by CoreInitializeMemoryServices()). Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Jeff Brasen <jbrasen@nvidia.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20201103161557.30621-1-lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* BaseTools: Fix BaseTools nmake cleanall hang issuefengyunhua2020-11-061-1/+4
| | | | | | | | | | | | | | | | | On windows system, when use command chcp displays the number of the active console code page, if the active console code is 936, run make cleanall in the BaseTools will hang. Issue reproduce step: chcp 936 edksetup.bat VS2015 cd BaseTools nmake cleanall Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* ShellPkg:Fix bug in FileBuffer.cEnze Zhu2020-11-061-0/+2
| | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2998 In the function FileBufferCutLine(),set the CutLine pointer to NULL, The function header specifies that the pointer is valid on a successful or failed return code. Signed-off-by: Enze Zhu <zhuenze@byosoft.com.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* BaseTools: Enable Module Scope Structure PcdBob Feng2020-11-057-74/+326
| | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2648 This patch is to enable the Module scoped Structure Pcd usage. User can set structure pcd field value in module scope. For example, under the [components] section of a dsc file, user can override some field value for a specific module. Package/Module.inf{ <PcdsFixedAtBuild> gUefiTokenSpaceGuid.StructurePcdModule.FieldName | 5 } Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Tested-by: Liming Gao <gaoliming@byosoft.com.cn> Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/Gcd: Check memory allocation when initializing memoryJeff Brasen2020-11-051-0/+58
| | | | | | | | | | | | CoreInitializeMemoryServices was not checking for any existing memory allocation created in the HOB producer phase. If there are memory allocations outside of the region covered by the HOB List then Gcd could select that region for memory which can result in the memory allocation to not be handled and memory overwrites. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* BaseTools: Remove the dependency on the build intermediate fileBob Feng2020-11-041-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | When generating compressed section, the build tool rely on the build intermediate files, which were generated in last build, to get the file list. This method will cause the incremental build to generate incorrect build result. To reproduce this incremental build error, you can do: 1. build Ovmf 2. change the module OvmfPkg\AcpiTables a source file Facp.aslc name from Facp.aslc to Facpxxx.aslc. 3. change the Facp.aslc file name in [sources] section of AcpiTables.inf 4. incremental build Ovmf you will see the in AcpiTables module Makefile, the corresponding Facp.acpi file is not changed. This patch is to make the build always get file list from the INF. Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* DynamicTablesPkg: Add SSDT CMN-600 Table generatorPierre Gondois2020-11-038-6/+943
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Generic ACPI for Arm Components 1.0 Platform Design Document, s2.6.4 "ASL code examples" provides information to describe an Arm CoreLink CMN-600 Coherent Mesh Network using an ASL definition block table. The SSDT CMN-600 Table Generator uses the Configuration Manager protocol to obtain the following information about the CMN-600 device on the platform: - the PERIPHBASE address location and address range; - the ROOTNODEBASE address location; - the number of Debug and Trace Controller (DTC) and their respective interrupt number; The CMN-600 mesh is described using the CM_ARM_CMN_600_INFO and CM_ARM_EXTENDED_INTERRUPT structures in the Configuration Manager. The SSDT CMN-600 Table generator: - gets the CMN-600 hardware information from the configuration manager. - uses the AmlLib interfaces to parse the AML template BLOB and construct an AML tree. - uses the AmlLib to update: - the "_UID" value; - the address location and range of the PERIPHBASE; - the address location of the ROOTNODEBASE; - the number of Debug and Trace Controller (DTC) and their respective interrupt number; - serializes the AML tree to an output buffer. This output buffer contains the fixed-up AML code, which is then installed as an ACPI SSDT table. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Co-authored-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
* MdePkg: Definitions for Extended Interrupt FlagsSami Mujawar2020-11-031-0/+11
| | | | | | | | | | | Add Interrupt Vector Flag definitions for Extended Interrupt Descriptor, and macros to test the flags. Ref: ACPI specification 6.4.3.6 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* BaseTools: Update the FV Space Information to display decimal and Hexfengyunhua2020-11-031-1/+4
| | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3009 Update the FV Space Information to display decimal and Hex FV Space Information before format: SECFV [13%Full] 212992 total, 28400 used, 184592 free Updated format: SECFV [13%Full] 212992 (0x34000) total, 28400 (0x6ef0) used, 184592 (0x2d110) free Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Yuwei Chen <yuwei.chen@intel.com> Signed-off-by: Yunhua Feng <fengyunhua@byosoft.com.cn> Reviewed-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* RedfishPkg/Include: EFI Redfish Discover Protocol header fileAbner Chang2020-11-022-0/+203
| | | | | | | | | | | | | | Header file of EFI Redfish Discover Protocol for UEFI spec v2.8 Section 31.1. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* RedfishPkg: Add RedfishHostInterfaceDxe to RedfishPkgAbner Chang2020-11-022-0/+9
| | | | | | | | | | | | | | Add RedfishHostInterfaceDxe and PlatformHostInterfaceLibNull to Redfish package. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* RedfishPkg/RedfishHostInterfaceDxe: Create SMBIOS type 42 recordAbner Chang2020-11-022-0/+293
| | | | | | | | | | | | | | | | This is the abstract driver to consume the contents of SMBIOS type 42h device descriptor and protocol type data which provided by PlatformHostInterfaceLib, and create SMBIOS type 42 record through EFI SMBIOS protocol. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* RedfishPkg/PlatformHostInterfaceLib: Platform NULL libAbner Chang2020-11-022-0/+85
| | | | | | | | | | | | | NULL instance of PlatformHostInterfaceLib. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* RedfishPkg/Include: PlatformHostInterfaceLib header fileAbner Chang2020-11-021-0/+52
| | | | | | | | | | | Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* RedfishPkg/Include: Definitions of SMBIOS Redfish Host InterfaceAbner Chang2020-11-021-0/+169
| | | | | | | | | | | | | | | | Add definitions of SMBIOS Type 42 Host Interface. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Signed-off-by: Siyuan Fu <siyuan.fu@intel.com> Signed-off-by: Fan Wang <fan.wang@intel.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* RedfishPkg: Changes on RedfishPkg for CI testAbner Chang2020-11-021-1/+2
| | | | | | | | | | | | | | Add accepted dependency of RedfishPkg in RedfishPkg CI yaml file. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* RedfishPkg/RestJsonStructureDxe: EFI REST JSON Structure ProtocolAbner Chang2020-11-024-0/+669
| | | | | | | | | | | | | | Implementation of EFI_REST_JSON_STRUCTURE_PROTOCOL, refer to UEFI spec 2.8 Section 29.7.3 EFI REST JSON Resource to C Structure Converter. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Nickle Wang <nickle.wang@hpe.com>
* MdePkg/Include: Definitions of EFI REST JSON Structure ProtocolAbner Chang2020-11-022-0/+164
| | | | | | | | | | | | | | | | | Add definitions of EFI REST JSON Structure according to UEFI spec 2.8 Section 29.7.3 EFI REST JSON Resource to C Structure Converter. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Fan Wang <fan.wang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Nickle Wang <nickle.wang@hpe.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/XhciDxe: Retry device slot init on failureJon Hunter2020-11-022-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | With some super-speed USB mass storage devices it has been observed that a USB transaction error may occur when attempting the set the device address during enumeration. According the the xHCI specification (section 4.6.5) ... "A USB Transaction ErrorCompletion Code for an Address Device Command may be due to a Stall response from a device. Software should issue a Disable Slot Commandfor the Device Slot then an Enable Slot Command to recover from this error." To fix this, retry the device slot initialization if it fails due to a device error. Change was verified using a superspeed mass storage device that was occasionally failing to enumerate in UEFI. With this change this failure to enumerate was resolved. This failure was also only seen in UEFI and not in the OS. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* MdeModulePkg/AcpiTableDxe: use pool allocation for RSDP if possibleArd Biesheuvel2020-10-301-9/+24
| | | | | | | | | | Use a pool allocation for the RSDP ACPI root pointer structure if no memory limit is in effect that forces us to use page based allocation, which may be wasteful if they get rounded up to 64 KB as is the case on AArch64. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/AcpiTableDxe: use pool allocation for RSDT/XSDT if possibleArd Biesheuvel2020-10-301-46/+72
| | | | | | | | | | If no memory allocation limit is in effect for ACPI tables, prefer pool allocations over page allocations, to avoid wasting memory on systems where page based allocations are rounded up to 64 KB, such as AArch64. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdeModulePkg/AcpiTableDxe: use pool allocations when possibleArd Biesheuvel2020-10-303-28/+66
| | | | | | | | | | | | | | | | On AArch64 systems, page based allocations for memory types that are relevant to the OS are rounded up to 64 KB multiples. This wastes some space in the ACPI table memory allocator, since it uses page based allocations in order to be able to place the ACPI tables low in memory. Since the latter requirement does not exist on AArch64, switch to pool allocations for all ACPI tables except the root tables if the active allocation policy permits them to be anywhere in memory. The root tables will be handled in a subsequent patch. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* MdePkg: Fix SmBios.h PROCESSOR_CHARACTERISTIC_FLAGS to be UINT16Rebecca Cran2020-10-301-11/+11
| | | | | | | | | The ProcessorCharacteristics is a UINT16 field, so the PROCESSOR_CHARACTERISTIC_FLAGS bitfield should be UINT16 too. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* MdePkg: Update SmBios.h to add SMBIOS 3.4.0 ARM64 SoC ID fieldRebecca Cran2020-10-301-1/+2
| | | | | | | | | | SMBIOS 3.4.0 defines bit 9 of the Type 4 table Processor Characteristics field to be the ARM64 SoC ID support. Add it to the PROCESSOR_CHARACTERISTIC_FLAGS struct bitfield. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
* ShellPkg: Add ARM64 SoC ID to Processor Characteristics in smbiosviewRebecca Cran2020-10-301-0/+4
| | | | | | | | | | SMBIOS 3.4.0 defines bit 9 of the Type 4 table Processor Characteristics field to be the ARM64 SoC ID support. Add support for it to the smbiosview command. Signed-off-by: Rebecca Cran <rebecca@nuviainc.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 15:31:57 +0000