summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* ArmVirtPkg/ArmVirtPrePiUniCoreRelocatable: deal with relaxed XIP alignmentArd Biesheuvel2016-08-021-2/+3
| | | | | | | | | | | | | | | | | | | | Commit b89919ee8f8c ("BaseTools AARCH64: override XIP module linker alignment to 32 bytes") updated the various AARCH64 toolchain definitions to allow SEC, PEI_CORE and PEIM modules to be built with minimal alignment requirements even when using the AArch64 small code model which normally requires 4 KB section alignment. This involves conversion of ADRP instructions into ADR instructions, which can only be done reliably if the ELF and the PE/COFF sections appear at the same offset modulo 4 KB. The ArmVirtPrePiUniCoreRelocatable linker script did not yet take this into account, so update it by starting the .text section at the next appropriately aligned offset PECOFF_HEADER_SIZE bytes into the image. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com>
* BaseTools: Keep the Pcd order in the Asbuilt Inf is same with SourceYonghong Zhu2016-08-021-9/+11
| | | | | | | | | | | The original behavior is that in the Asbuilt inf Pcd's order is base on the Pcd's offset. Now we change the order to keep it is same with the Pcd order in the source inf file. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ShellBinPkg Arm/AArch64 Shell binary updateArd Biesheuvel2016-08-024-0/+0
| | | | | | | | | | | The binaries of ShellBinPkg are generated with ShellPkg from b89919ee8f8c ("BaseTools AARCH64: override XIP module linker alignment to 32 bytes") Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> # AArch64 Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> # ARM
* BaseTools AARCH64: override XIP module linker alignment to 32 bytesArd Biesheuvel2016-08-022-0/+18
| | | | | | | | | | | | | | | Now that GenFw converts small code model ADRP instructions to ADR on the fly, we can reduce the alignment for XIP modules, where large alignment values may cause considerable waste of flash space due to excessive padding. This limits the module size to 1 MB, but this is not a concern in practice. So set the XIP section alignment to 0x20 for DEBUG_GCC49, DEBUG_GCC5 and *_CLANG35, all of which use the small code model. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* BaseTools/GenFw AARCH64: convert ADRP to ADR instructions if binary size ↵Ard Biesheuvel2016-08-021-9/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | allows it The ADRP instruction in the AArch64 ISA requires the link time and load time offsets of a binary to be equal modulo 4 KB. The reason is that this instruction always produces a multiple of 4 KB, and relies on a subsequent ADD or LDR instruction to set the offset into the page. The resulting symbol reference only produces the correct value if the symbol in question resides at that exact offset into the page, and so loading the binary at arbitrary offsets is not possible. Due to the various levels of padding when packing FVs into FVs into FDs, this alignment is very costly for XIP code, and so we would like to relax this alignment requirement if possible. Given that symbols that are sufficiently close (within 1 MB) of the reference can also be reached using an ADR instruction which does not suffer from this alignment issue, let's replace ADRP instructions with ADR after linking if the offset can be encoded in this instruction's immediate field. Note that this only makes sense if the section alignment is < 4 KB. Otherwise, replacing the ADRP has no benefit, considering that the subsequent ADD or LDR instruction is retained, and that micro-architectures are more likely to be optimized for ADRP/ADD pairs (i.e., via micro op fusing) than for ADR/ADD pairs, which are non-typical. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* BaseTools GCC: introduce GCC5 toolchain to support GCC v5.x in LTO modeArd Biesheuvel2016-08-022-1/+169
| | | | | | | | | | | | | | | | | | This adds support for GCC 5.x in LTO mode for IA32, X64, ARM and AARCH64. Due to the fact that the GCC project switched to a new numbering scheme where the first digit is now incremented for every major release, the new toolchain is simply called 'GCC5', and is intended to support all GCC v5.x releases. Since IA32 and X64 enable compiler optimizations (-Os) for both DEBUG and RELEASE builds, LTO support is equally enabled for both targets. On ARM and AARCH64, DEBUG builds are not optimized, and so the LTO optimizations are only enabled for RELEASE. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools GCC: drop GNU notes section from EFI imageArd Biesheuvel2016-08-021-0/+6
| | | | | | | | | | | | | | | | Recent versions of GNU ld automatically emit a .notes section into the ELF binary containing a build id. Since this is an allocatable section by default, it will be identified by GenFw as a section that requires PE/COFF conversion, which may cause sections to be moved around unexpectedly. So retain the section, but tag it as INFO, which tells the linker that it should not be accounted for in the binary's memory layout. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ArmPkg: add prebuilt glue binaries for GCC5 LTO supportArd Biesheuvel2016-08-024-0/+88
| | | | | | | | | | | | | | | | | | | | | | | GCC in LTO mode interoperates poorly with non-standard libraries that provide implementations of compiler intrinsics such as memcpy/memset or the stack protector entry points. Such libraries need to be built in non-LTO mode, and then referenced explicitly on the linker command line using a -plugin-opt=-pass-through=-lxxx linker option. However, if these intrinsics are also referenced directly, the LTO version of the code will be pulled in, and will happily satisfy all other references to the same symbol. So add a pair of glue libraries, for ARM and AARCH64, that reference the known intrinsics. Since the binaries live under ArmPkg directly, we can reference them in tools_def.txt. Under LD garbage collection, the object itself will be pruned, and so will the intrinsics that end up unused by the module. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* BaseTools GCC: use 'gcc' as the linker command for GCC44 and laterArd Biesheuvel2016-08-024-92/+97
| | | | | | | | | | | | | | | | To accommodate upcoming GCCx toolchain versions that require 'gcc' to be used as the linker in order to support LTO, switch GCC44 and later (including CLANG35) to a new DLINK build rule that invokes 'gcc' as the linker instead of 'ld'. Since gcc expects its command line arguments in a different format, and expects arguments that it needs to pass to the linker to be prefixed with '-Wl,', this involves changes to most of the DLINK_FLAGS definitions in tools_def.template, as well as some changes to module .INF files that set their own linker options. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools UNIXGCC ELFGCC CYGGCC: clone GCC build rule family into GCCLDArd Biesheuvel2016-08-022-14/+18
| | | | | | | | | | | | Before we can make non-backward compatible changes to the GCC build rules regarding the use of the 'gcc' binary as the linker, clone the existing GCC build rules into a 'GCCLD' build rule family, and move the legacy toolchains UNIXGCC, CYGGCC, CYGGCCxASL and ELFGCC over to it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ArmVirtPkg/ArmVirtPrePiUniCoreRelocatable: ignore .hash and .note sectionsArd Biesheuvel2016-08-021-0/+3
| | | | | | | | | | | | | | | | | | | | | Newer versions of ld automatically emit .gnu.hash and .note.gnu.build-id sections, which are not listed in the linker script, and will end up breaking the build with an allocation conflict, e.g., /usr/bin/aarch64-linux-gnu-ld: section .note.gnu.build-id loaded at [0000000000000000,0000000000000023] overlaps section .text loaded at [0000000000000000,0000000000017dbf] Since we don't require or care about these sections, update the linker script so that they are discarded. Note that this involves emitting the .note.gnu.build-id section into a non-allocatable segment to prevent the linker from noticing that it is being discarded (and subsequently complaining about it) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com>
* BaseTools CLANG35: drop problematic use-movt and save-temps optionsArd Biesheuvel2016-08-021-6/+6
| | | | | | | | | | | | | | | | | Some versions of Clang fail on every input file when using the -save-temps options, and produces the following heplful error message: <unknown>:0: error: Undefined temporary symbol Simply dropping the option for CLANG35 is the simplest way around this, since the value of storing .i and .s files is dubious anyway. Also, drop the arm-use-movt option, which does not appear to be supported anymore by recent versions of clang. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Jordan Justen <jordan.l.justen@intel.com>
* MdePkg: move to 'hidden' visibility for all symbols under GCC/X64Ard Biesheuvel2016-08-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | When using GCC to build for X64, we switched to the position independent small code model, which is much more efficient in terms of code generation and runtime relocation footprint, and produces binaries that can execute correctly from any offset. However, the PIC routines are by default geared towards hosted binaries containing symbol references that may resolve to definitions in other dynamic objects, and for this reason, most symbol references are indirected via a GOT entry (which also results in a .reloc fixup entry) unless we annotate them. For this reason, we introduced the 'protected' visibility annotation for all symbol definitions and references, by setting the GCC visibility pragma. However, as it turns out, this is not sufficient for all versions of GCC, and in some cases (GCC 5.x using the GCC49 toolchain tag), may still result in GOT based relocations. So switch to 'hidden' visibility instead, which is slightly stronger, and fixes this issue for the versions of GCC that exhibit the problem. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ArmPkg/Library: Add ArmReadSctlr for AArch64Supreeth Venkatesh2016-08-011-1/+11
| | | | | | | | | | | ArmLib defines a prototype for the ArmReadSctlr() function, but the AArch64 implementation is missing. So add it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: John Powell <john.powell@arm.com> Signed-off-by: Supreeth Venkatesh <supreeth.venkatesh@arm.com> [ardb: update commit log] Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* Nt32Pkg: Make Shell as the first boot optionLiming Gao2016-08-011-0/+34
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* Nt32Pkg: Add LoadFileOnFv2 driver in DSC/FDFLiming Gao2016-08-013-107/+19
| | | | | | | | | | After add LoadFileOnFv2, PlatformBootManagerLib doesn't need to find Shell application from FV. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg: Add new LoadFileOnFv2 in Package DSC for BuildLiming Gao2016-08-011-0/+1
| | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg LoadFileOnFv2: Add new LoadFileOnFv2 driverLiming Gao2016-08-014-0/+531
| | | | | | | | | | | | | | This driver searches APPLICATION in FV and installs LoadFile protocol for every found one. Then, BDS will add BootOption for LoadFile protocol. It provides the generic way to expose boot option for the internal application, such as Shell. With this driver, PlatformBds doesn?t need to specially handle Shell application. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg UefiBootManagerLib: Update LoadFile boot descriptionLiming Gao2016-08-011-0/+47
| | | | | | | | | Update boot description to support LoadFile protocol based on FV file. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg UefiBootManagerLib: Support LoadFile Protocol based on FVLiming Gao2016-08-011-40/+76
| | | | | | | | | | New LoadFileOnFv2 driver will install LoadFile protocol based on FV file. Update UefiBootManagerLib to find BootMenuApp with LoadFile protocol. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg UefiBootManagerLib: Add BmIsBootMenuAppFilePath internal APILiming Gao2016-08-011-19/+30
| | | | | | | | | This function abstracts the common logic to find BootMenuApp file. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* EdkCompatibilityPkg: Fix GCC build failureLiming Gao2016-08-014-4/+4
| | | | | | | | Edk2 enables Os option and ms_va_list in GCC tool chain. This change makes VA_LIST is not pointer, and cause GCC failure. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
* NetworkPkg: Add missed character in copyright.Fu Siyuan2016-08-013-3/+3
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
* MdeModulePkg: Add missed character in copyright.Fu Siyuan2016-08-011-1/+1
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-By: Wu Jiaxin <jiaxin.wu@intel.com>
* Vlv2DeviceRefCodePkg&Vlv2DevicePkg:Add sample WSMT table.Lu, ShifeiX A2016-07-313-1/+75
| | | | | | | | | This is an sample WSMT table, which we only update BIT0 and BIT1 of Protections flags fields. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com> Reviewed-by: David Wei <david.wei@intel.com>
* Vlv2TbltDevicePkg:Signal EndOfDxe Event.lushifex2016-07-312-2/+8
| | | | | | | | | | According to PI spec,EndOfDxe Event should be signaled before DxeSmmReadyToLock protocol installation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com> Reviewed-by: David Wei <david.wei@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* Vlv2TbltDevicePkg:Change RESET_VALUE of FADTWei, David2016-07-311-1/+1
| | | | | | | Change RESET_VALUE of ACPI FADT to 0x0E, which could trigger full reset. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com>
* BaseTools/Ecc: GUID checkpointHess Chen2016-07-291-3/+3
| | | | | | | | Fix a bug of checking duplicate GUID Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hess Chen <hesheng.chen@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
* BaseTools: Add build info for binary modules that only list in FDF fileYonghong Zhu2016-07-292-1/+21
| | | | | | | | | | | If the binary module is list in the FDF file but not list in the DSC file, current build report would not include these binary module's info in the report "Module section". The patch fix this issue. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ShellBinPkg: Ia32/X64 Shell binary update.Ruiyu Ni2016-07-295-1/+1
| | | | | | | | The binaries of ShellBinPkg are generated with ShellPkg project 031403460c9782a2563a81a6065ded99046960c2. The binaries are built with no debug information by building with "RELEASE" target. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg SmbiosDxe: Use definition in IndustryStandard/Smbios.hStar Zeng2016-07-291-3/+3
| | | | | | | | | Cc: Feng Tian <feng.tian@intel.com> Cc: Amy Chan <amy.chan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Amy Chan <amy.chan@intel.com>
* MdeModulePkg UiApp: Use definition in IndustryStandard/Smbios.hStar Zeng2016-07-291-4/+4
| | | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Amy Chan <amy.chan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Amy Chan <amy.chan@intel.com>
* IntelFrameworkModulePkg BdsDxe: Use definition in IndustryStandard/Smbios.hStar Zeng2016-07-291-5/+5
| | | | | | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jeff Fan <jeff.fan@intel.com> Cc: Amy Chan <amy.chan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Amy Chan <amy.chan@intel.com>
* ShellPkg: Unregister hotkey callback when exiting ShellRuiyu Ni2016-07-291-1/+1
| | | | | | | | | | | | | | | | | | | Commit 9168df3dea65f707d1e9c32eba5e18ef6b84e5cd "ShellPkg/ShellProtocol.c: Handle memory allocation failure" only keeps the protocol clean up in CleanUpShellProtocol() and creates a new function CleanUpShellEnvironment() which calls CleanUpShellProtocol(), then unregisters the hotkey callback. But the commit forgot to change the Shell.c to call CleanUpShellEnvironment() which causes the hotkey callback is not unregistered while the callback function doesn't exist when Shell exits. This causes system hang when pressing CTRL+C after exiting shell. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* ShellPkg: Correct files with CRLF line endingLiming Gao2016-07-295-36/+36
| | | | | | | | Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* MdePkg PeiDxePostCodeLibReportStatusCode: Correct files with CRLF line endingLiming Gao2016-07-292-4/+4
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
* BaseTools: Correct ReadMe.txt file with CRLF line endingLiming Gao2016-07-291-3/+3
| | | | | | Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
* ArmPlatformPkg: Convert ArmJunoDxe to use common juno revision codeJeremy Linton2016-07-281-43/+19
| | | | | | | | | Now that the code to detect the Juno revision is in the header go ahead and covert the ArmJunoDxe to use it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg: break out juno revision detectionJeremy Linton2016-07-281-2/+27
| | | | | | | | | | The code to detect what juno revision we are running on is fairly small put it in a common header where it may be used in a couple places. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg: Add Cortex-A72 CPU typeJeremy Linton2016-07-281-0/+1
| | | | | | | | Add the Cortex-A72 CPU type which is used in JunoR2. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* OvmfPkg/Sec: Support SECTION2 DXEFV typesThomas Palmer2016-07-271-3/+13
| | | | | | | | | | | | | | | | Support down-stream projects that require large DXEFV sizes greater than 16MB by handling SECTION2 common headers. These are already created by the build tools when necessary. Use IS_SECTION2 and SECTION2_SIZE macros to calculate accurate image sizes when appropriate. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Thomas Palmer <thomas.palmer@hpe.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com> [lersek@redhat.com: fix NB->MB typo in commit message] Signed-off-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/Sec: Use EFI_COMMON_SECTION_HEADER to avoid castsThomas Palmer2016-07-271-4/+5
| | | | | | | | | | | Drop superfluous casts. There is no change in behavior because EFI_FIRMWARE_VOLUME_IMAGE_SECTION is just a typedef of EFI_COMMON_SECTION_HEADER. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Thomas Palmer <thomas.palmer@hpe.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
* PcAtChipsetPkg/PcRtc: Fix a NULL pointer deference issueRuiyu Ni2016-07-271-14/+17
| | | | | | | | | | | When a platform which doesn't support ACPI 1.0 (no XSDT) and FADT is not produced at the first time when ACPI table is published, GetCenturyRtcAddress() unconditionally deference Rsdp->RsdtAddress but Rsdp->RsdtAddress is 0 in this case. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* PcAtChipsetPkg/PcRtc: Fix a stack corruption issueRuiyu Ni2016-07-271-1/+1
| | | | | | | | | In 32bit environment, ScanTableInSDT() incorrectly copies 8 bytes of data to 4-byte pointer Table, which causes the stack corruption. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com>
* BaseTools: report error if source module INF is only list in FDF fileYonghong Zhu2016-07-272-0/+43
| | | | | | | | | | | | If source module INF is not listed in DSC, it will not be built. And it is listed in FDF, GenFds will fail to find its build output. To reminder user this issue early, build tool should report failure to user in early phase. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* IntelFsp2Pkg: Skip loading Microcode if MicrocodeCodeSize is zeroYarlagadda, Satya P2016-07-271-1/+9
| | | | | | | | | | | | | During asm to Nasm conversion, we missed the code to skip loading the microcode and return success if the size is zero. Added additional check to report error if the microcode size is not zero but less than 2 kB. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* BaseTools/toolsetup.bat: Fix bug caused by 'CONF_PATH' not definedHao Wu2016-07-261-7/+7
| | | | | | | | | | | | | | In batch script files, setting a variable in an 'if' block will only take effect after the 'if' block. This commit fixes the issue of using the variable 'CONF_PATH' right after it is being set in an 'if' block. Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* NetworkPkg UefiPxeBcDxe: Fix build error for lastest VS2015 compilerHao Wu2016-07-261-2/+2
| | | | | | | | | | | | | | | | | | | The UefiPxeBcDxe module encounters a build error for IA32 arch using the latest version of VS2015: UefiPxeBcDxe.lib(PxeBcBoot.obj) : error LNK2001: unresolved external symbol __allmul The cause is line 148 in file NetworkPkg\UefiPxeBcDxe\PxeBcBoot.c. The third parameter for gBS->SetTimer() function is of type UINT64, so the multiplication should use the MultU64x32() function now. Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* NetworkPkg IScsiDxe: Fix build error for lastest VS2015 compilerHao Wu2016-07-261-1/+5
| | | | | | | | | | | | | | | | | | | The IScsiDxe module encounters a build error for IA32 arch using the latest version of VS2015: IScsiDxe.lib(IScsiProto.obj) : error LNK2001: unresolved external symbol __allmul The cause is line 141 in file NetworkPkg\IScsiDxe\IScsiProto.c. The third parameter for gBS->SetTimer() function is of type UINT64, so the multiplication should use the MultU64x32() function now. Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* IntelFspWrapperPkg: Add missing License.txt.Jiewen Yao2016-07-261-0/+25
| | | | | | | | | Add missing License.txt. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-05 17:24:53 +0000