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* BaseTools: Update Rsa2048Sha256Sign to use openssl dgst optionvUDK2018Liming Gao2018-03-281-3/+3
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Qin Long <qin.long@intel.com> Reviewed-by: Qin Long <qin.long@intel.com> (cherry picked from commit d1b777440bc616f1e6da9204f3eec9f7a5a6f2e2)
* BaseTools: Update Rsa2048Sha256Sign to use openssl standard optionsLiming Gao2018-03-281-2/+2
| | | | | | | | | | | | | | | | | | sha256 is not the standard option. It should be replaced by sha -sha256. Otherwise, it doesn't work in MAC OS. In V2, update the option to sha1 -sha256. In late openssl version >= 1.1, there is no sha option, but has sha1,sha256. In previous openssl version < 1.1, there is no sha256, but has sha,sha1. To work with all openssl version, use sha1 -sha256 for it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liao Jui-peng <jui-pengx.liao@intel.com> Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com> (cherry picked from commit 1d574dfc15e4495a4063ce4faf3c2e9191677d8d)
* MdeModulePkg/UsbKb: fix shell edit cannot read '!@#$%^&*' charactersRuiyu Ni2018-03-261-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 5563281fa2b31093a1cbd415553b9264c5136e89 * ShellPkg/[hex]edit: use SimpleTextInEx to read console changes shell edit and hexedit to read input through SimpleTextInEx. It exposes a issue in UsbKeyboard driver: Per UEFI Spec, When interpreting the data from this function (ReadKeyStrokeEx), it should be noted that if a class of printable characters that are normally adjusted by shift modifiers (e.g. Shift Key + "f" key) would be presented solely as a KeyData.Key.UnicodeChar without the associated shift state. So in the previous example of a Shift Key + "f" key being pressed, the only pertinent data returned would be KeyData.Key.UnicodeChar with the value of "F". UsbKeyboard driver does convert Shift Key + "f" to "F" without the shift state. But it doesn't do the conversion for all printable characters, e.g.: Shift Key + "1" --> "!". The root cause is today's logic to check whether a character is printable or not is as below: if ((KeyDescriptor->AffectedAttribute & EFI_AFFECTED_BY_CAPS_LOCK) != 0) { So it only converts Shift + "a"-"z", but doesn't for Shift + "0"-"9", and Shift + "["... The patch updates the check logic as below to fix the issue: if ((KeyDescriptor->Unicode != CHAR_NULL) && (KeyDescriptor->ShiftedUnicode != CHAR_NULL) && (KeyDescriptor->Unicode != KeyDescriptor->ShiftedUnicode)) { The above check is TRUE when the character is printable and it's *really* affected by Shift key. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> (cherry picked from commit dd190645eb43424706eb1709d0032c69a1935d9f)
* BaseTool: Fixed the issue of empty PcdDB.BobCF2018-03-231-4/+5
| | | | | | | | | | | If there is no dynamic pcds, there should be DB header in the Pcd DataBase. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 0a4f2d48696f094cec73e28a4402775dc6262eef)
* BaseTools: Add the missing package include directory in PcdValueInit MakefileLiming Gao2018-03-231-1/+3
| | | | | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Feng Bob C <bob.c.feng@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com> (cherry picked from commit b005802a1c860a0f7ed9a727ce3ffc3ea7f9c441)
* MdeModulePkg/CapsuleApp: Fix logic bug in CleanGatherList()Michael D Kinney2018-03-221-2/+2
| | | | | | | | | | | | | | | | https://bugzilla.tianocore.org/show_bug.cgi?id=905 Fix pointer math when more than one capsule is passed to the CapsuleApp. Use the ContinuationPointer from the last array entry instead of the first array entry. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit 845f7cfef2d61f31adc4fbd94bf51ce459785e6b)
* SecurityPkg Tpm12CommandLib: Fix TPM12 GetCapability response errorZhang, Chao B2018-03-211-3/+3
| | | | | | | | | | | | | TPM12 command lib doesn't convert Response Size before using. Add logic to fix the issue. Cc: Long Qin <qin.long@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> (cherry picked from commit 28892d768be4ad731d754fb13de58368d524fd14)
* SecurityPkg Tpm2CommandLib: Fix TPM2.0 response memory overflowZhang, Chao B2018-03-218-10/+151
| | | | | | | | | | | | | | TPM2.0 command lib always assumes TPM device and transmission channel can respond correctly. But it is not true when communication channel is exploited and wrong data is spoofed. Add more logic to prohibit memory overflow attack. Cc: Long Qin <qin.long@intel.com> Cc: Yao Jiewen <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com> Reviewed-by: Yao Jiewen <jiewen.yao@intel.com> (cherry picked from commit dd577319e83d13a7ab46ffdccb6635281d2ca9e5)
* BaseTools: Override Max size by build Option Pcd for HII typeYonghong Zhu2018-03-211-0/+8
| | | | | | | | | | | Current code will generate maxsize for HII type PCD when parser DSC file, while this HII type PCD value maybe override in build command per --pcd option, so the max size need re-calculate. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit c8ae65ac5218973e473ba1ba4bd5f9ccb547a219)
* BaseTools: Fix bug for --pcd VOID* type when no max size is specifiedYonghong Zhu2018-03-211-13/+0
| | | | | | | | | | | | | when VOID* type non-structure pcd used in --pcd, and its max size is not specified in DSC or its value is hex value, build break due to the code int(Pcd.MaxDatumSize,10). Now this patch remove this code, because tool will calculate the size info in later phase. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 29d521b9fa00045eb036c353e0b8f5ebe9c12a98)
* BaseTools: Add Feature Flag Pcd Type into Override listYonghong Zhu2018-03-211-1/+2
| | | | | | | | | | when only define the PCD in the DEC file, and use --pcd feature, we also need cover this case for Feature Flag Type. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit b7bfcd1a7e96524d15345e420c3f7120c29a107f)
* SourceLevelDebugPkg DebugCommUsb3: Return error when debug cap is resetStar Zeng2018-03-211-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When source level debug is enabled, but debug cable is not connected, XhcResetHC() in XhciReg.c will reset the host controller, the debug capability registers will be also reset. After the code in InitializeUsbDebugHardware() sets DCE bit and LSE bit to "1" in DCCTRL, there will be DMA on 0 (the value of some debug capability registers for data transfer is 0) address buffer, fault info like below will appear when IOMMU based on VTd is enabled. VER_REG - 0x00000010 CAP_REG - 0x00D2008C40660462 ECAP_REG - 0x0000000000F050DA GSTS_REG - 0xC0000000 RTADDR_REG - 0x0000000086512000 CCMD_REG - 0x2800000000000000 FSTS_REG - 0x00000002 FECTL_REG - 0xC0000000 FEDATA_REG - 0x00000000 FEADDR_REG - 0x00000000 FEUADDR_REG - 0x00000000 FRCD_REG[0] - 0xC0000006000000A0 0000000000000000 Fault Info - 0x0000000000000000 Source - B00 D14 F00 Type - 1 (read) Reason - 6 IVA_REG - 0x0000000000000000 IOTLB_REG - 0x1200000000000000 This patch is to return error for the case. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> (cherry picked from commit df67a480eb81821ba21ad6909e2fda287e745834)
* MdeModulePkg/DxeMain: Fix BSP interrupts reenabled in ExitBootServicesHao Wu2018-03-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Within function CoreExitBootServices(), this commit will move the call of: MemoryProtectionExitBootServicesCallback(); before: SaveAndSetDebugTimerInterrupt (FALSE); and gCpu->DisableInterrupt (gCpu); The reason is that, within MemoryProtectionExitBootServicesCallback(), APIs like RaiseTpl and RestoreTpl maybe called. An example will be: DebugLib (using PeiDxeDebugLibReportStatusCode instance) | v ReportStatusCodeLib (using DxeReportStatusCodeLib instance) | v Raise/RestoreTpl The call of Raise/RestoreTpl APIs will re-enable BSP interrupts. Hence, this commit refine the calling sequence to ensure BSP interrupts before leaving CoreExitBootServices(). Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> (cherry picked from commit bce776a5b695b5bf1f063f5417e48c56b43b88a7)
* UefiCpuPkg/MpInitLib: Disable interrupt at ExitBootServices AP MwaitHao Wu2018-03-202-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Within function ApWakeupFunction(): When source level debugger is enabled, AP interrupts will be enabled by EnableDebugAgent(). Then the AP function will be executed by: Procedure (Parameter); After the AP function returns, AP interrupts will be disabled when the APs are placed in loop mode (both HltLoop and MwaiLoop). However, at ExitBootServices, ApWakeupFunction() is called with 'Procedure' equals to RelocateApLoop(). (ExitBootServices callback registered within InitMpGlobalData()) RelocateApLoop() never returns, so it has to disable the AP interrupts by itself. However, we find that interrupts are only disabled for the HltLoop case, but not for the MwaitLoop case (within file MpFuncs.nasm). This commit adds the missing disabling of AP interrupts for MwaitLoop. Also, for X64, this commit will disable the interrupts before switching to 32-bit mode. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Jeff Fan <vanjeff_919@hotmail.com> (cherry picked from commit a7bbe9d20ba2df35e545bf9c8eec348d9c5f1b93)
* IntelSiliconPkg/Vtd: Add more debug info.Jiewen Yao2018-03-201-1/+1
| | | | | | | | | Add more debug info for reason code. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Vtd: Add missing dump in ExtContext.Jiewen Yao2018-03-201-0/+1
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* IntelSiliconPkg/Vtd: Add DMA_CTRL_PLATFORM_OPT_IN_FLAG dumpJiewen Yao2018-03-202-0/+8
| | | | | | | Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* Edk2: Retire Edk2Setup.batLiming Gao2018-03-191-541/+0
| | | | | | | | | | | Edk2Setup.bat is out of maintain. It is a draft version batch file, and not implement all features listed in its header file. To avoid the confuse, drop it from edk2 project, and keep edksetup.bat only. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> (cherry picked from commit c8e36b75b5fef5e7f55797dc384d652083a65958)
* ShellBinPkg: Update ReadMe.txtRuiyu Ni2018-03-191-1/+1
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> (cherry picked from commit 909762d0785676613dc29d833c0fe0ebe73a4835)
* ShellBinPkg: Ia32/X64 Shell binary update.Ruiyu Ni2018-03-194-0/+0
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> (cherry picked from commit 3f903173fa0e42e7cceef4744ab810452ad06e98)
* MdeModulePkg/PciHostBridgeLib.h: add address TranslationHeyi Guo2018-03-191-0/+19
| | | | | | | | | | | | | | | | | | | | | Add Translation field to PCI_ROOT_BRIDGE_APERTURE. Translation is used to represent the difference between device address and host address, if they are not the same on some platforms. In UEFI 2.7, "Address Translation Offset" is "Offset to apply to the Starting address to convert it to a PCI address". This means: Translation = device address - host address So we also use the above calculation for this Translation field to keep consistent. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo <heyi.guo@linaro.org> Signed-off-by: Yi Li <phoenix.liyi@huawei.com> Reviewed-by: Ni Ruiyu <ruiyu.ni@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> (cherry picked from commit 5bb1866e5383f3f54252d9838c2dd53759ffc4af)
* BaseTools: Add PackageDocumentTools into Scripts folderYonghong Zhu2018-03-1920-0/+7177
| | | | | | | | | | | | | | This tool is used to generate the document for edk2 packages. The generated document will be in UDK release. For example, UDK2017 document can be found in: https://github.com/tianocore/tianocore.github.io/wiki/UDK2017#documentation Cc: Star Zeng <star.zeng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> (cherry picked from commit 7ccc9c954c5c8a5b92199e68227384da0b5e4e7d)
* BaseTools: Fix bug for VOID* DynamicDefault Pcd use Flexible formatYonghong Zhu2018-03-191-8/+0
| | | | | | | | | | | | define a flexible pcd format in Dyanmic/DynamicExDefault section, it cause build error. [PcdsDynamicExDefault.common.DEFAULT] pcdToken.Name|{GUID("11111111-2222-42eb-b5eb-fef31d207cb4")} Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 316b43dee56837ed7d382e8de4a78d6bb9d14eb7)
* BaseTools: Detect structure pcd header file change.BobCF2018-03-191-54/+135
| | | | | | | | | | Detect structure pcd header file change Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 34d808add3dc23aaa37e1c9edb2fcc2b50118367)
* BaseTools: --hash --binary-destination generate wrong binary pathFeng, YunhuaX2018-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Option --hash --binary-destination generate Binaries section in the inf file, but the path of ASL file is begin with Output directory, so need replace Output directory with '', will get the file name RamDisk.aml Incorrect AML file path in inf file on linux: [Binaries.X64] PE32|RamDiskDxe.efi ASL|home/tiano/Desktop/hash/edk2/Build/OvmfX64/RELEASE_GCC5/X64 /MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe/OUTPUT/RamDisk.aml DXE_DEPEX|RamDiskDxe.depex BIN|RamDiskDxeOffset.bin Cc: Liming Gao <liming.gao@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> (cherry picked from commit 90456c3c06d9c370b48417754ece2fb8252da5f8)
* SecurityPkg OpalPasswordDxe:Fix wrong BufferSize input to UnicodeSPrintStar Zeng2018-03-171-11/+8
| | | | | | | | | | | | | | | | | | Current code uses string length as BufferSize input to UnicodeSPrint, it is wrong and makes the pop up string trimmed. The BufferSize input to UnicodeSPrint should be the size, in bytes, of the output buffer. This is to use sizeof (mPopUpString) as the BufferSize input to UnicodeSPrint, it also updates array size of mPopUpString from 256 to 100 that is enough, otherwise the pop up string may be too long. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit aa0857304e83801ce8c673504625aa3307abb82f)
* SecurityPkg OpalPasswordPei: Go next when AhciModeInitialize is failedStar Zeng2018-03-171-10/+9
| | | | | | | | | | | | | | | Go to next loop instead of going to unlock OPAL password when AhciModeInitialize is failed. It is just error handling. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit e3df050e5127e9857f90f9322c7f2d0458518955)
* SecurityPkg OpalPasswordDxe: Move OPAL request variable definitionStar Zeng2018-03-172-8/+8
| | | | | | | | | | | | | Move OPAL request variable definition from OpalHiiFormValues.h to OpalHii.h. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit 849c684b860dcfd4a4e3992ed95dc0fb1c2b406f)
* SecurityPkg OpalPasswordDxe: Return directly if no any deviceStar Zeng2018-03-171-0/+8
| | | | | | | | | | | | Return directly if no any device in EndOfDxe notification. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit fbe1328a51136538ec985ce7b9ef7cf97ba999e9)
* MdeModulePkg/DxeCapsuleLibFmp: Add more check for the UX capsuleRuiyu Ni2018-03-161-2/+19
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> (cherry picked from commit d0976b9accedfd1f45fe2f81c59351ed17f34aa0)
* UefiCpuPkg CpuExceptionHandlerLib: use FixedPcdGetSize() as the macro valueLiming Gao2018-03-161-3/+3
| | | | | | | | | | | | | FixedPcdGetSize() is used as the macro value, PcdGetSize() is used as global variable or function. Here usage is to access macro value. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Wang Jian J <jian.j.wang@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> (cherry picked from commit a24de121cf70bc48555b68d942b94fd10a074387)
* MdeModulePkg BrotliLib: Rename function with the specific lib nameLiming Gao2018-03-164-13/+13
| | | | | | | | | | This change is to avoid the function conflict. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> (cherry picked from commit 792ace0ac391c37c1299322340abdf74e2603795)
* MdeModulePkg/PiSmmCore: fix #PF caused by freeing read-only memoryJian J Wang2018-03-161-0/+22
| | | | | | | | | | | | | | | | | | | | | | SMM core will add a HEADER before each allocated pool memory and clean up this header once it's freed. If a block of allocated pool is marked as read-only after allocation (EfiRuntimeServicesCode type of pool in SMM will always be marked as read-only), #PF exception will be triggered during memory pool freeing. Normally EfiRuntimeServicesCode type of pool should not be freed in the real world. But some test suites will actually do memory free for all types of memory for the purpose of functionality and conformance test. So this issue should be fixed anyway. Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> (cherry picked from commit a2f32ef6ff173ef276a661520196fb04bbaec3f9)
* MdeModulePkg/Core: fix bits operation error on a boundary conditionJian J Wang2018-03-161-6/+10
| | | | | | | | | | | | | | | | | If given address is on 64K boundary and the requested bit number is 64, all SetBits(), ClearBits() and GetBits() will encounter ASSERT problem in trying to do a 64 bits of shift, which is not allowed by LShift() and RShift(). This patch tries to fix this issue by turning bits operation into whole integer operation in such situation. Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> (cherry picked from commit 36f2f049a83d82f7c0c847202c9ce2974492c1ab)
* MdeModulePkg/PiSmmCore: fix bits operation error on a boundary conditionJian J Wang2018-03-161-6/+10
| | | | | | | | | | | | | | | | | If given address is on 64K boundary and the requested bit number is 64, all SetBits(), ClearBits() and GetBits() will encounter ASSERT problem in trying to do a 64 bits of shift, which is not allowed by LShift() and RShift(). This patch tries to fix this issue by turning bits operation into whole integer operation in such situation. Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> (cherry picked from commit 883787a2c6f83a59fa56f9529317aa86be71fe91)
* MdeModulePkg/Core: allow HeapGuard even before CpuArchProtocol installedJian J Wang2018-03-164-1/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to the fact that HeapGuard needs CpuArchProtocol to update page attributes, the feature is normally enabled after CpuArchProtocol is installed. Since there're some drivers are loaded before CpuArchProtocl, they cannot make use HeapGuard feature to detect potential issues. This patch fixes above situation by updating the DXE core to skip the NULL check against global gCpu in the IsMemoryTypeToGuard(), and adding NULL check against gCpu in SetGuardPage() and UnsetGuardPage() to make sure that they can be called but do nothing. This will allow HeapGuard to record all guarded memory without setting the related Guard pages to not- present. Once the CpuArchProtocol is installed, a protocol notify will be called to complete the work of setting Guard pages to not-present. Please note that above changes will cause a #PF in GCD code during cleanup of map entries, which is initiated by CpuDxe driver to update real mtrr and paging attributes back to GCD. During that time, CpuDxe doesn't allow GCD to update memory attributes and then any Guard page cannot be unset. As a result, this will prevent Guarded memory from freeing during memory map cleanup. The solution is to avoid allocating guarded memory as memory map entries in GCD code. It's done by setting global mOnGuarding to TRUE before memory allocation and setting it back to FALSE afterwards in GCD function CoreAllocateGcdMapEntry(). Cc: Star Zeng <star.zeng@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> (cherry picked from commit 7fef06af4ec100f3f8856e3fa08ef067a9fd40d2)
* SecurityPkg/dec: remove TrEE.Jiewen Yao2018-03-161-17/+1
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit 89b1612fcf76b8b30d4770c982bcb9dd6ca47cf5)
* SecurityPkg/include: remove TrEE.Jiewen Yao2018-03-164-313/+0
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit f5a343f5ef8c3dd6e940df77fc813fac8ba55868)
* SecurityPkg/TrEEVendorLib: remove TrEE.Jiewen Yao2018-03-163-186/+0
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit 8afbd22eea3953b6019b7e6cecf0dbc6cac37216)
* SecurityPkg/TrEEPhysicalPresenceLib: remove TrEE.Jiewen Yao2018-03-164-868/+0
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit a35ecb70b190dd2274fbb6dfb06c4ccd7af1c68e)
* SecurityPkg/Tpm2DeviceLibTrEE: remove TrEE.Jiewen Yao2018-03-163-193/+0
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit 64047cb68c6b70475446137011b40cf5e006433d)
* SecurityPkg/TrEEConfig: remove TrEE.Jiewen Yao2018-03-1614-1449/+0
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit a5baa7b9148f55bc7b4e0e72a23816f043265769)
* SecurityPkg/TrEEPei: remove TrEE.Jiewen Yao2018-03-164-816/+0
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit e1b3759079d77cf4a0a78e3e1ca038571b57f488)
* SecurityPkg/TrEEDxe: remove TrEE.Jiewen Yao2018-03-165-2451/+0
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit 9aeebd913e7b3d34c5a01ba4453c167c1b5ff52f)
* SecurityPkg/TrEESmm: remove TrEE.Jiewen Yao2018-03-166-1112/+0
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit 53a6b65604fae20e7a4be5a63e4386fd01a076ad)
* SecurityPkg/dsc: remove TrEE.Jiewen Yao2018-03-161-43/+1
| | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> (cherry picked from commit ff469eae2cd571eb5c2123f5cd4d1cec62647bec)
* Vlv2TbltDevicePkg/dsc/fdf: use Tcg2 instead of TrEE.Jiewen Yao2018-03-165-27/+27
| | | | | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com> Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> Reviewed-by: Mang Guo <mang.guo@intel.com> (cherry picked from commit 2e886a2e039a89f35666cf3da50172818a0e4f5d)
* Vlv2TbltDevicePkg/Bds: use Tcg2 instead of TrEE.Jiewen Yao2018-03-162-4/+4
| | | | | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com> Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> Reviewed-by: Mang Guo <mang.guo@intel.com> (cherry picked from commit 33aaf8d71faf09b1535b147a7a72782020d28b84)
* Vlv2TbltDevicePkg/Tcg2PhysicalPresenceLib: use Tcg2 instead of TrEE.Jiewen Yao2018-03-162-18/+18
| | | | | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com> Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> Reviewed-by: Mang Guo <mang.guo@intel.com> (cherry picked from commit 9461604e1490f73fdbcc8e957dbe75f75c73b027)
* QuarkPlatformPkg: remove TrEE reference.Jiewen Yao2018-03-162-2/+2
| | | | | | | | | | | | | TrEE is deprecated. We need use Tcg2. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Kelly Steele <kelly.steele@intel.com> Cc: Chao B Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao B Zhang <chao.b.zhang@intel.com> Reviewed-by: Kelly Steele <kelly.steele@intel.com> (cherry picked from commit b1d95b19e555a737d67b20d85ed8e295c88a2d65)
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-22 05:54:39 +0000