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* MdeModulePkg/MdeModulePkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang2020-07-311-0/+4
| | | | | | | | | | | Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
* FmpDevicePkg/FmpDevicePkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang2020-07-311-0/+3
| | | | | | | | | | | | | Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* EmulatorPkg/EmulatorPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang2020-07-311-0/+4
| | | | | | | | | | | | Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Andrew Fish <afish@apple.com> Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* CryptoPkg/CryptoPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang2020-07-311-0/+3
| | | | | | | | | | | | Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Guomin Jiang <guomin.jiang@intel.com>
* ArmVirtPkg/ArmVirtPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang2020-07-311-0/+4
| | | | | | | | | | | | Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* FatPkg/FatPkg.ci.yaml: Add configuration for LicenseCheckShenglei Zhang2020-07-311-0/+3
| | | | | | | | | | Add configuration IgnoreFiles for package config files. So users can rely on this to skip license conflict for some generated files. Cc: Ray Ni <ray.ni@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* .pytool/Plugin: Add a plugin LicenseCheckShenglei Zhang2020-07-313-0/+143
| | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2691 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2833 Add a plugin to check license conflict for new added files in a patch. It will report out errors when meeting files which are not contributed under BSD-2-Clause-Patent. Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools/PeCoffLoaderEx: Remove the unused local variableAbner Chang2020-07-291-3/+0
| | | | | | | | | | | | | BZ:2864 GCC build fails due to variable self assignment. This local variable is not used at any where, we can just remove it. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/Library/UnitTestHostBaseLib: Add missing servicesMichael D Kinney2020-07-281-0/+34
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2862 Add ReadMmx()/WriteMmx() services Add MemoryFence() service Cc: Liming Gao <liming.gao@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* SecurityPkg/Tcg2Config: remove TPM2_ChangEPS if it is not supported.Qi Zhang2020-07-283-0/+10
| | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2793 In current implementation TPM2_ChangeEPS command is always available in the TPM2 operation pull down list in TCG2 Configuration, which is confusing when the command is not supported by specific TPM chip. As a user experience improvement, TPM2_ChangeEPS command should be removed from the list when it is not supported. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg/Tpm2CommandLib: add a new functionZhang, Qi2020-07-282-0/+56
| | | | | | | | | | | | | | | | Tpm2GetCapabilityIsCommandImplemented REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2793 check if the commad is supported by comparing the command code with command index. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg/TcgPei: Use Migrated FV Info Hob for calculating hash ↵Guomin Jiang2020-07-282-2/+28
| | | | | | | | | | | | | | | | | | | | | (CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 When we allocate pool to save rebased the PEIMs, the address will change randomly, therefore the hash will change and result PCR0 change as well. To avoid this, we save the raw PEIMs and use it to calculate hash. The TcgPei calculate the hash and it use the Migrated FV Info. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* UefiCpuPkg: Correct some typos.Guomin Jiang2020-07-286-10/+10
| | | | | | | | | | | | Correct some typos. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* UefiCpuPkg/CpuMpPei: Enable paging and set NP flag to avoid TOCTOU ↵Guomin Jiang2020-07-282-5/+30
| | | | | | | | | | | | | | | | | | (CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 To avoid the TOCTOU, enable paging and set Not Present flag so when access any code in the flash range, it will trigger #PF exception. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* SecurityPkg/Tcg2Pei: Use Migrated FV Info Hob for calculating hash ↵Guomin Jiang2020-07-282-3/+29
| | | | | | | | | | | | | | | | | | | | | (CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 When we allocate pool to save rebased the PEIMs, the address will change randomly, therefore the hash will change and result PCR0 change as well. To avoid this, we save the raw PEIMs and use it to calculate hash. The Tcg2Pei calculate the hash and it use the Migrated FV Info. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg/Core: Create Migrated FV Info Hob for calculating hash ↵Guomin Jiang2020-07-285-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | (CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 When we allocate pool to save the rebased PEIMs, the address will change randomly, therefore the hash will change and result PCR0 change as well. To avoid this, we save the raw PEIMs and use it to calculate hash. The MigratedFvInfo HOB will never produce when PcdMigrateTemporaryRamFirmwareVolumes is FALSE, because the PCD control the total feature. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Harry Han <harry.han@intel.com> Cc: Catharine West <catharine.west@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* UefiCpuPkg/SecMigrationPei: Add initial PEIM (CVE-2019-11098)Michael Kubacki2020-07-2810-2/+709
| | | | | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 Adds a PEIM that republishes structures produced in SEC. This is done because SEC modules may not be shadowed in some platforms due to space constraints or special alignment requirements. The SecMigrationPei module locates interfaces that may be published in SEC and reinstalls the interface with permanent memory addresses. This is important if pre-memory address access is forbidden after memory initialization and data such as a PPI descriptor, PPI GUID, or PPI inteface reside in pre-memory. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Harry Han <harry.han@intel.com> Cc: Catharine West <catharine.west@intel.com> Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* UefiCpuPkg/CpuMpPei: Add GDT migration support (CVE-2019-11098)Michael Kubacki2020-07-284-2/+60
| | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 Moves the GDT to permanent memory in a memory discovered callback. This is done to ensure the GDT authenticated in pre-memory is not fetched from outside a verified location after the permanent memory transition. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg/PeiCore: Enable T-RAM evacuation in PeiCore (CVE-2019-11098)Michael Kubacki2020-07-287-9/+1099
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 Introduces new changes to PeiCore to move the contents of temporary RAM visible to the PeiCore to permanent memory. This expands on pre-existing shadowing support in the PeiCore to perform the following additional actions: 1. Migrate pointers in PPIs installed in PeiCore to the permanent memory copy of PeiCore. 2. Copy all installed firmware volumes to permanent memory. 3. Relocate and fix up the PEIMs within the firmware volumes. 4. Convert all PPIs into the migrated firmware volume to the corresponding PPI address in the permanent memory location. This applies to PPIs and PEI notifications. 5. Convert all status code callbacks in the migrated firmware volume to the corresponding address in the permanent memory location. 6. Update the FV HOB to the corresponding firmware volume in permanent memory. 7. Use PcdMigrateTemporaryRamFirmwareVolumes to control if enable the feature or not. when disable the PCD, the EvacuateTempRam() will never be called. The function control flow as below: PeiCore() DumpPpiList() EvacuateTempRam() ConvertPeiCorePpiPointers() ConvertPpiPointersFv() MigratePeimsInFv() MigratePeim() PeiGetPe32Data() LoadAndRelocatePeCoffImageInPlace() MigrateSecModulesInFv() ConvertPpiPointersFv() ConvertStatusCodeCallbacks() ConvertFvHob() RemoveFvHobsInTemporaryMemory() DumpPpiList() Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Debkumar De <debkumar.de@intel.com> Cc: Harry Han <harry.han@intel.com> Cc: Catharine West <catharine.west@intel.com> Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg: Add new PCD to control the evacuate temporary memory feature ↵Guomin Jiang2020-07-282-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | (CVE-2019-11098) REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1614 The security researcher found that we can get control after NEM disable. The reason is that the flash content reside in NEM at startup and the code will get the content from flash directly after disable NEM. To avoid this vulnerability, the feature will copy the PEIMs from temporary memory to permanent memory and only execute the code in permanent memory. The vulnerability is exist in physical platform and haven't report in virtual platform, so the virtual can disable the feature currently. When enable the PcdMigrateTemporaryRamFirmwareVolumes, always shadow all PEIMs no matter the condition of PcdShadowPeimOnBoot or PcdShadowPeimOnS3Boot. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Hao A Wu <hao.a.wu@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* MdePkg Base.h: Delete prototype for __builtin_return_addressJessica Clarke2020-07-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1004 Being a compiler builtin, the type of __builtin_return_address is already known to the compiler so no prototype is needed. Clang also errors out when redeclaring certain builtins like this[1], though currently only for ones with custom type checking. At the moment, __builtin_return_address does not use custom type checking and so does not trigger this error, however, the CHERI fork of LLVM, which will form the basis of the toolchain for Arm's experimental Morello platform, does use custom type checking for it, and so gives an error. Thus, simply delete the unnecessary line. [1] llvm/llvm-project@41af97137572ad6d4dafc872e7ecf6bbb08d4984 Cc: Leif Lindholm <leif@nuviainc.com> Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* MdePkg/Include/IndustryStandard: Main CXL headerJaveed, Ashraf2020-07-271-0/+22
| | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611 Introducing the Cxl.h as the main header file to support all versions of Compute Express Link Specification register definitions. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* MdePkg/Include/IndustryStandard: CXL 1.1 RegistersJaveed, Ashraf2020-07-272-4/+571
| | | | | | | | | | | | | | | BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2611 Register definitions from chapter 7 of Compute Express Link Specification Revision 1.1 are ported into the new Cxl11.h. The CXL Flex Bus registers are based on the PCIe Extended Capability DVSEC structure header, led to the inclusion of upgraded Pci.h. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
* CryptoPkg/OpensslLib: Upgrade OpenSSL to 1.1.1gGuomin Jiang2020-07-2510-87/+90
| | | | | | | | | | | | | | | | Upgrade openssl to 1.1.1g. the directory have been reorganized, openssl moved crypto/include/internal to include/crypto folder. So we change directory to match the re-organization. The dso_conf.h and opensslconf.h will generated in UNIX format, change process_files.pl to covent the EOL automatically. Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* Revert "BaseTools: Add gcc flag to warn on void* pointer arithmetic"Bob Feng2020-07-241-3/+3
| | | | | | | | | | | | | | | | | This reverts commit dbd546a32d5abe225306e22d43a7d86e3a042eee. This patch also breaks about half of the ARM/AARCH64 platforms in edk2-platforms Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* IntelFsp2Pkg/Tools/GenCfgOpt.py: Fix a bug about parse macroTan, Ming2020-07-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2827 Fix a bug about parse the macro value which use another macro. Use the following example to verify: [Define] DEFINE M1 = V1 DEFINE M2 = $(M1)/V2 !include $(M2)/pcd.dsc The old code will failed parse M2 and cause following error: Traceback (most recent call last): File "Edk2\IntelFsp2Pkg\Tools\GenCfgOpt.py", line 1550, in <module> sys.exit(Main()) File "Edk2\IntelFsp2Pkg\Tools\GenCfgOpt.py", line 1513, in Main if GenCfgOpt.ParseDscFile(DscFile, FvDir) != 0: File "Edk2\IntelFsp2Pkg\Tools\GenCfgOpt.py", line 533, in ParseDscFile NewDscLines = IncludeDsc.readlines() ValueError: I/O operation on closed file. The tool should support the value use another macro, and expand it. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Ming Tan <ming.tan@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
* BaseTools/Scripts: Ignore the CRLF check when upgrade submodule.Jiang, Guomin2020-07-241-1/+1
| | | | | | | | | | | If the submodule is upgraded, skip the CRLF check as it isn't change for file. Signed-off-by: Guomin Jiang <guomin.jiang@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* EmbeddedPkg: fix gcc build errors in AndroidBootImgLibLeif Lindholm2020-07-231-2/+2
| | | | | | | | | | | | | | Commit dbd546a32d5a ("BaseTools: Add gcc flag to warn on void* pointer arithmetic") does its work and triggers build errors in this library. Update the affected code to build correctly again. Cc: Pierre Gondois <pierre.gondois@arm.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Bob Feng<bob.c.feng@intel.com> Reported-by: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Leif Lindholm <leif@nuviainc.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* EmbeddedPkg: Fix build error for MmcDxePierre Gondois2020-07-232-6/+10
| | | | | | | | | | | | | | | | | | | The following command line: build -b NOOPT -a IA32 -t VS2017 -p edk2\EmbeddedPkg\EmbeddedPkg.dsc Generates the following error: MmcDxe.lib(Diagnostics.obj) : error LNK2001: unresolved external symbol __allshl MmcDxe.lib(Diagnostics.obj) : error LNK2001: unresolved external symbol __aullshr MmcDxe.lib(MmcBlockIo.obj) : error LNK2001: unresolved external symbol __allmul These erros are due to the use of shift/multiply operations on UINT64 variable on a IA32 architecture. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
* BaseTools: Fix binary file not generate map file issueFeng, YunhuaX2020-07-231-1/+1
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2624 When EFI file come from binary file, not generate .map file, so need ignore the map file. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Yunhua Feng <yunhuax.feng@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* SecurityPkg/dsc: Add PeiTpmMeasurementLib.Jiewen Yao2020-07-231-1/+3
| | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* SecurityPkg/PeiTpmMeasurementLib: Add PEI instance.Jiewen Yao2020-07-233-0/+141
| | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* SecurityPkg/Tcg2: Add TcgPpiJiewen Yao2020-07-232-27/+86
| | | | | | | | | | | | | | And do some code clean with updated function REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* SecurityPkg/Tcg: Add TcgPpiJiewen Yao2020-07-232-6/+58
| | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* SecurityPkg/dec: Add TcgPpi.Jiewen Yao2020-07-231-0/+3
| | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* SecurityPkg/TcgPpi: Add TcgPpi header file.Jiewen Yao2020-07-231-0/+60
| | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2841 Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Qi Zhang <qi1.zhang@intel.com> Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Qi Zhang <qi1.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
* Maintainers.txt: Add 'Zhiguang Liu' for MdePkg reviewZhiguang Liu2020-07-231-0/+1
| | | | | | | | | Add 'Zhiguang Liu' as a reviewer for MdePkg. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg/DxeCorePerformanceLib: Switch to UnicodeStrnToAsciiStrSJeff Brasen2020-07-211-2/+2
| | | | | | | | | | UnicodeStrToAsciiStrS requires that the source string is shorter than the destination buffer and will ASSERT if this is not true. Switch to UnicodeStrnToAsciiStrS as there are cases where the source string is longer than the buffer allocated for the device path. Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Dandan Bi <dandan.bi@intel.com>
* Using LLVM compiler set to build BaseTools in LinuxLiu, Zhiguang2020-07-214-4/+32
| | | | | | | | | | | | | | | Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2842 To use LLVM to build BaseTools, first set the CLANG_BIN environment value, and add "CXX=llvm" to choose LLVM compiler set when using make command. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com> Reviewed-by: Yuwei Chen<yuwei.chen@intel.com>
* BaseTools: Remove the file timestamp checking during parsingBob Feng2020-07-212-26/+2
| | | | | | | | | | | | During build, the meta files are not changed, so it's no need to check file timestamp. This patch is to remove useless logic. Signed-off-by: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* BaseTools: rename ReadMe.txt to ReadMe.rstRebecca Cran2020-07-211-0/+0
| | | | | | | | | | The ReadMe file is now RST, so update the filename extension to match. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools: Update ReadMe.txt to match current functionalityRebecca Cran2020-07-211-22/+16
| | | | | | | | | | | | ReadMe.txt contained outdated information. Update it to match current functionality (e.g. sqlite3 is no longer used), and convert the formatting from ad-hoc to reStructuredText. Signed-off-by: Rebecca Cran <rebecca@bsdio.com> Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Reviewed-by: Bob Feng <bob.c.feng@intel.com>
* BaseTools: Factorize GCC flagsPierre Gondois2020-07-211-1/+1
| | | | | | | | | | | | | | | | | | | | GCC48_ALL_CC_FLAGS has no dependency on GCC_ALL_CC_FLAGS. By definition, there should be such dependency. The outcomes of this patch is that GCC48_ALL_CC_FLAGS and other dependent configurations will inherit from the additional "-Os" flag. The "-Os" flag optimizes a build in size, not breaking any build. In a gcc command line, the last optimization flag has precedence. This means that this "-Os" flag will be overriden by a more specific optimization configuration, provided that this more specific flag is appended at the end of the CC_FLAGS. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Suggested-by: Tomas Pilar <Tomas.Pilar@arm.com> Reviewed-by: Bob Feng<bob.c.feng@intel.com>
* BaseTools: Add gcc flag to warn on void* pointer arithmeticPierre Gondois2020-07-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | By default, gcc allows void* pointer arithmetic. This is a GCC extension. However: - the C reference manual states that void* pointer "cannot be operands of addition or subtraction operators". Cf s5.3.1 "Generic Pointers"; - Visual studio compiler treat such operation as an error. To prevent such pointer arithmetic, the "-Wpointer-arith" flag should be set for all GCC versions. The "-Wpointer-arith" allows to: "Warn about anything that depends on the "size of" a function type or of void. GNU C assigns these types a size of 1, for convenience in calculations with void * pointers and pointers to functions." This flag is available since GCC2.95.3 which came out in 2001. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Bob Feng<bob.c.feng@intel.com>
* MdeModulePkg: Upon BootOption failure, Destroy RamDisk memory before RSC.KrishnadasX Veliyathuparambil Prakashan2020-07-201-13/+15
| | | | | | | | | | | | | | | | | | | | | | REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2818 For better memory management, re-ordered the DestroyRamDisk and ReportStatusCode calls inside the EfiBootManagerBoot() function. This will help to clean the unused memory before reporting the failure status, so that OEMs can use RSC Listener to launch custom boot option or application for recovering the failed hard drive. This change will help to ensure that the allocated pool of memory for the failed boot option is freed before executing OEM's RSC listener callback to handle every boot option failure. Signed-off-by: KrishnadasX Veliyathuparambil Prakashan <krishnadasx.veliyathuparambil.prakashan@intel.com> Cc: "Gao, Zhichao" <zhichao.gao@intel.com> Cc: "Ni, Ray" <ray.ni@intel.com> Reviewed-by: Sunny Wang <sunnywang@hpe.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
* BaseTools/PatchCheck.py: Skip length check for user name in xxx-byShenglei Zhang2020-07-201-1/+8
| | | | | | | | | | | | | REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2836 Current PatchCheck.py checks each line to ensure line's length is not larger than 76. But there's a case that length of user's name is much longer than that number. So enhance the script to handle this case. Cc: Bob Feng <bob.c.feng@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Yuwei Chen<yuwei.chen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* Maintainers.txt: Add Gary Lin as the reviewer for LsiScsi driverGary Lin2020-07-171-0/+4
| | | | | | | | | Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200717061130.8881-12-glin@suse.com>
* OvmfPkg/LsiScsiDxe: Process the SCSI Request PacketGary Lin2020-07-175-1/+498
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the second part of LsiScsiPassThru(). LsiScsiProcessRequest() is added to translate the SCSI Request Packet into the LSI 53C895A commands. This function utilizes the so-called Script buffer to transmit a series of commands to the chip and then polls the DMA Status (DSTAT) register until the Scripts Interrupt Instruction Received (SIR) bit sets. Once the script is done, the SCSI Request Packet will be modified to reflect the result of the script. The Cumulative SCSI Byte Count (CSBC) register is fetched before and after the script to calculate the transferred bytes and update InTransferLength/OutTransferLength if necessary. v3: - Set DStat, SIst0, and SIst1 to 0 before using them - Amend the if statements for the DMA data instruction and add the assertions for the data direction - Also set SenseDataLength to 0 on the error path - Fix typos and amend comments - Amend the error handling of the calculation of transferred bytes v2: - Use the BITx macros for the most of LSI_* constants - Fix a typo: contorller => controller - Add SeaBIOS lsi-scsi driver as one of the references of the script - Cast the result of sizeof to UINT32 for the instructions of the script - Drop the backslashes - Replace LSI_SCSI_DMA_ADDR_LOW with LSI_SCSI_DMA_ADDR since we already removed DUAL_ADDRESS_CYCLE - Add more comments for the script - Fix the check of the script size at the end of the script - Always set SenseDataLength to 0 to avoid the caller to access SenseData - Improve the error handling in LsiScsiProcessRequest() Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Gary Lin <glin@suse.com> Message-Id: <20200717061130.8881-11-glin@suse.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* OvmfPkg/LsiScsiDxe: Examine the incoming SCSI Request PacketGary Lin2020-07-172-0/+102
| | | | | | | | | | | | | | | This is the first part of LsiScsiPassThru(). Before processing the SCSI Request packet, we have to make sure whether the packet is valid or not. v2: Make LsiScsiPassThru() return EFI_UNSUPPORTED since this function is half-implemented Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200717061130.8881-10-glin@suse.com>
* OvmfPkg/LsiScsiDxe: Map DMA bufferGary Lin2020-07-172-1/+75
| | | | | | | | | | | | | | | | Map DMA buffer and perpare for the implementation of LsiScsiPassThru(). v2: - Replace 0x10000 with SIZE_64KB macro for the DMA buffer data array - Remove DUAL_ADDRESS_CYCLE from PciIo since we don't really need 64-bit DMA address Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200717061130.8881-9-glin@suse.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-28 23:34:04 +0000