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* ShellPkg/comp: Fix GCC build failureRuiyu Ni2017-02-281-0/+1
| | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
* Nt32Pkg: Add build flag to enable or disable IPv6 network stack.Fu Siyuan2017-02-282-3/+31
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* MdeModulePkg/NetLib: Use StrToIpv4/6Address in BaseLibRuiyu Ni2017-02-282-355/+32
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Siyuan Fu <siyuan.fu@intel.com>
* SignedCapsulePkg/IniParsingLib: Use AsciiStrToGuid in BaseLibRuiyu Ni2017-02-281-143/+3
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* SecurityPkg/SecureBootConfigDxe: Use StrToGuid in BaseLibRuiyu Ni2017-02-283-166/+5
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdeModulePkg/CapsuleApp: Use StrToGuid in BaseLibRuiyu Ni2017-02-282-161/+6
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdePkg/UefiDevicePathLib: Use BaseLib string conversion servicesRuiyu Ni2017-02-281-204/+17
| | | | | | | | | Update UefiDevicePathLib to use StrToGuid/StrHexToBytes /StrToIpv4Address/StrToIpv6Address provided by BaseLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg/BaseLib: Add AsciiStrToGuid/HexToBytes/ToIpv[4/6]AddressRuiyu Ni2017-02-282-0/+805
| | | | | | | | | | | The patch adds 4 APIs to convert ASCII string to GUID, bytes buffer, IP v4 address and IP v6 address. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com>
* MdePkg/BaseLib: Add StrToGuid/StrHexToBytes/StrToIpv[4/6]AddressRuiyu Ni2017-02-282-0/+844
| | | | | | | | | | | The patch adds 4 APIs to convert Unicode string to GUID, bytes buffer, IP v4 address and IP v6 address. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com>
* SignedCapsulePkg/IniParsing: Rename StrToGuid to avoid link failureRuiyu Ni2017-02-281-3/+3
| | | | | | | | | | Since the next patch will add AsciiStrToGuid in BaseLib, renaming the internal function AsciiStrToGuid to IniAsciiStrToGuid to avoid link failure. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdePkg/UefiDevicePathLib: Rename StrToGuid to avoid link failureRuiyu Ni2017-02-281-9/+9
| | | | | | | | | | Since the next patch will add StrToGuid in BaseLib, renaming the internal function StrToGuid to DevicePathLibStrToGuid to avoid link failure. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdePkg: Define IPv4_ADDRESS and IPv6_ADDRESS in Base.hRuiyu Ni2017-02-282-8/+18
| | | | | | | | | | Since the following patch needs to add API converting string to IP address in BaseLib, define the IP address as base types in Base.h. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ShellPkg/comp: Add "-n <diff-count>"/"-s <diff-byte>" supportChen A Chen2017-02-282-155/+229
| | | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen A Chen <chen.a.chen@intel.com> Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* ShellPkg/comp: Rename variable names to proper onesChen A Chen2017-02-281-23/+23
| | | | | | | | The change doesn't impact the functionality. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Chen A Chen <chen.a.chen@intel.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
* ShellPkg/UefiDpLib: Add check to avoid NULL pointer deferenceHao Wu2017-02-281-1/+1
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* PerformancePkg/Dp_App: Add check to avoid NULL pointer deferenceHao Wu2017-02-281-1/+1
| | | | | | Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
* CryptoPkg/OpensslLib: Upgrade OpenSSL version to 1.0.2kQin Long2017-02-287-36/+36
| | | | | | | | | | | | | | | | | | v2: Re-generate the patch after the new OpensslLibCrypto instance. OpenSSL 1.0.2k was released with several severity fixes at 26-Jan-2017 (https://www.openssl.org/news/secadv/20170126.txt). This patch is to upgrade the supported OpenSSL version in CryptoPkg/OpensslLib to catch the latest release 1.0.2k. Cc: Ye Ting <ting.ye@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Qin Long <qin.long@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
* ArmPkg: remove unused PcdArmUncachedMemoryMask PCDArd Biesheuvel2017-02-276-26/+0
| | | | | | | | | | | | This removes the PCD PcdArmUncachedMemoryMask from ArmPkg, along with any remaining references to it in various platform .DSC files. It is no longer used now that we removed the virtual uncached pages protocol and the associated DebugUncachedMemoryAllocationLib library instance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmVirtPkg: clear PcdPerformanceLibraryPropertyMask PCDArd Biesheuvel2017-02-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only observeable effect of having PcdPerformanceLibraryPropertyMask set to 1 is that a EfiReservedMemory region of 4 pages is allocated right below the 4 GB mark. This region is out of bounds for the OS, which means it is not even allowed to map it, to avoid speculative loads from it. On Linux, this may prevent the kernel from using a 1 GB block mapping for this region, and instead it has to carve up the block as follows: 0xffffffff80000000-0xffffffffbe000000 992M PMD CON BLK 0xffffffffbe000000-0xffffffffbfe00000 30M PMD BLK 0xffffffffbfe00000-0xffffffffbfff0000 1984K PTE CON 0xffffffffbfff0000-0xffffffffbfffc000 48K PTE where it would otherwise use a single 1 GB mapping (*), i.e., 0xffffffff80000000-0xffffffffc0000000 1G PGD To clarify, the latter is a single 8 byte entry in the top level page table, whereas in the former case, we have two additional levels of paging, requiring two extra 4 KB pages (on a 4 KB pagesize kernel). The real cost, however, is the TLB footprint, which goes up from a single entry to a number between 90 and 1020, depending on whether contiguous hints are honoured by the hardware. So let's remove PcdPerformanceLibraryPropertyMask until we find a reason why we need it. (*) provided that no other allocations were deliberately located right below the 4 GB mark, and that we are running with more than 3 GB of memory, in which case most allocations will be over 4 GB, given EDK2's default top-down allocation policy. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* Nt32Pkg: exclude libssl functionality from OpensslLib if TLS_ENABLE=FALSELaszlo Ersek2017-02-271-0/+4
| | | | | | | | | | | | Ease security analysis by excluding libssl functionality from the OpensslLib instance we use with TLS_ENABLE=FALSE. Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Tomas Hoger <thoger@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* NetworkPkg/Ip6Dxe: Ignore duplicated DNS address checkJiaxin Wu2017-02-271-10/+0
| | | | | | | | | | | | | | | | | Having duplicated DNS server IPs specified is not an ideal configuration, but not an error condition. This patch is to remove the duplicated DNS address check to allow the same DNS address setting in SetData(). Cc: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com> Cc: Subramanian Sriram <sriram-s@hpe.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Subramanian Sriram <sriram-s@hpe.com> Reviewed-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com> Tested-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com>
* MdeModulePkg/Ip4Dxe: Ignore duplicated DNS address checkJiaxin Wu2017-02-271-10/+0
| | | | | | | | | | | | | | | | | Having duplicated DNS server IPs specified is not an ideal configuration, but not an error condition. This patch is to remove the duplicated DNS address check to allow the same DNS address setting in SetData(). Cc: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com> Cc: Subramanian Sriram <sriram-s@hpe.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Subramanian Sriram <sriram-s@hpe.com> Reviewed-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com> Tested-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com>
* UefiCpuPkg/CpuDxe: Do not ASSERT on AllocateMemorySpace() errorJeff Fan2017-02-271-1/+9
| | | | | | | | | | | | | | | | | | | | | | | Platform PEI may add LOCAL APIC memory mapped space into EFI_HOB_MEMORY_ALLOCATION. Or platform may allocate this range before. So, we skip AllocateMemorySpace()'s return status checking. Instead, we add one DEBUG message for possible trace. https://bugzilla.tianocore.org/show_bug.cgi?id=390 This updating is suggested by Ersek's comments at https://www.mail-archive.com/edk2-devel@lists.01.org/msg22585.html Cc: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg/DxeCore: base code protection on permission attributesArd Biesheuvel2017-02-261-1/+9
| | | | | | | | | | | | | Instead of assuming that a PE/COFF section of type EFI_IMAGE_SCN_CNT_CODE can always be mapped read-only, classify a section as a code section only if it has the executable attribute set and the writable attribute cleared. This adheres more closely to the PE/COFF spec, and avoids issues with Linux OS loaders that may consist of a single read/write/execute section. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* OvmfPkg: exclude libssl functionality from OpensslLib if TLS_ENABLE=FALSELaszlo Ersek2017-02-253-0/+12
| | | | | | | | | | | | | | | The OpensslLibCrypto library instance (which does not contain libssl functions) is sufficient for the Secure Boot feature. Ease security analysis by excluding libssl functionality from the OpensslLib instance we use with TLS_ENABLE=FALSE. Cc: Gary Lin <glin@suse.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Tomas Hoger <thoger@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Gary Lin <glin@suse.com>
* ArmVirtPkg: resolve OpensslLib to OpensslLibCryptoLaszlo Ersek2017-02-251-1/+1
| | | | | | | | | | | | | | | | The OpensslLibCrypto library instance (which does not contain libssl functions) is sufficient for the Secure Boot feature. It would not be sufficient for HTTPS booting (which requires TLS), but in ArmVirtPkg, we don't even enable plaintext HTTP booting for the time being. Ease security analysis by excluding libssl functionality from the OpensslLib instance we use. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Tomas Hoger <thoger@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
* CryptoPkg/OpensslLib: introduce OpensslLibCrypto instanceLaszlo Ersek2017-02-253-6/+582
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 32387e0081db ("CryptoPkg: Enable ssl build in OpensslLib directly", 2016-12-14) pulls OpenSSL's libssl files into the "OpensslLib.inf" library instance unconditionally. If a platform doesn't include the TLS modules, such as - CryptoPkg/Library/TlsLib/TlsLib.inf - NetworkPkg/TlsAuthConfigDxe/TlsAuthConfigDxe.inf - NetworkPkg/TlsDxe/TlsDxe.inf then the platform never actually uses the libssl functionality that gets built into "OpensslLib.inf". Tomas Hoger from Red Hat Product Security tells me that security evaluation is less demanding if we can actually *exclude* the libssl files from such OVMF builds that don't specify -D TLS_ENABLE (rather than just trust modules not to call libssl functions if we don't specify -D TLS_ENABLE). This patch introduces a parallel OpensslLib instance called "OpensslLibCrypto" that is appropriate for platform builds without TLS enablement. It does not build C source files in vain, and it eases security review -- all libssl vulnerabilities can be excluded at once. "OpensslLibCrypto.inf" is created as a copy of "OpensslLib.inf", modifying the BASE_NAME, MODULE_UNI_FILE and FILE_GUID defines. "process_files.sh" is extended to auto-generate the list of OpenSSL files for both library instances accordingly. This list is updated in "OpensslLibCrypto.inf" at once. "OpensslLibCrypto.uni" is introduced as a copy of "OpensslLib.uni", highlighting the difference. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gary Lin <glin@suse.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Qin Long <qin.long@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Ting Ye <ting.ye@intel.com> Cc: Tomas Hoger <thoger@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Qin Long <qin.long@intel.com>
* CryptoPkg/OpensslLib: refresh OpensslLib.inf, opensslconf.h after 32387e00Laszlo Ersek2017-02-252-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 32387e0081db ("CryptoPkg: Enable ssl build in OpensslLib directly", 2016-12-14) removed the "no-queue" configuration option in "process_files.sh", plus it enabled "process_files.sh" to place all libssl source files into "OpensslLib.inf". However, the patch apparently failed to capture two changes originating from the above actions: - the definitions of the OPENSSL_NO_PQUEUE and NO_PQUEUE macros were not removed from "opensslconf.h", - "ssl/ssl_conf.c" was not added to "OpensslLib.inf". Refresh these files, completing commit 32387e0081db. I built OVMF with -D SECURE_BOOT_ENABLE -D TLS_ENABLE, and ArmVirtQemu with -D SECURE_BOOT_ENABLE, after this fix, and experienced no regression. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Gary Lin <glin@suse.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Qin Long <qin.long@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Ting Ye <ting.ye@intel.com> Cc: Tomas Hoger <thoger@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Qin Long <qin.long@intel.com>
* ArmVirtPkg/ArmVirt.dsc.inc: AARCH64: enable DXE image protection featureArd Biesheuvel2017-02-241-0/+10
| | | | | | | | | | | | | | | | Enable the new DXE image protection for all image, i.e., FV images but also external images that originate from disk or the network, such as OS loaders. This complements work that is underway on the arm64/Linux kernel side, to emit the OS loader with 4 KB section alignment, and a suitable split between code and data. http://marc.info/?l=linux-arm-kernel&m=148655557227819 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* BaseTools: GCC: move most AutoGen.obj contents back to .data sectionArd Biesheuvel2017-02-241-3/+6
| | | | | | | | | | | | | | | | | | | | | | | The generated AutoGen.c files mostly contain read-only data, but due to lacking annotations, all of it is emitted into the .data section by the compiler. Given that GUIDs are UEFI's gaffer tape, having writable GUIDs is a security hazard, and this was the main rationale for putting AutoGen.obj in the .text section. However, as it turns out, patchable PCDs are emitted there as well, which can legally be modified at runtime. So update the wildcard pattern to only match g...Guid sections, and move everything else back to .data (Note that this relies on -fdata-sections, without that option, everything is emitted into .data) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Fixes: 233bd25b000f92fc4bbe181fa48edcd72808de8e [lersek@redhat.com: add reference to previous commit being fixed up] Signed-off-by: Laszlo Ersek <lersek@redhat.com>
* ShellPkg UefiDpLib: Fixed GCC build failure caused by ef22403Star Zeng2017-02-241-1/+1
| | | | | | | | | | | Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
* PerformancePkg Dp_App: Fixed GCC build failure caused by 1393510Star Zeng2017-02-241-1/+1
| | | | | | | | | Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* MdeModulePkg PerformanceLib: Fix GCC build failure caused by cfb0abaStar Zeng2017-02-242-3/+3
| | | | | | | | | | Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Liming Gao <liming.gao@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
* UefiCpuPkg/CpuDxe: Replace EFI_D_xxx with DEBUG_xxx in DEBUG()Jeff Fan2017-02-242-7/+7
| | | | | | | | | | Cc: Laszlo Ersek <lersek@redhat.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* MdeModulePkg SmmSmiHandlerProfileLib: Fix GCC build failureStar Zeng2017-02-241-1/+1
| | | | | | | | | Cc: Feng Tian <feng.tian@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* ArmPkg/CpuDxe: remove VirtualUncachedPages protocol and implementationArd Biesheuvel2017-02-236-138/+0
| | | | | | | | | | Virtual uncached pages are simply pages that are aliased using mismatched attributes, which is not allowed by the ARM architecture. So remove the protocol and its implementation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg: remove DebugUncachedMemoryAllocationLibArd Biesheuvel2017-02-236-709/+1
| | | | | | | | | | | | | | | | | | | | | The debug implementation of the UncachedMemoryAllocationLib library class relies on the creation of an uncached alias of a memory range, while keeping the original cached mapping, but with read-only attributes to trap inadvertent write accesses. This is not a terribly good idea, given that the ARM architecture does not allow mismatched attributes, and so creating them deliberately is not something we should encourage by doing it in reference code. So remove the library, and replace all references to it with a reference to the non-debug version (unless the platform does not require a resolution for it in the first place, in which case all UncachedMemoryAllocationLib references can be removed altogether). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ShellPkg UefiDpLib: Remove TimerLib dependencyStar Zeng2017-02-239-56/+25
| | | | | | | | | | | | | | | | | | | | | Current UefiDpLib implementation depends on TimerLib, as different platforms may implement and use their own TimerLib, it makes the dp command needs to be built by platform. The TimerLib dependency can be removed by using performance property configuration table to make UefiDpLib to be generic. Cc: Andrew Fish <afish@apple.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Cinnamon Shia <cinnamon.shia@hpe.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Andrew Fish <afish@apple.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* PerformancePkg Dp_App: Remove TimerLib dependencyStar Zeng2017-02-238-57/+34
| | | | | | | | | | | | | | | | | | | | | Current Dp_App implementation depends on TimerLib, as different platforms may implement and use their own TimerLib, it makes the dp application needs to be built by platform. The TimerLib dependency can be removed by using performance property configuration table to make Dp_App to be generic. Cc: Andrew Fish <afish@apple.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Cinnamon Shia <cinnamon.shia@hpe.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Andrew Fish <afish@apple.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* MdeModulePkg: Add performance property configuration tableStar Zeng2017-02-236-5/+58
| | | | | | | | | | | | | | | | | Define PERFORMANCE_PROPERTY, and install performance property configuration table in DxeCorePerformanceLib and SmmCorePerformanceLib. Cc: Andrew Fish <afish@apple.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Cinnamon Shia <cinnamon.shia@hpe.com> Cc: Jaben Carsey <jaben.carsey@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Andrew Fish <afish@apple.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
* OvmfPkg/XenBusDxe: Use EFIAPI for XenStoreVSPrintAnthony PERARD2017-02-232-0/+2
| | | | | | | | | ... because this function use VA_COPY. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* NetworkPkg: Update the Ethernet interface name.Zhang Lubo2017-02-231-1/+1
| | | | | | | | | | | | | | | Update the interface name from ethA ethB to eth10, eth11 etc if port number more than 9. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Zhang Lubo <lubo.zhang@intel.com> Cc: Sriram Subramanian <sriram-s@hpe.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Sriram Subramanian <sriram-s@hpe.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
* MdeModulePkg: Update the Ethernet interface name.Zhang Lubo2017-02-231-1/+1
| | | | | | | | | | | | | | | Update the interface name from ethA ethB to eth10, eth11 etc if port number more than 9. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Zhang Lubo <lubo.zhang@intel.com> Cc: Sriram Subramanian <sriram-s@hpe.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Sriram Subramanian <sriram-s@hpe.com> Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
* NetworkPkg:Add scriptable configuration to iSCSI driver by leveraging x-UEFI.Zhang Lubo2017-02-2311-271/+2438
| | | | | | | | | | | | | | | | | | | | | | | | | | v2: Add error handling if can not create Attempts in driver entry point. Since we support to define a macro be a PCD value, we enhance our code by modifying the structure in IFR_NVDATA. This effect code logic mainly in Creating Keywords,Convert IFR NvData To AttemptConfigData ByKeyword and reverse function. Fix typo errors and sync based on the latest code. Enable iSCSI keywords configuration based on x-UEFI name space. we introduce new PCD to control the attempt numbers which will be created in non activated state, besides the Attempt name is changed to READ_ONLY attribute in UI. We can invoke KEYWORD HANDLER Protocol to configure the related keywords. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Zhang Lubo <lubo.zhang@intel.com> Cc: Ye Ting <ting.ye@intel.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Wu Jiaxin <jiaxin.wu@intel.com> Reviewed-by: Ye Ting <ting.ye@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Reviewed-by: Wu Jiaxin jiaxin.wu@intel.com
* BaseTools: Fix the regression issue caused by commit dc4c77Yonghong Zhu2017-02-231-2/+2
| | | | | | | | | | | | In the last commit dc4c77, the _GetHeaderInfo will be called more than once, which cause the self._ConstructorList.append(Value) append some duplicate value. Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
* ArmPkg/ArmMmuLib: AARCH64: enable stack alignment checkingArd Biesheuvel2017-02-221-0/+1
| | | | | | | | | | Enable the hardware stack alignment check, as mandated by the UEFI spec. This ensures that the stack pointer is 16 byte aligned at each instance where it is used as the base address in a load/store operation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmLib: AARCH64: allow the stack aligment (SA) bit to be managedArd Biesheuvel2017-02-222-0/+46
| | | | | | | | | In preparation of enabling stack alignment checking, which is mandated by the UEFI spec for AARCH64, add the code to manage this bit to ArmLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPkg/ArmLib: AARCH64: set frame pointer in cache maintenance routineArd Biesheuvel2017-02-221-2/+3
| | | | | | | | | Stack and unstack the frame pointer according to the AAPCS in AArch64AllDataCachesOperation (). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* ArmPlatformPkg/ArmPlatformStackLib: use callee preserved registersArd Biesheuvel2017-02-221-24/+19
| | | | | | | | | | | | | | | | | | The entry code in ArmPlatformStackSet () is a 1:1 transliteration of the ARM version, which uses the callee preserved registers r3 - r7 (*) to preserve the function arguments and the link register across a call to ArmPlatformIsPrimaryCore (). However, x3 - x7 are not callee preserved on AARCH64, and so we should use registers >= x19 instead. While we're at it, drop an unnecessary preserve of the link register, and simplify/deobfuscate the calculation of the secondary stack position. (*) Note that r3 is not actually a callee saved register even on ARM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
* BaseTool/Script: Add SmiHandleProfile OS tool to get symbol.Jiewen Yao2017-02-221-0/+312
| | | | | | | | | | | | | | | This tool accepts the input XML file generated by SmiHandlerProfile application and convert the RVA address to be a user readable symbol. It also converts the GUID to be a user readable string. Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-07 15:11:03 +0000